JP5823707B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP5823707B2 JP5823707B2 JP2011047318A JP2011047318A JP5823707B2 JP 5823707 B2 JP5823707 B2 JP 5823707B2 JP 2011047318 A JP2011047318 A JP 2011047318A JP 2011047318 A JP2011047318 A JP 2011047318A JP 5823707 B2 JP5823707 B2 JP 5823707B2
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- memory cell
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- 230000015654 memory Effects 0.000 claims description 120
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- 229910052710 silicon Inorganic materials 0.000 claims description 18
- 239000010703 silicon Substances 0.000 claims description 18
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 14
- 239000011159 matrix material Substances 0.000 description 14
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- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 9
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 7
- 238000013461 design Methods 0.000 description 7
- 239000001257 hydrogen Substances 0.000 description 7
- 229910052739 hydrogen Inorganic materials 0.000 description 7
- 238000002955 isolation Methods 0.000 description 7
- 229910021332 silicide Inorganic materials 0.000 description 7
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical group [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 7
- 238000005468 ion implantation Methods 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 6
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- 239000002356 single layer Substances 0.000 description 5
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000001360 synchronised effect Effects 0.000 description 4
- 229910052725 zinc Inorganic materials 0.000 description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 3
- 229910052796 boron Inorganic materials 0.000 description 3
- 230000006866 deterioration Effects 0.000 description 3
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- 238000004544 sputter deposition Methods 0.000 description 3
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- 229910018137 Al-Zn Inorganic materials 0.000 description 2
- 229910018573 Al—Zn Inorganic materials 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910020868 Sn-Ga-Zn Inorganic materials 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000007599 discharging Methods 0.000 description 2
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- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 description 2
- 239000010410 layer Substances 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 229910052748 manganese Inorganic materials 0.000 description 2
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- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
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- 229910052814 silicon oxide Inorganic materials 0.000 description 2
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- 229910052719 titanium Inorganic materials 0.000 description 2
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- 239000011787 zinc oxide Substances 0.000 description 2
- 229910018120 Al-Ga-Zn Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910020833 Sn-Al-Zn Inorganic materials 0.000 description 1
- 229910020944 Sn-Mg Inorganic materials 0.000 description 1
- 229910020994 Sn-Zn Inorganic materials 0.000 description 1
- 229910009069 Sn—Zn Inorganic materials 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 229910009369 Zn Mg Inorganic materials 0.000 description 1
- 229910007573 Zn-Mg Inorganic materials 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 229910052750 molybdenum Inorganic materials 0.000 description 1
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- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000010363 phase shift Effects 0.000 description 1
- -1 phosphorus ions Chemical class 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
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- 238000004381 surface treatment Methods 0.000 description 1
- JBQYATWDVHIOAR-UHFFFAOYSA-N tellanylidenegermanium Chemical compound [Te]=[Ge] JBQYATWDVHIOAR-UHFFFAOYSA-N 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/565—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using capacitive charge storage elements
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
- H01L27/1207—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
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- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
- Thin Film Transistor (AREA)
- Non-Volatile Memory (AREA)
Description
本実施の形態では、図1(A)および(B)に示す半導体メモリ回路の動作について説明する。ここでは、書き込みトランジスタTr1および読み出しトランジスタTr2は、ともにn型であるものとする。まず、書き込み方法について、図2を用いて説明する。書き込み時においては、読み出しビット線(・・、Om−1、Om、Om+1、・・)、バイアス線(・・、Sm−1、Sm、Sm+1、・・)、読み出しワード線(・・、Pn−1、Pn、Pn+1、・・)は一定の電位に保たれる。配線の種類ごとにそれぞれの電位は異なってもよいが、ここですべての電位を0ボルトとする。
本実施の形態では、図5(A)および(B)に示す半導体メモリ回路の動作について説明する。ここでは、書き込みトランジスタTr1および読み出しトランジスタTr2は、ともにn型であるものとする。本実施の形態は、実施の形態1の読み出しワード線を他の行の書き込みワード線で代用したものである。先に説明した通り、このような構造とすることにより、半導体メモリ装置の配線を実施の形態1の場合よりも削減できる。本実施の形態では、第n行の読み出しワード線を、第(n−1)行の書き込みワード線で代用する。
本実施の形態では、実施の形態2で説明した半導体メモリ装置の形状や作製方法について説明する。本実施の形態では、書き込みトランジスタは、亜鉛とインジウムを含有する酸化物半導体を用い、読み出しトランジスタとしては、単結晶シリコン半導体を用いる。そのため、書き込みトランジスタは読み出しトランジスタの上に積層して設けられる。
本実施の形態では、実施の形態2で説明した半導体メモリ装置の配線をさらに削減した半導体メモリ装置について説明する。図10に本実施の形態の半導体メモリ装置の回路図を示す。本実施の形態では、実施の形態2の読み出しビット線を書き込みビット線で代用する。このため、実施の形態2に比べてさらに配線数を削減することができる。例えば、N行M列のマトリクスの半導体メモリ装置は、配線数が(N+2M+1)本となる。
本実施の形態では実施の形態4で示した、書き込みビット線と読み出しビット線を兼用する構造を有する半導体メモリ装置の作製方法について図11及び図12を用いて説明する。まず、公知の半導体製造技術を用いて、図11(A)に示すように、単結晶シリコン基板201上に素子分離領域202,ドーピングされたシリコン領域(不純物領域)205a、205b、ゲート絶縁膜203、ダミーゲート204を形成する。ダミーゲート204の側面には、図に示すようにサイドウォールを設けてもよい。
本実施の形態では、実施の形態4で説明した半導体メモリ装置の配線をさらに削減した半導体メモリ装置について説明する。図13に本実施の形態の半導体メモリ装置の回路図を示す。本実施の形態では、実施の形態4で各列に設けられたバイアス線を隣接する記憶セルで共有する。図13(A)に示すように、第n行第(2m−1)列の記憶セルのバイアス線Smは第n行第2m列の記憶セルのバイアス線と共有される。
本実施の形態では、実施の形態4で説明した半導体メモリ装置の配線をさらに削減した半導体メモリ装置について説明する。図16に本実施の形態の半導体メモリ装置の回路図を示す。本実施の形態では、実施の形態4で各列に設けられたバイアス線を隣接する書き込みビット線で代用する。図16(A)に示すように、第m列の記憶セルのバイアス線は第(m+1)列の書き込みビット線Rm+1で代用される。
102 素子分離領域
103 ゲート絶縁膜
104 ダミーゲート
105a 不純物領域
105b 不純物領域
106a ソース
106b ドレイン
106c 配線
106d 配線
107 層間絶縁物
108 空孔部
109 ゲート電極
110 酸化物半導体領域
111 ゲート絶縁膜
112a 書き込みワード線
112b 読み出しワード線
113 n型の導電性を示す領域
114 層間絶縁物
115 接続電極
116 配線
201 単結晶シリコン基板
202 素子分離領域
203 ゲート絶縁膜
204 ダミーゲート
205a 不純物領域
205b 不純物領域
206a シリサイド領域
206b シリサイド領域
207 層間絶縁物
208 空孔部
209 コンタクトホール
210 接続電極
211 ゲート電極
212 酸化物半導体領域
213 ゲート絶縁膜
214a 書き込みワード線
214b 書き込みワード線
215 層間絶縁物
Claims (3)
- 第1の記憶セルと、第2の記憶セルと、を有し、
前記第1の記憶セルは、第1のトランジスタと、第2のトランジスタと、第1のキャパシタと、を有し、
前記第2の記憶セルは、第3のトランジスタと、第4のトランジスタと、第2のキャパシタと、を有し、
前記第1のトランジスタのソース又はドレインの一方は、前記第2のトランジスタのゲートと電気的に接続され、
前記第1のキャパシタの一方の電極は、前記第2のトランジスタのゲートと電気的に接続され、
前記第3のトランジスタのソース又はドレインの一方は、前記第4のトランジスタのゲートと電気的に接続され、
前記第2のキャパシタの一方の電極は、前記第4のトランジスタのゲートと電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、第1の配線と電気的に接続され、
前記第3のトランジスタのソース又はドレインの他方は、前記第1の配線と電気的に接続され、
前記第1のキャパシタの他方の電極は、第2の配線と電気的に接続され、
前記第3のトランジスタのゲートは、前記第2の配線と電気的に接続され、
前記第1の配線には、4段階以上の電位が与えられ、
読み出し時に、前記第2の配線には、3段階以上の負電位が与えられ、
前記第1のトランジスタのチャネル形成領域は、酸化物半導体を有し、
前記第2のトランジスタのチャネル形成領域は、シリコンを有し、
前記第3のトランジスタのチャネル形成領域は、酸化物半導体を有し、
前記第4のトランジスタのチャネル形成領域は、シリコンを有することを特徴とする半導体装置。 - 第1の記憶セルと、第2の記憶セルと、を有し、
前記第1の記憶セルは、第1のトランジスタと、第2のトランジスタと、第1のキャパシタと、を有し、
前記第2の記憶セルは、第3のトランジスタと、第4のトランジスタと、第2のキャパシタと、を有し、
前記第1のトランジスタのソース又はドレインの一方は、前記第2のトランジスタのゲートと電気的に接続され、
前記第1のキャパシタの一方の電極は、前記第2のトランジスタのゲートと電気的に接続され、
前記第3のトランジスタのソース又はドレインの一方は、前記第4のトランジスタのゲートと電気的に接続され、
前記第2のキャパシタの一方の電極は、前記第4のトランジスタのゲートと電気的に接続され、
前記第1のトランジスタのソース又はドレインの他方は、第1の配線と電気的に接続され、
前記第3のトランジスタのソース又はドレインの他方は、前記第1の配線と電気的に接続され、
前記第1のキャパシタの他方の電極は、第2の配線と電気的に接続され、
前記第3のトランジスタのゲートは、前記第2の配線と電気的に接続され、
前記第1の配線には、4段階以上の電位が与えられ、
前記第2の配線に与える負電位を段階的に変化させることにより、前記第1の記憶セルからデータが読み出され、
前記第1のトランジスタのチャネル形成領域は、酸化物半導体を有し、
前記第2のトランジスタのチャネル形成領域は、シリコンを有し、
前記第3のトランジスタのチャネル形成領域は、酸化物半導体を有し、
前記第4のトランジスタのチャネル形成領域は、シリコンを有することを特徴とする半導体装置。 - 請求項1又は請求項2において、
前記第1記憶セル及び前記第2の記憶セルにデータが保持される期間において、前記半導体装置への電源供給が停止されることを特徴とする半導体装置。
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