JP5693748B2 - 表面実装機により真空保持されるようにするための電気モジュール - Google Patents
表面実装機により真空保持されるようにするための電気モジュール Download PDFInfo
- Publication number
- JP5693748B2 JP5693748B2 JP2013545171A JP2013545171A JP5693748B2 JP 5693748 B2 JP5693748 B2 JP 5693748B2 JP 2013545171 A JP2013545171 A JP 2013545171A JP 2013545171 A JP2013545171 A JP 2013545171A JP 5693748 B2 JP5693748 B2 JP 5693748B2
- Authority
- JP
- Japan
- Prior art keywords
- covering
- carrier substrate
- layer
- fixing
- conductive material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/02—Arrangements of circuit components or wiring on supporting structure
- H05K7/026—Multiple connections subassemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
- H01L2223/54486—Located on package parts, e.g. encapsulation, leads, package substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2902—Disposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81192—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83007—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a permanent auxiliary member being left in the finished device, e.g. aids for holding or protecting the layer connector during or after the bonding process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92222—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92225—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01052—Tellurium [Te]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/1056—Metal over component, i.e. metal plate over component mounted on or embedded in PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10568—Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
20 素子
30 被覆体
31 被覆体の縁
32 被覆体の内側領域
33 被覆体の一部
34 被覆体の導電材料
40 固着部
50 導電層
60 連結体
70 連結体を固定するための層
80 キャビティ
Claims (16)
- キャリア基板(10)と、
前記キャリア基板(10)上に配設された少なくとも一つの素子(20,21)と、
前記少なくとも一つの素子(20,21)を覆って配設された被覆体(30)と、を含み、
前記被覆体(30)及び前記少なくとも一つの素子(21)の間には固着部(40)が配設されていて、前記固着部により前記被覆体(30)が前記少なくとも一つの素子(21)に固定されており、
前記被覆体(30)の前記キャリア基板(10)の方を向いた側(U30)が、導電性材料(50)でコートされており、
前記導電性材料(50)は、前記固着部(40)と前記被覆体(30)との間に配されており、
前記導電性材料(50)と前記キャリア基板(10)との間の電気的連結を作り出すための導電性材料から成る連結体(60)が前記キャリア基板(10)上に配設されている、
表面実装機によって真空保持されるようにするための電気モジュール。 - 前記少なくとも一つの素子(21)よりも低い高さをもつ、少なくとも一つの別な素子(22)を含み、
前記固着部(40)は前記少なくとも一つの素子(21)上に設けられており、
前記少なくとも一つの別な素子(22)と前記被覆体(30)との間に空隙または充填材が配設されている請求項1に記載の電気モジュール。 - 前記被覆体の外縁(31)を含む前記被覆体の一部(33)が、空隙(S)によって前記キャリア基板(10)から隔てられて配されるように、前記被覆体(30)が前記キャリア基板(10)を覆って配設されている、請求項1または2に記載の電気モジュール。
- 前記固着部が、接着剤層(40)、特にエポキシまたはシリコーンから成る接着剤層として設けられている、請求項1乃至3のいずれかに記載の電気モジュール。
- 前記固着部(40)が、電気絶縁材料を有する、請求項1乃至4のいずれかに記載の電気モジュール。
- 前記被覆体(30)が導電性材料(34)を有する、請求項1乃至5のいずれかに記載の電気モジュール。
- 前記連結体(60)は、前記導電性材料(34)と前記キャリア基板(10)と間を電気的に連結する、請求項6に記載の電気モジュール。
- 前記連結体(60)を、前記キャリア基板(10)と前記被覆体(30)との間に固定するための層(70)を含み、
前記連結体(60)を固定するための層(70)は、前記連結体(60)の材料よりも電気抵抗の大きい材料を含んでおり、
前記連結体(60)を固定するための層(70)は、前記連結体(60)が前記キャリア基板(10)上に配設された後に設けられる、請求項1乃至7のいずれかに記載の電気モジュール。 - 前記連結体(60)を、前記キャリア基板(10)と前記被覆体(30)との間に固定するための層(70)を含み、
前記連結体(60)を固定するための層(70)は、前記連結体(60)の材料よりも電気抵抗の大きい材料を含んでおり、
前記連結体(60)を固定するための層(70)は、前記連結体(60)が前記キャリア基板(10)上に配設される前に設けられ、さらに前記連結体(60)を固定するための層(70)に孔(80)が設けられ、前記連結体の導電性材料が前記孔(80)に導入される、
請求項1乃至7のいずれかに記載の電気モジュール。 - 前記連結体(60)が、導電性接着剤(61)または導電性ワニス(62)または金属(63)から成る材料を有している、請求項7または8に記載の電気モジュール。
- キャリア基板(10)を用意する工程と、
前記キャリア基板(10)に少なくとも一つの素子(20,21)を配設する工程と、
被覆体(30)を固着部(40)により前記少なくとも一つの素子(21)上に固定することによって、被覆体(30)を前記少なくとも一つの素子(21)を覆って配設する工程と、
前記被覆体(30)の1つの側面(U30)に導電性材料(50)をコートする工程と、
前記導電性材料(50)と前記キャリア基板(10)との間の電気的連結を作り出すための導電性材料から成る連結体(60)を前記キャリア基板(10)上に配設する工程と、を含み、
前記導電性材料(50)は、前記固着部(40)と前記被覆体(30)との間に配されており、
前記導電性材料(50)がコートされた前記1つの側面(U30)は、前記被覆体を前記少なくとも一つの素子(21)を覆って配設する工程の後は、前記キャリア基板(10)の方を向いている、
表面実装機によって真空保持されるようになっている電気モジュールの製造方法。 - 前記キャリア基板(10)に、前記少なくとも一つの素子(21)よりも低い高さをもつ少なくとも一つの別の素子(22)を配設する工程、及び
固着部(40)、特に接着剤層を、前記少なくとも一つの素子(21)上に設ける工程を含む、請求項11に記載の電気モジュールの製造方法。 - 前記固着部(40)として、前記被覆体(30)の1つの側面(U30)に接着剤層(40)を設ける工程を含み、
前記接着剤層(40)が設けられた前記1つの側面が、前記被覆体を前記少なくとも一つの素子(21)を覆って配設する工程の後は、前記キャリア基板(10)の方を向いている、請求項11に記載の電気モジュールの製造方法。 - 前記連結体(60)が一カ所で前記固着部(40)を押しつぶして、その箇所で前記導電性材料(50)と接触するように、前記被覆体(30)を前記連結体(60)に押し付ける工程とを含む、
請求項11乃至13のいずれかに記載の電気モジュールの製造方法。 - 前記連結体(60)を前記キャリア基板(10)と前記被覆体(30)との間に固定するために、前記キャリア基板(10)上に層(70)を設ける工程を含み、
前記連結体(60)を固定するための層(70)は、前記連結体(60)の材料よりも電気抵抗の大きい材料から成る、
請求項14に記載の電気モジュールの製造方法。 - 前記連結体(60)を前記キャリア基板(10)と前記被覆体(30)との間に固定するために、前記キャリア基板(10)上に層(70)を設ける工程と、
前記連結体(60)を固定するための前記層(70)にキャビティ(80)を設ける工程と、
前記連結体(60)を前記キャビティ(80)に導入する工程と、を含み、
前記連結体(60)を固定するための層(70)は、前記連結体(60)の材料よりも電気抵抗の大きい材料から成る、
請求項14に記載の電気モジュールの製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102010055627A DE102010055627A1 (de) | 2010-12-22 | 2010-12-22 | Elektrisches Modul zur Aufnahme durch Bestückungsautomaten mittels Erzeugung eines Vakuums |
DE102010055627.0 | 2010-12-22 | ||
PCT/EP2011/072347 WO2012084556A1 (de) | 2010-12-22 | 2011-12-09 | Elektrisches modul zur aufnahme durch bestückungsautomaten mittels erzeugung eines vakuums |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2014503115A JP2014503115A (ja) | 2014-02-06 |
JP5693748B2 true JP5693748B2 (ja) | 2015-04-01 |
Family
ID=45346468
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2013545171A Expired - Fee Related JP5693748B2 (ja) | 2010-12-22 | 2011-12-09 | 表面実装機により真空保持されるようにするための電気モジュール |
Country Status (4)
Country | Link |
---|---|
US (1) | US20130343006A1 (ja) |
JP (1) | JP5693748B2 (ja) |
DE (1) | DE102010055627A1 (ja) |
WO (1) | WO2012084556A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102013224645A1 (de) * | 2013-11-29 | 2015-06-03 | Continental Teves Ag & Co. Ohg | Verfahren zum Herstellen einer elektronischen Baugruppe |
CN105636361A (zh) * | 2016-03-12 | 2016-06-01 | 中山市鸿程科研技术服务有限公司 | 贴片机三维移动定位机构 |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1998015005A1 (de) * | 1996-09-30 | 1998-04-09 | Siemens Aktiengesellschaft | Mikroelektronisches bauteil in sandwich-bauweise |
US6054008A (en) * | 1998-01-22 | 2000-04-25 | International Business Machines Corporation | Process for adhesively attaching a temporary lid to a microelectronic package |
JP2001177345A (ja) * | 1999-12-15 | 2001-06-29 | Murata Mfg Co Ltd | 圧電発振器 |
US8143108B2 (en) * | 2004-10-07 | 2012-03-27 | Stats Chippac, Ltd. | Semiconductor device and method of dissipating heat from thin package-on-package mounted to substrate |
JP2002359445A (ja) * | 2001-03-22 | 2002-12-13 | Matsushita Electric Ind Co Ltd | レーザー加工用の誘電体基板およびその加工方法ならび半導体パッケージおよびその製作方法 |
JP2003197849A (ja) * | 2001-10-18 | 2003-07-11 | Matsushita Electric Ind Co Ltd | 部品内蔵モジュールとその製造方法 |
US20030206399A1 (en) * | 2002-05-03 | 2003-11-06 | Chung Kirby J. | Monolithic electrical system and heat sink assembly |
TWI242863B (en) * | 2003-09-15 | 2005-11-01 | Siliconware Precision Industries Co Ltd | Heat dissipating structure and semiconductor package with the heat dissipating structure |
CN100485910C (zh) * | 2004-12-02 | 2009-05-06 | 株式会社村田制作所 | 电子元器件及其制造方法 |
JP4473141B2 (ja) * | 2005-01-04 | 2010-06-02 | 日立オートモティブシステムズ株式会社 | 電子制御装置 |
JP4827556B2 (ja) * | 2005-03-18 | 2011-11-30 | キヤノン株式会社 | 積層型半導体パッケージ |
DE102005050398A1 (de) * | 2005-10-20 | 2007-04-26 | Epcos Ag | Gehäuse mit Hohlraum für ein mechanisch empfindliches elektronisches Bauelement und Verfahren zur Herstellung |
JP4751714B2 (ja) * | 2005-12-22 | 2011-08-17 | オリンパス株式会社 | 積層実装構造体 |
JP4714042B2 (ja) * | 2006-03-01 | 2011-06-29 | Okiセミコンダクタ株式会社 | 部品内蔵基板の製造方法 |
JP2008124131A (ja) * | 2006-11-09 | 2008-05-29 | Tdk Corp | 電子部品モジュール及びその製造方法 |
JP5109422B2 (ja) * | 2007-03-16 | 2012-12-26 | 富士通セミコンダクター株式会社 | 半導体装置 |
US20080307643A1 (en) * | 2007-06-15 | 2008-12-18 | Sozansky Wayne A | Method of assembly to achieve thermal bondline with minimal lead bending |
JP4833192B2 (ja) * | 2007-12-27 | 2011-12-07 | 新光電気工業株式会社 | 電子装置 |
CN101588709B (zh) * | 2008-05-19 | 2012-12-19 | 深圳富泰宏精密工业有限公司 | 屏蔽结构 |
JP2010123839A (ja) * | 2008-11-21 | 2010-06-03 | Sharp Corp | 半導体モジュール |
JP4842346B2 (ja) * | 2009-04-21 | 2011-12-21 | シャープ株式会社 | 電子部品モジュールおよびその製造方法 |
US8987896B2 (en) * | 2009-12-16 | 2015-03-24 | Intel Corporation | High-density inter-package connections for ultra-thin package-on-package structures, and processes of forming same |
-
2010
- 2010-12-22 DE DE102010055627A patent/DE102010055627A1/de not_active Withdrawn
-
2011
- 2011-12-09 US US13/996,497 patent/US20130343006A1/en not_active Abandoned
- 2011-12-09 WO PCT/EP2011/072347 patent/WO2012084556A1/de active Application Filing
- 2011-12-09 JP JP2013545171A patent/JP5693748B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20130343006A1 (en) | 2013-12-26 |
JP2014503115A (ja) | 2014-02-06 |
WO2012084556A1 (de) | 2012-06-28 |
DE102010055627A1 (de) | 2012-06-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8110754B2 (en) | Multi-layer wiring board and method of manufacturing the same | |
CN111508912B (zh) | 功率覆盖结构及其制作方法 | |
US8035035B2 (en) | Multi-layer wiring board and method of manufacturing the same | |
CN101189717B (zh) | 内装半导体元件的印刷布线板及其制造方法 | |
JP4858541B2 (ja) | 中継基板および電子回路実装構造体 | |
US8653635B2 (en) | Power overlay structure with leadframe connections | |
CN103579128B (zh) | 芯片封装基板、芯片封装结构及其制作方法 | |
JP6214080B2 (ja) | 空隙を有する半導体パッケージ構造体および形成方法 | |
KR20150104033A (ko) | 초박형 임베디드 반도체 소자 패키지 및 그 제조 방법 | |
JP2007535156A (ja) | 埋込み構成要素からの熱伝導 | |
JPH07307574A (ja) | 多層金属プリント基板とモールドモジュール | |
US20110088936A1 (en) | Method for manufacturing an electronic assembly | |
JPWO2007007450A1 (ja) | 中継基板とそれを使用した立体配線構造体 | |
US7807510B2 (en) | Method of manufacturing chip integrated substrate | |
US20120176751A1 (en) | Electronic component module and manufacturing method therefor | |
US20090072383A1 (en) | Semiconductor device, electronic component module, and method for manufacturing semiconductor device | |
JP5693748B2 (ja) | 表面実装機により真空保持されるようにするための電気モジュール | |
JP2006173152A (ja) | 中継基板と立体配線構造体 | |
JPH07302859A (ja) | 半導体チップ搭載用多層配線基板の製造方法及び半導体チップ搭載装置の製造方法 | |
JP2004266271A (ja) | 電子部品の実装体及びその製造方法 | |
JP5461860B2 (ja) | 電子回路ユニットの製造方法 | |
JP2018067627A (ja) | 電子部品内蔵基板の製造方法 | |
KR101922873B1 (ko) | 전자 소자 모듈 제조 방법 | |
JP3818591B2 (ja) | スルーホール電極付き電子部品およびその製造方法 | |
WO2017179326A1 (ja) | モジュール |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140411 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140423 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140722 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150121 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150203 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5693748 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |