JP5664656B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5664656B2 JP5664656B2 JP2012536098A JP2012536098A JP5664656B2 JP 5664656 B2 JP5664656 B2 JP 5664656B2 JP 2012536098 A JP2012536098 A JP 2012536098A JP 2012536098 A JP2012536098 A JP 2012536098A JP 5664656 B2 JP5664656 B2 JP 5664656B2
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- 239000004065 semiconductor Substances 0.000 title claims description 311
- 238000004519 manufacturing process Methods 0.000 title claims description 72
- 239000000758 substrate Substances 0.000 claims description 69
- 239000000853 adhesive Substances 0.000 claims description 51
- 230000001070 adhesive effect Effects 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 48
- 238000000059 patterning Methods 0.000 claims description 25
- 239000002344 surface layer Substances 0.000 claims description 7
- 230000002093 peripheral effect Effects 0.000 claims description 6
- 229960001716 benzalkonium Drugs 0.000 claims description 2
- CYDRXTMLKJDRQH-UHFFFAOYSA-N benzododecinium Chemical compound CCCCCCCCCCCC[N+](C)(C)CC1=CC=CC=C1 CYDRXTMLKJDRQH-UHFFFAOYSA-N 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 213
- 239000003550 marker Substances 0.000 description 21
- 230000015556 catabolic process Effects 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 238000011161 development Methods 0.000 description 5
- 230000018109 developmental process Effects 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 239000010410 layer Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 235000012239 silicon dioxide Nutrition 0.000 description 3
- 239000012790 adhesive layer Substances 0.000 description 2
- 239000002390 adhesive tape Substances 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 230000003014 reinforcing effect Effects 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- RZVAJINKPMORJF-UHFFFAOYSA-N Acetaminophen Chemical compound CC(=O)NC1=CC=C(O)C=C1 RZVAJINKPMORJF-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052500 inorganic mineral Inorganic materials 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000011707 mineral Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000005297 pyrex Substances 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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Description
図1は、実施の形態にかかる半導体装置の製造方法について示すフローチャートである。また、図2〜図4は、実施の形態にかかる半導体装置の製造方法について順に示す説明図である。半導体ウエハ1の裏面に、半導体ウエハ1のおもて面の表面構造に対応したパターニングを行い、おもて面および裏面にそれぞれ回路パターンが形成された半導体装置を作製する製造方法について説明する。
2 おもて面表面構造
3 アライメントマーカ
11 透明度の高い接着剤
12 透明度の高い支持基板
13 レジスト
21 露光装置のステージ
22 露光装置のカメラ
23 露光装置のステージの開口部
24 フォトマスク
25 フォトマスクの開口部
Claims (15)
- 半導体ウエハの裏面に、該半導体ウエハのおもて面の表面形状に対応したパターニングを行う半導体装置の製造方法であって、
前記半導体ウエハのおもて面に回路パターンを形成するおもて面パターン形成工程と、
前記おもて面パターン形成工程の後に、前記半導体ウエハのおもて面に、該半導体ウエハのおもて面が透けて見える透明度を有する接着剤によって、該半導体ウエハのおもて面が透けて見える透明度を有する支持基板を貼付する貼付工程と、
カメラの位置と整合するように、回路パターンを転写するためのマスクの位置を固定するマスク固定工程と、
前記マスク固定工程の後、ステージ上に前記半導体ウエハを載置する載置工程と、
前記載置工程の後、前記カメラの位置と整合するように前記半導体ウエハの位置を合わせる位置合わせ工程と、
前記位置合わせ工程の後、前記マスクを用いて、前記半導体ウエハの裏面上に、前記半導体ウエハの裏面の回路パターンが転写されたパターニング用マスクを形成するマスク形成工程と、
前記パターニング用マスクを用いて、前記半導体ウエハの裏面に、前記半導体ウエハのおもて面の回路パターンに対応したパターニングを行う裏面パターン形成工程と、
前記裏面パターン形成工程の後に、前記半導体ウエハを前記支持基板から剥離する剥離工程と、
を含むことを特徴とする半導体装置の製造方法。 - 前記載置工程では、前記ステージ上に、前記支持基板側を下にして前記半導体ウエハを載置し、
前記位置合わせ工程では、前記ステージの下方から前記半導体ウエハのおもて面に形成された該半導体ウエハの位置合わせのための目印を検出し、該半導体ウエハの位置を合わせることを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記位置合わせ工程では、前記支持基板および前記接着剤を通して前記半導体ウエハのおもて面に形成された該半導体ウエハの位置合わせのための目印を検出することを特徴とする請求項1または2に記載の半導体装置の製造方法。
- 前記位置合わせ工程では、前記カメラによって、前記半導体ウエハのおもて面に形成された該半導体ウエハの位置合わせのための目印を検出することを特徴とする請求項1または2に記載の半導体装置の製造方法。
- 前記位置合わせ工程では、前記カメラによって、前記ステージの下方から、該ステージに備えられた開口部から見える前記半導体ウエハのおもて面を撮像し、該カメラによって撮像された画像に基づいて該半導体ウエハの位置合わせのための目印を検出することを特徴とする請求項4に記載の半導体装置の製造方法。
- 前記貼付工程の後、前記裏面パターン形成工程の前に、
前記半導体ウエハの裏面を研削し、該半導体ウエハを薄板化する薄板化工程をさらに含むことを特徴とする請求項1〜5のいずれか一つに記載の半導体装置の製造方法。 - 前記おもて面パターン形成工程では、第1導電型の前記半導体ウエハのおもて面側に、絶縁ゲート型バイポーラトランジスタのおもて面表面構造の回路パターンを形成し、
前記裏面パターン形成工程では、前記半導体ウエハの裏面の表面層に、互いに接する第2導電型の第1の半導体領域および第1導電型の第2の半導体領域を選択的に形成することを特徴とする請求項1〜6のいずれか一つに記載の半導体装置の製造方法。 - 前記おもて面パターン形成工程では、前記半導体ウエハのおもて面に、絶縁ゲート型バイポーラトランジスタのおもて面表面構造の回路パターンを形成し、
前記裏面パターン形成工程では、前記半導体ウエハの外周端部に、該半導体ウエハの裏面から凹部を形成することを特徴とする請求項1〜6のいずれか一つに記載の半導体装置の製造方法。 - 前記接着剤は、前記半導体ウエハのおもて面に形成された該半導体ウエハの位置合わせのための目印が透けて見える透明度を有することを特徴とする請求項1〜8のいずれか一つに記載の半導体装置の製造方法。
- 前記接着剤は、透明であることを特徴とする請求項1〜9のいずれか一つに記載の半導体装置の製造方法。
- 前記接着剤の厚さは、15μm以上40μm以下であることを特徴とする請求項1〜10のいずれか一つに記載の半導体装置の製造方法。
- 前記支持基板は、前記半導体ウエハのおもて面に形成された該半導体ウエハの位置合わせのための目印が透けて見える透明度を有することを特徴とする請求項1〜11のいずれか一つに記載の半導体装置の製造方法。
- 前記支持基板は、透明であることを特徴とする請求項1〜12のいずれか一つに記載の半導体装置の製造方法。
- 前記支持基板の厚さは、5mm以下であることを特徴とする請求項1〜13のいずれか一つに記載の半導体装置の製造方法。
- 前記支持基板の厚さは、1mm以下であることを特徴とする請求項1〜14のいずれか一つに記載の半導体装置の製造方法。
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