JP5641995B2 - 半導体素子 - Google Patents
半導体素子 Download PDFInfo
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- JP5641995B2 JP5641995B2 JP2011064668A JP2011064668A JP5641995B2 JP 5641995 B2 JP5641995 B2 JP 5641995B2 JP 2011064668 A JP2011064668 A JP 2011064668A JP 2011064668 A JP2011064668 A JP 2011064668A JP 5641995 B2 JP5641995 B2 JP 5641995B2
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- 239000004065 semiconductor Substances 0.000 title claims description 99
- 239000012535 impurity Substances 0.000 claims description 92
- 230000002093 peripheral effect Effects 0.000 description 38
- 230000015556 catabolic process Effects 0.000 description 19
- 230000000737 periodic effect Effects 0.000 description 19
- 238000010586 diagram Methods 0.000 description 12
- 238000005468 ion implantation Methods 0.000 description 8
- 230000007423 decrease Effects 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 230000005684 electric field Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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Description
(第1実施形態)
図1は、第1実施形態に係る半導体素子の模式図であり、(a)は、半導体素子の全体の概要を示す平面模式図、(b)は、(a)のα−β線に沿った位置の断面模式図である。
SJ構造80Aは、例えば、イオン注入と、結晶成長と、を繰り返す工程によって形成される。この場合、n形ピラー層11のそれぞれの不純物濃度、もしくは、p形ピラー層12のそれぞれの不純物濃度は、イオン注入の際に用いられるマスクの開口面積を変化させることで調整できる。例えば、特定の部分のピラー層の不純物濃度を選択的に低下させるには、特定の部分のピラー層の位置に対応するマスクの開口部の面積をより小さくすればよい。
図3は、参考例に係るスーパージャンクション構造の平面模式図である。
図3には、各ピラー層の位置と、マスクパターンの各開口部の位置と、の対応が分かるように、n形ピラー層11、p形ピラー層12等のほか、マスクパターン400に係る開口部410、420等が表示されている。
図5は、第1実施形態に係るスーパージャンクション構造の平面模式図である。
図1(b)の断面模式図は、例えば、図5のα’−β’の位置に対応している。
図6は、第2実施形態に係るスーパージャンクション構造を形成するためのマスクパターンの平面模式図である。
図7には、各ピラー層の位置と、マスクパターンの各開口部と、の対応が分かるように、n形ピラー層11、p形ピラー層12等のほか、マスクパターン50に係る開口部51、52等が表示されている。そのほか、図7には、素子領域1aにおける単位セル53の領域と、最外周における最外周単位セル54X、54Yの領域と、が表示されている。
図8は、第3実施形態に係るスーパージャンクション構造を形成するためのマスクパターンの平面模式図である。図8には、素子領域1aにおける単位セル63の領域と、最外周単位セル64X、64Yの領域と、が表示されている。
図9には、各ピラー層の位置と、マスクパターンの各開口部と、の対応が分かるように、n形ピラー層11、p形ピラー層12等のほか、マスクパターン60に係る開口部61、62等が表示されている。そのほか、図9には、素子領域1aにおける単位セル63の領域と、最外周における最外周単位セル64X、64Yの領域と、が表示されている。
1a 素子領域
1b 終端領域
1g ゲート配線
10 ドレイン層(第1半導体層)
11、11a n形ピラー層(第2半導体層)
12、12a p形ピラー層(第3半導体層)
13 ベース層(第4半導体層)
14 ソース層(第5半導体層)
15 高抵抗層
20 ゲート絶縁膜
21 ゲート電極(制御電極)
22 フィールド絶縁層
23 フィールドストップ層
24 フィールドストップ電極
25 ガードリング層
30 ドレイン電極
31 ソース電極
40、50、60、400 マスクパターン
41、41a、42、42a、51、51a、52、52a、61、61a、62、62a、410、410a、420、420a 開口部
43、53、63、430 単位セル
44X、44Y、54X、54Y、64X、64Y 最外周単位セル
80A、80B、80C、100 SJ構造(周期的配列構造)
90 領域
N1、N2、P1、P2 矢印
Claims (6)
- 第1導電形の半導体層を有する終端領域と、
第1導電形の第1半導体層と、
前記第1半導体層上に位置し、第1方向において交互に設けられ、且つ、前記第1方向に直交する第2方向において周期的に複数設けられた第1導電形の第2半導体層、及び第2導電形の第3半導体層と、
前記第3半導体層の上に設けられた第2導電形の第4半導体層と、
前記第4半導体層に選択的に設けられた第1導電形の第5半導体層と、
前記半導体層に隣接し、前記第3半導体層の周期よりも長い周期となるように、前記第2方向において周期的に複数設けられた第1導電形の第6半導体層と、
前記第4半導体層に絶縁膜を介して接する制御電極と、
前記第1半導体層に電気的に接続された第1主電極と、
前記第4半導体層と、前記第5半導体層と、に接続された第2主電極と、
を有し、前記終端領域に囲まれた素子領域と、
を備えた半導体素子。 - 前記第6半導体層の前記第2方向における周期は、前記第3半導体層の前記第2方向における周期の2倍である請求項1に記載の半導体素子。
- 前記素子領域は、
前記半導体層に隣接し、前記第2半導体層の周期よりも長い周期となるように、前記第1方向において周期的に複数設けられた第2導電形の第7半導体層を、さらに有する請求項1または2に記載の半導体素子。 - 前記第7半導体層の前記第1方向における周期は、前記第2半導体層の前記第1方向における周期の2倍である請求項3に記載の半導体素子。
- 前記第6半導体層の不純物濃度は、前記第2半導体層の不純物濃度よりも小さい請求項1〜4のいずれか1つに記載の半導体素子。
- 前記第7半導体層の不純物濃度は、前記第3半導体層の不純物濃度よりも小さい請求項3〜5のいずれか1つに記載の半導体素子。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011064668A JP5641995B2 (ja) | 2011-03-23 | 2011-03-23 | 半導体素子 |
CN201210061291.6A CN102694029B (zh) | 2011-03-23 | 2012-03-09 | 半导体元件 |
US13/424,340 US8482028B2 (en) | 2011-03-23 | 2012-03-19 | Semiconductor device |
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JP2011064668A JP5641995B2 (ja) | 2011-03-23 | 2011-03-23 | 半導体素子 |
Publications (3)
Publication Number | Publication Date |
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JP2012204378A JP2012204378A (ja) | 2012-10-22 |
JP2012204378A5 JP2012204378A5 (ja) | 2013-09-19 |
JP5641995B2 true JP5641995B2 (ja) | 2014-12-17 |
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JP2011064668A Active JP5641995B2 (ja) | 2011-03-23 | 2011-03-23 | 半導体素子 |
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US (1) | US8482028B2 (ja) |
JP (1) | JP5641995B2 (ja) |
CN (1) | CN102694029B (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9484451B2 (en) | 2007-10-05 | 2016-11-01 | Vishay-Siliconix | MOSFET active area and edge termination area charge balance |
JP2012074441A (ja) | 2010-09-28 | 2012-04-12 | Toshiba Corp | 電力用半導体装置 |
US9842911B2 (en) | 2012-05-30 | 2017-12-12 | Vishay-Siliconix | Adaptive charge balanced edge termination |
US9887259B2 (en) * | 2014-06-23 | 2018-02-06 | Vishay-Siliconix | Modulated super junction power MOSFET devices |
JP6375176B2 (ja) * | 2014-08-13 | 2018-08-15 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
CN106575666B (zh) | 2014-08-19 | 2021-08-06 | 维西埃-硅化物公司 | 超结金属氧化物半导体场效应晶体管 |
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DE19840032C1 (de) | 1998-09-02 | 1999-11-18 | Siemens Ag | Halbleiterbauelement und Herstellungsverfahren dazu |
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US7652326B2 (en) * | 2003-05-20 | 2010-01-26 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
JP4882212B2 (ja) * | 2003-08-20 | 2012-02-22 | 株式会社デンソー | 縦型半導体装置 |
JP4289123B2 (ja) * | 2003-10-29 | 2009-07-01 | 富士電機デバイステクノロジー株式会社 | 半導体装置 |
US7352036B2 (en) * | 2004-08-03 | 2008-04-01 | Fairchild Semiconductor Corporation | Semiconductor power device having a top-side drain using a sinker trench |
US7659588B2 (en) * | 2006-01-26 | 2010-02-09 | Siliconix Technology C. V. | Termination for a superjunction device |
JP5052025B2 (ja) | 2006-03-29 | 2012-10-17 | 株式会社東芝 | 電力用半導体素子 |
US7737469B2 (en) | 2006-05-16 | 2010-06-15 | Kabushiki Kaisha Toshiba | Semiconductor device having superjunction structure formed of p-type and n-type pillar regions |
JP5188037B2 (ja) * | 2006-06-20 | 2013-04-24 | 株式会社東芝 | 半導体装置 |
JP4620075B2 (ja) * | 2007-04-03 | 2011-01-26 | 株式会社東芝 | 電力用半導体素子 |
JP4564516B2 (ja) * | 2007-06-21 | 2010-10-20 | 株式会社東芝 | 半導体装置 |
DE102007036147B4 (de) * | 2007-08-02 | 2017-12-21 | Infineon Technologies Austria Ag | Verfahren zum Herstellen eines Halbleiterkörpers mit einer Rekombinationszone |
US8174067B2 (en) * | 2008-12-08 | 2012-05-08 | Fairchild Semiconductor Corporation | Trench-based power semiconductor devices with increased breakdown voltage characteristics |
US8148749B2 (en) * | 2009-02-19 | 2012-04-03 | Fairchild Semiconductor Corporation | Trench-shielded semiconductor device |
JP5718627B2 (ja) * | 2010-03-15 | 2015-05-13 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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US8482028B2 (en) | 2013-07-09 |
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