JP5582112B2 - 炭化珪素半導体装置およびその製造方法 - Google Patents
炭化珪素半導体装置およびその製造方法 Download PDFInfo
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims description 60
- 229910010271 silicon carbide Inorganic materials 0.000 title claims description 60
- 239000004065 semiconductor Substances 0.000 title claims description 45
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 239000010410 layer Substances 0.000 claims description 154
- 239000000758 substrate Substances 0.000 claims description 30
- 239000007789 gas Substances 0.000 claims description 20
- 239000012535 impurity Substances 0.000 claims description 19
- 238000000034 method Methods 0.000 claims description 15
- 238000000137 annealing Methods 0.000 claims description 14
- 230000004913 activation Effects 0.000 claims description 13
- 239000002019 doping agent Substances 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims description 11
- 239000011229 interlayer Substances 0.000 claims description 11
- 230000002093 peripheral effect Effects 0.000 claims description 9
- 239000011261 inert gas Substances 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 4
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 230000015572 biosynthetic process Effects 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 description 12
- 238000013459 approach Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 230000005684 electric field Effects 0.000 description 1
- XXUJMEYKYHETBZ-UHFFFAOYSA-N ethyl 4-nitrophenyl ethylphosphonate Chemical compound CCOP(=O)(CC)OC1=CC=C([N+]([O-])=O)C=C1 XXUJMEYKYHETBZ-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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Description
本発明の第1実施形態について説明する。図1は、本実施形態にかかるSiC半導体装置を示した図であり、図1(a)は、平面パターン図、図1(b)は、図1(a)のA−A’断面図、図1(b)は、図1(a)のB−B’断面図、図1(d)は、図1(a)のC−C’断面図である。
上記各実施形態では、n-型チャネル層7にチャネル領域が設定されるnチャネルタイプのJFETを例に挙げて説明したが、各構成要素の導電型を逆にしたpチャネルタイプのJFETに対しても本発明を適用することができる。
2 n-型ドリフト層
3 第1ゲート領域
4 n+型ソース領域
5 半導体基板
6 トレンチ
7 n-型チャネル層
8 第2ゲート領域
9 ゲート電極
10 層間絶縁膜
11 ソース電極
12 ドレイン電極
13、14 凹部(第1、第2凹部)
15 p型リサーフ層
16、17 p型層
Claims (11)
- 炭化珪素からなる第1導電型基板(1)と、前記第1導電型基板(1)上にエピタキシャル成長によって形成された第1導電型のドリフト層(2)と、前記ドリフト層(2)上にエピタキシャル成長によって形成された第2導電型の第1ゲート領域(3)と、前記第1ゲート領域(3)上にエピタキシャル成長もしくはイオン注入により形成された第1導電型のソース領域(4)とを有する半導体基板(5)と、
前記ソース領域(4)および第1ゲート領域(3)を貫通して前記ドリフト層(2)まで達し、一方向を長手方向とした短冊状のトレンチ(6)と、
前記トレンチ(6)の内壁上にエピタキシャル成長によって形成された第1導電型のチャネル層(7)と、
前記チャネル層(7)の上に形成された第2導電型の第2ゲート領域(8)とを有したJFETを備え、
前記トレンチ(6)の先端部において、前記ソース領域(4)の厚みよりも深く、かつ、前記第1ゲート領域(3)の深さよりも浅い第1凹部(13)が形成されることで、該トレンチ(6)の先端部において、少なくともソース領域(4)が除去されており、かつ、前記第1凹部(13)の底面と側面との境界となるコーナ部を覆う第1の第2導電型層(16)が形成されていることを特徴とする炭化珪素半導体装置。 - 前記第1の第2導電型層(16)により、前記第1凹部(13)のコーナ部が埋め込まれることで丸く滑らかな形状とされていることを特徴とする請求項1に記載の炭化珪素半導体装置。
- 前記JFETのセルが形成されたセル領域を囲む外周領域に、前記第1ゲート領域(3)よりも深く前記ドリフト層(2)に達する第2凹部(14)が形成されていると共に、該第2凹部(14)の側面から底面に至るように前記ドリフト層(2)に形成された第2導電型のリサーフ層(15)が備えられ、さらに、前記第2凹部(14)の底面と側面との境界となるコーナ部を覆う第2の第2導電型層(17)が備えられていることを特徴とする請求項1または2に記載の炭化珪素半導体装置。
- 炭化珪素からなる第1導電型基板(1)と、前記第1導電型基板(1)上にエピタキシャル成長によって形成された第1導電型のドリフト層(2)と、前記ドリフト層(2)上にエピタキシャル成長によって形成された第2導電型の第1ゲート領域(3)と、
前記第1ゲート領域(3)を囲む外周領域に、前記第1ゲート領域(3)よりも深く前記ドリフト層(2)に達する凹部(14)が形成されていると共に、該凹部(14)の側面から底面に至るように前記ドリフト層(2)に形成された第2導電型のリサーフ層(15)が備えられ、さらに、前記凹部(14)の底面と側面との境界となるコーナ部を覆う第2導電型層(17)が備えられていることを特徴とする炭化珪素半導体装置。 - 前記第1の第2導電型層(16)は、第2導電型不純物濃度が1×1018cm-3以上とされていることを特徴とする請求項1ないし3のいずれか1つに記載の炭化珪素半導体装置。
- 前記第2の第2導電型層(17)は、第2導電型不純物濃度が1×10 18 cm -3 以上とされていることを特徴とする請求項3に記載の炭化珪素半導体装置。
- 前記第2導電型層(17)は、第2導電型不純物濃度が1×10 18 cm -3 以上とされていることを特徴とする請求項4に記載の炭化珪素半導体装置。
- 炭化珪素からなる第1導電型基板(1)と、前記第1導電型基板(1)上にエピタキシャル成長によって形成された第1導電型のドリフト層(2)と、前記ドリフト層(2)上にエピタキシャル成長によって形成された第2導電型の第1ゲート領域(3)と、前記第1ゲート領域(3)上にエピタキシャル成長もしくはイオン注入により形成された第1導電型のソース領域(4)とを有する半導体基板(5)を用意する工程と、
前記ソース領域(4)および第1ゲート領域(3)を貫通して前記ドリフト層(2)まで達し、一方向を長手方向とした短冊状のトレンチ(6)を形成する工程と、
前記トレンチ(6)の内壁上にエピタキシャル成長によって第1導電型のチャネル層(7)を形成する工程と、
前記チャネル層(7)の上に形成された第2導電型の第2ゲート領域(8)を形成する工程と、
前記チャネル層(7)および前記第2ゲート領域(8)を前記ソース領域(4)が露出するまで平坦化する工程と、
前記平坦化の後に、選択エッチングを行うことで少なくとも前記トレンチ(6)の先端部の前記ソース領域(4)と前記チャネル層(7)および前記第2ゲート領域(8)を除去し、前記トレンチ(6)の先端部に前記ソース領域(4)の厚みよりも深い第1凹部(13)を形成する工程と、
前記第1凹部(13)の形成後に、不活性ガスに第2導電型ドーパントとなる元素を含むガスを混合した混合ガス雰囲気において1300℃以上の活性化アニール処理を行うことで、前記第1凹部(13)の底面と側面との境界部となるコーナ部を覆うように第1の第2導電型層(16)を形成する工程と、を含むことを特徴とするJFETを備える炭化珪素半導体装置の製造方法。 - 前記第2導電型ドーパントを含むガスとして、p型ドーパントを含むガスであるTMAもしくはB2H6を用いることを特徴とする請求項8に記載のJFETを備える炭化珪素半導体装置の製造方法。
- 前記第1の第2導電型層(16)を形成する工程を行った後、前記第1凹部(13)内を含めて層間絶縁膜(10)を形成する工程を含んでいることを特徴とする請求項8または9に記載のJFETを備える炭化珪素半導体装置の製造方法。
- 前記JFETのセルが形成されたセル領域を囲む外周領域に、前記第1ゲート領域(3)よりも深く前記ドリフト層(2)に達する第2凹部(14)を形成する工程と、
前記第2凹部(14)の側面から底面に至るように前記ドリフト層(2)内に第2導電型のリサーフ層(15)を形成する工程とを含み、
前記リサーフ層(15)を形成する工程の後に、前記活性化アニール処理を行うことにより、前記第1凹部(13)のコーナ部を覆う前記第1の第2導電型層(16)を形成すると同時に、前記第2凹部(14)の底面と側面との境界となるコーナ部を覆うように第2の第2導電型層(17)を形成することを特徴とする請求項8ないし10のいずれか1つに記載のJFETを備える炭化珪素半導体装置の製造方法。
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