JP5105378B2 - 半導体装置および多層配線基板 - Google Patents
半導体装置および多層配線基板 Download PDFInfo
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- JP5105378B2 JP5105378B2 JP2009546925A JP2009546925A JP5105378B2 JP 5105378 B2 JP5105378 B2 JP 5105378B2 JP 2009546925 A JP2009546925 A JP 2009546925A JP 2009546925 A JP2009546925 A JP 2009546925A JP 5105378 B2 JP5105378 B2 JP 5105378B2
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- Prior art keywords
- insulating layer
- wiring board
- multilayer wiring
- heat insulating
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Images
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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Description
図1および図2を参照して、本発明の実施の形態1にかかる半導体装置について説明する。図1に、本発明の実施の形態1にかかる半導体装置SA1の断面を示す。また図2に、図1の半導体装置SA1を構成する多層配線基板MB1の断面を示す。半導体装置SA1は、多層配線基板MB1の実装面に半導体素子SDがフリップチップ接続されて構成される。図中、従来の半導体装置SAPと同一の機能を有する部材には同一の符号を付し、また重複する説明は避ける。
図8を参照して、本発明の実施の形態2にかかる半導体装置について説明する。本実施の形態にかかる半導体装置SA2は、上述の実施の形態1の半導体装置SA1において、多層配線基板MB1が多層配線基板MB2に置き換えられたものである。
図9を参照して、本発明の実施の形態3にかかる半導体装置について説明する。図9に示すように、本実施の形態にかかる半導体装置SA3は前述の第1の実施の形態にかかる半導体装置SA1において、多層配線基板MB1が多層配線基板MB3に置き換えられたものである。
図10を参照して、本発明の実施の形態4にかかる半導体装置について説明する。図10に示すように、本実施の形態にかかる半導体装置SA4は上述の第3の実施の形態にかかる半導体装置SA3において、多層配線基板MB3が多層配線基板MB4に置き換えられたものである。
図11を参照して、本発明の実施の形態5にかかる半導体装置について説明する。図11に示すように、本実施の形態にかかる半導体装置SA4は前述の第3の実施の形態にかかる半導体装置SA3において、多層配線基板MB3が多層配線基板MB5に置き換えられたものである。
図12を参照して、本発明の実施の形態6にかかる半導体装置について説明する。図12に示すように、本実施の形態にかかる半導体装置SA6は上述の第5の実施の形態にかかる半導体装置SA5において、多層配線基板MB5が多層配線基板MB6に置き換えられたものである。
Claims (4)
- 相互に積層された、平板状の少なくとも3つの絶縁層を含む多層配線基板と、前記多層配線基板の一方の主面に取り付けられた半導体素子を具備する半導体装置であって、
前記多層配線基板は、前記絶縁層よりも熱伝導性の低い材料で構成された断熱部材をさらに備え、
前記多層配線基板は、前記絶縁層の1つからなるコア基板と、前記コア基板の一方の主面に積層された少なくとも1つの絶縁層と、前記コア基板の他方の主面に積層された少なくとも1つの絶縁層とを含み、
前記断熱部材は、平板状の断熱層であり、前記断熱層は1つであり、かつ前記コア基板である第1の絶縁層と前記半導体素子実装側の最外の第2の絶縁層との間に配されている、半導体装置。 - 前記絶縁層よりも熱伝導性の低い材料は、絶縁性の樹脂に無機の発泡体が混入されたものである、請求項1記載の半導体装置。
- 前記無機の発泡体は、多孔質シリカ、発泡ガラス、シリカバルーン、ガラスマイクロバルーン、シラスバルーン、およびクォーツマイクロスフィアーから選ばれた少なくとも1つからなる、請求項2記載の半導体装置。
- 前記無機の発泡体はセラミック中空粒子である、請求項2記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2009546925A JP5105378B2 (ja) | 2007-12-26 | 2008-11-11 | 半導体装置および多層配線基板 |
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JP2007334142 | 2007-12-26 | ||
JP2007334142 | 2007-12-26 | ||
JP2009546925A JP5105378B2 (ja) | 2007-12-26 | 2008-11-11 | 半導体装置および多層配線基板 |
PCT/JP2008/003248 WO2009081518A1 (ja) | 2007-12-26 | 2008-11-11 | 半導体装置および多層配線基板 |
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JPWO2009081518A1 JPWO2009081518A1 (ja) | 2011-05-06 |
JP5105378B2 true JP5105378B2 (ja) | 2012-12-26 |
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US (1) | US8283570B2 (ja) |
JP (1) | JP5105378B2 (ja) |
CN (1) | CN101869008B (ja) |
WO (1) | WO2009081518A1 (ja) |
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US20110024898A1 (en) * | 2009-07-31 | 2011-02-03 | Ati Technologies Ulc | Method of manufacturing substrates having asymmetric buildup layers |
JP5469405B2 (ja) * | 2009-08-07 | 2014-04-16 | 電気化学工業株式会社 | 回路基板及びその製造方法 |
JP2011146519A (ja) * | 2010-01-14 | 2011-07-28 | Panasonic Corp | 半導体装置及びその製造方法 |
PL2388287T3 (pl) * | 2010-05-18 | 2013-09-30 | Cognis Ip Man Gmbh | Materiał kompozytowy |
US9048233B2 (en) * | 2010-05-26 | 2015-06-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package systems having interposers |
US8945329B2 (en) * | 2011-06-24 | 2015-02-03 | Ibiden Co., Ltd. | Printed wiring board and method for manufacturing printed wiring board |
IN2015DN00551A (ja) * | 2012-06-22 | 2015-06-26 | Nikon Corp | |
US8816494B2 (en) * | 2012-07-12 | 2014-08-26 | Micron Technology, Inc. | Semiconductor device packages including thermally insulating materials and methods of making and using such semiconductor packages |
CN104487232B (zh) * | 2012-07-18 | 2016-10-12 | 福伊特专利公司 | 用于制造纤维增强的塑料构件的设备和方法 |
US9418971B2 (en) * | 2012-11-08 | 2016-08-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package-on-package structure including a thermal isolation material and method of forming the same |
US9223363B2 (en) * | 2013-03-16 | 2015-12-29 | Henkel IP & Holding GmbH | Electronic devices assembled with heat absorbing and/or thermally insulating composition |
CN106068683B (zh) * | 2014-03-20 | 2018-12-21 | 西门子公司 | 具有夹紧装置的电气的模块及夹紧方法 |
JP6531603B2 (ja) * | 2015-10-01 | 2019-06-19 | 富士通株式会社 | 電子部品、電子装置及び電子装置の製造方法 |
DE102015223422A1 (de) * | 2015-11-26 | 2017-06-01 | Robert Bosch Gmbh | Elektrische Vorrichtung mit einer Umhüllmasse |
CN109716872B (zh) * | 2016-08-31 | 2021-11-02 | 阿莫善斯有限公司 | 制造柔性印刷电路板的方法及由其制造的柔性印刷电路板 |
DE102016119031A1 (de) | 2016-10-07 | 2018-04-12 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Wärmeisoliertes Mikrosystem |
JP7223968B2 (ja) * | 2017-01-31 | 2023-02-17 | パナソニックIpマネジメント株式会社 | 電解コンデンサ |
JP7135514B2 (ja) * | 2018-07-09 | 2022-09-13 | 株式会社デンソー | 回路基板の放熱構造 |
JP2020008765A (ja) * | 2018-07-10 | 2020-01-16 | 株式会社リコー | 熱電変換回路、及び画像形成装置 |
JP7275619B2 (ja) * | 2019-02-08 | 2023-05-18 | 富士電機株式会社 | 電力変換装置 |
JP7199268B2 (ja) | 2019-03-19 | 2023-01-05 | 株式会社東芝 | 電子機器 |
JP2021171919A (ja) * | 2020-04-17 | 2021-11-01 | パナソニックIpマネジメント株式会社 | 断熱シート、及び、それを用いた回路基板 |
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JP2906282B2 (ja) * | 1990-09-20 | 1999-06-14 | 富士通株式会社 | ガラスセラミック・グリーンシートと多層基板、及び、その製造方法 |
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- 2008-11-11 WO PCT/JP2008/003248 patent/WO2009081518A1/ja active Application Filing
- 2008-11-11 CN CN2008801176507A patent/CN101869008B/zh not_active Expired - Fee Related
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JP2002359327A (ja) * | 2001-03-28 | 2002-12-13 | Kyocera Corp | 電子回路モジュール |
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US20110279996A1 (en) | 2011-11-17 |
US8283570B2 (en) | 2012-10-09 |
JPWO2009081518A1 (ja) | 2011-05-06 |
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