JP4950037B2 - 半導体装置、データの読み出し方法及び半導体装置の製造方法 - Google Patents
半導体装置、データの読み出し方法及び半導体装置の製造方法 Download PDFInfo
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- JP4950037B2 JP4950037B2 JP2007514422A JP2007514422A JP4950037B2 JP 4950037 B2 JP4950037 B2 JP 4950037B2 JP 2007514422 A JP2007514422 A JP 2007514422A JP 2007514422 A JP2007514422 A JP 2007514422A JP 4950037 B2 JP4950037 B2 JP 4950037B2
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- 239000004065 semiconductor Substances 0.000 title claims description 47
- 238000000034 method Methods 0.000 title claims description 26
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000002184 metal Substances 0.000 claims description 99
- 239000000758 substrate Substances 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 description 34
- 239000013039 cover film Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 9
- 239000010408 film Substances 0.000 description 9
- 230000003071 parasitic effect Effects 0.000 description 8
- 238000009966 trimming Methods 0.000 description 8
- 230000007423 decrease Effects 0.000 description 6
- 229910004298 SiO 2 Inorganic materials 0.000 description 4
- 239000010410 layer Substances 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000013100 final test Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/101—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including resistors or capacitors only
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B20/00—Read-only memory [ROM] devices
- H10B20/60—Peripheral circuit regions
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Description
・Cref=C1+C2
・Cb_0=C0+C3
・Cb_1=C1’+C3
ここでは、各キャパシタはC0<C1<C1’<C2<C3の関係に設定されている。また、静電容量C1はレイアウトなどにより静電容量C0の2倍程度になるように設定されている。
Claims (6)
- 半導体基板上に形成された一対の金属配線と、
前記金属配線の上に形成され、書き込み情報に応じて開口部が選択的に形成されたプログラム層と、
前記一対の金属配線間の静電容量を利用して前記プログラム層に前記開口部が形成されているかどうかを検出することによって前記書き込み情報を読み出す読み出し回路とを含む半導体装置であって、
前記プログラム層下に形成された一対のリファレンス用の金属配線をさらに含み、
前記読み出し回路は、前記一対の金属配線間の静電容量と、前記一対のリファレンス用の金属配線間の静電容量の差を利用して前記プログラム層に前記開口部が形成されているかどうかを検出し、
前記一対の金属配線と、前記一対のリファレンス用の金属配線は、一部の金属配線を共通に用いる半導体装置。 - 前記プログラム層は、空気よりも誘電率が高い材料により形成される請求項1に記載の半導体装置。
- 前記プログラム層は、空気よりも誘電率が低い材料及び導体の一方により形成される請求項1に記載の半導体装置。
- 前記半導体装置は、不揮発性メモリセルがアレイ状に配列されたメモリセルアレイを含む半導体記憶装置である請求項1から請求項3のいずれか一項に記載の半導体装置。
- 書き込み情報に応じて選択的に形成された開口部を持つプログラム層下の一対の金属配線間に所定の電圧を印加するステップと、
前記一対の金属配線間の静電容量を利用して前記プログラム層に前記開口部が形成されているかどうかを検出することによって前記書き込み情報を読み出すステップとを含むデータの読み出し方法であって、
前記プログラム層下に形成された一対のリファレンス用の金属配線間に所定の電圧を印加するステップをさらに含み、
前記一対の金属配線と、前記一対のリファレンス用の金属配線は、一部の金属配線を共通に用いており、
前記一対の金属配線間の静電容量と、前記一対のリファレンス用の金属配線間の静電容量を利用して前記プログラム層に前記開口部が形成されているかどうかを検出するデータの読み出し方法。 - 半導体基板上に一対の金属配線と一対のリファレンス用の金属配線とを形成するステップと、
前記一対の金属配線上にプログラム層を形成するステップと、
書き込む情報に応じて、前記プログラム層に開口部を選択的に形成するステップとを含み、
前記一対の金属配線と、前記一対のリファレンス用の金属配線は、一部の金属配線を共通に用いており、
前記一対の金属配線間の静電容量と、前記一対のリファレンス用の金属配線間の静電容量を利用して前記プログラム層に前記開口部が形成されているかどうかを検出する、半導体装置の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2005/008058 WO2006117853A1 (ja) | 2005-04-27 | 2005-04-27 | 半導体装置、データの読み出し方法及び半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2006117853A1 JPWO2006117853A1 (ja) | 2008-12-18 |
JP4950037B2 true JP4950037B2 (ja) | 2012-06-13 |
Family
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Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007514422A Expired - Fee Related JP4950037B2 (ja) | 2005-04-27 | 2005-04-27 | 半導体装置、データの読み出し方法及び半導体装置の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US7679150B2 (ja) |
JP (1) | JP4950037B2 (ja) |
WO (1) | WO2006117853A1 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8674356B2 (en) * | 2011-08-31 | 2014-03-18 | M/A-Com Technology Solutions Holdings, Inc. | Electrically measurable on-chip IC serial identifier and methods for producing the same |
EP4002453A4 (en) * | 2020-05-28 | 2022-11-16 | Changxin Memory Technologies, Inc. | OUTLET STRUCTURE FOR WORD LINE AND PROCESS FOR THEIR PRODUCTION |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53124919A (en) * | 1977-04-07 | 1978-10-31 | Hitachi Ltd | Data detector |
JP2002500430A (ja) * | 1997-09-01 | 2002-01-08 | シン フイルム エレクトロニクス エイエスエイ | 読出し専用メモリ及び読出し専用メモリ装置 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3584494B2 (ja) * | 1994-07-25 | 2004-11-04 | ソニー株式会社 | 半導体不揮発性記憶装置 |
JP2850833B2 (ja) | 1996-02-23 | 1999-01-27 | 日本電気株式会社 | 半導体装置の製造方法 |
KR100206716B1 (ko) * | 1996-10-21 | 1999-07-01 | 윤종용 | 노아형 마스크 롬 |
KR100252475B1 (ko) | 1997-05-24 | 2000-04-15 | 윤종용 | 반도체 롬 장치 |
US6768165B1 (en) * | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
JP2002063796A (ja) * | 2000-08-21 | 2002-02-28 | Sanyo Electric Co Ltd | 不揮発性メモリ |
JP2002184872A (ja) | 2000-12-15 | 2002-06-28 | Hitachi Ltd | 認識番号を有する半導体装置、その製造方法及び電子装置 |
CN1245680C (zh) * | 2001-02-09 | 2006-03-15 | 索尼公司 | 输入装置 |
JPWO2002067320A1 (ja) * | 2001-02-22 | 2004-06-24 | シャープ株式会社 | 半導体記憶装置および半導体集積回路 |
US6388910B1 (en) * | 2001-08-16 | 2002-05-14 | Amic Technology (Taiwan) Inc. | NOR type mask ROM with an increased data flow rate |
KR100460993B1 (ko) | 2002-12-27 | 2004-12-09 | 주식회사 하이닉스반도체 | 워드라인 리페어가 가능한 플래시 메모리 소자 |
JP4138521B2 (ja) | 2003-02-13 | 2008-08-27 | 富士通株式会社 | 半導体装置 |
JP4927716B2 (ja) * | 2005-04-27 | 2012-05-09 | スパンション エルエルシー | 半導体装置 |
-
2005
- 2005-04-27 WO PCT/JP2005/008058 patent/WO2006117853A1/ja active Application Filing
- 2005-04-27 JP JP2007514422A patent/JP4950037B2/ja not_active Expired - Fee Related
-
2006
- 2006-04-27 US US11/414,081 patent/US7679150B2/en not_active Expired - Fee Related
- 2006-04-27 US US11/414,647 patent/US7645693B2/en active Active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS53124919A (en) * | 1977-04-07 | 1978-10-31 | Hitachi Ltd | Data detector |
JP2002500430A (ja) * | 1997-09-01 | 2002-01-08 | シン フイルム エレクトロニクス エイエスエイ | 読出し専用メモリ及び読出し専用メモリ装置 |
Also Published As
Publication number | Publication date |
---|---|
US20070052064A1 (en) | 2007-03-08 |
US7679150B2 (en) | 2010-03-16 |
JPWO2006117853A1 (ja) | 2008-12-18 |
WO2006117853A1 (ja) | 2006-11-09 |
US20070054454A1 (en) | 2007-03-08 |
US7645693B2 (en) | 2010-01-12 |
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