JP4949279B2 - 配線基板及びその製造方法 - Google Patents
配線基板及びその製造方法 Download PDFInfo
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- JP4949279B2 JP4949279B2 JP2008010489A JP2008010489A JP4949279B2 JP 4949279 B2 JP4949279 B2 JP 4949279B2 JP 2008010489 A JP2008010489 A JP 2008010489A JP 2008010489 A JP2008010489 A JP 2008010489A JP 4949279 B2 JP4949279 B2 JP 4949279B2
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- layer
- conductor
- wiring board
- electronic component
- cylindrical
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Images
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- H—ELECTRICITY
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4092—Integral conductive tabs, i.e. conductive parts partly detached from the substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
- H05K3/326—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H01L2224/05567—Disposition the external layer being at least partially embedded in the surface
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
- H01L2224/81141—Guiding structures both on and outside the body
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- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
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- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0302—Properties and characteristics in general
- H05K2201/0311—Metallic part with specific elastic properties, e.g. bent piece of metal as electrical contact
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- H05K2201/0332—Structure of the conductor
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/1059—Connections made by press-fit insertion
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Metallurgy (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
図1は本発明の第1の実施形態に係る配線基板の構成を断面図の形態で示したものである。図示の例では、本実施形態の配線基板10に電子部品としての半導体チップ30が着脱自在に実装され得る様子を示している。
本実施形態に係る配線基板10a(図7(c))は、基本的には第1の実施形態に係る配線基板10(図1)と同じ構成を有しており、チップ実装面側の絶縁層14上の所要の箇所に第1の実施形態とは構成の異なる筒状端子(外部接続端子)20aが設けられている点で相違する。この筒状端子20aは、図示のように当該絶縁層14から露出するパッド部12Pにその一部分(底部)が電気的に接続され、湾曲して筒状に形成された導体層(ベース部)16aと、この筒状のベース部16aの内面全体を覆って形成された2層構造の導体層(筒状導体部)19とから構成されている。
11…樹脂基板(配線基板本体)、
12,13…配線層、
12P,13P…パッド部、
14,15…ソルダレジスト層(保護膜/絶縁層)、
16,16a…ベース部(導体層/シード層)、
17,19,19a,19b…筒状導体部(導体層/めっき膜)、
18…補強部(導体層/犠牲層の一部分)、
20,20a…筒状端子(外部接続端子)、
30…チップ(電子部品)、
31…バンプ(電極端子)、
40,40a…電子部品装置。
Claims (9)
- 電子部品を実装する配線基板であって、
前記電子部品の電極端子と嵌合する筒状の外部接続端子を備え、
該外部接続端子は、前記配線基板の電子部品実装面側に形成されたパッド部上に形成された第1の導体部と、
該第1の導体部の周縁部分に電気的に接続され、前記電子部品の電極端子が差し込まれたときに当該電極端子の外周面がその中央部分の内周面と緊密に接触するような形状に湾曲して筒状に形成された第2の導体部と、
該第2の導体部の内側の底部近傍で前記第1の導体部と第2の導体部とを接合するように設けられた第3の導体部とを有することを特徴とする配線基板。 - 前記第2の導体部と前記第3の導体部は、異なる金属材料からなることを特徴とする請求項1に記載の配線基板。
- 前記配線基板の電子部品実装面側に前記パッド部を露出させて絶縁層が形成され、前記第2の導体部は、その下端部分が前記絶縁層上に延在して形成されていることを特徴とする請求項1に記載の配線基板。
- 電子部品を実装する配線基板であって、
前記電子部品の電極端子と嵌合する筒状の外部接続端子を備え、
該外部接続端子は、前記配線基板の電子部品実装面側に形成されたパッド部にその一部分が電気的に接続され、湾曲して筒状に形成された第1の導体部と、
該第1の導体部の内面全体を覆い、かつ、前記電子部品の電極端子が差し込まれたときに当該電極端子の外周面がその中央部分の内周面と緊密に接触するような形状に湾曲して筒状に形成された第2の導体部とを有し、
該第2の導体部は、異なる熱膨張係数を有した2層の導体層が積層された構造を有していることを特徴とする配線基板。 - 前記第2の導体部を構成する2層の導体層は、異なる金属材料からなることを特徴とする請求項4に記載の配線基板。
- 電子部品実装面側にパッド部が形成された配線基板本体を作製する工程と、
前記配線基板本体の前記電子部品実装面側の面全体に導体層を形成する工程と、
前記導体層上の前記パッド部に対応する箇所に、形成すべき外部接続端子の外形を画定するための柱状の犠牲層を形成する工程と、
前記犠牲層から露出する前記導体層を除去する工程と、
前記柱状の犠牲層の側面を、その中央部分がくびれるように湾曲した形状に成形する工程と、
該成形された犠牲層の側面に、前記パッド部上の導体層部分に接続される筒状の導体層を形成する工程と、
前記犠牲層を、前記筒状の導体層の内側の底部近傍の一部分を残して除去する工程とを含むことを特徴とする配線基板の製造方法。 - 前記筒状の導体層を、前記犠牲層を構成する金属材料とは異なる金属をめっき種としてめっき法により形成することを特徴とする請求項6に記載の配線基板の製造方法。
- 電子部品実装面側にパッド部が形成された配線基板本体を作製する工程と、
前記配線基板本体の電子部品実装面側に、前記パッド部に対応する箇所に開口部を備えたレジスト層を形成する工程と、
前記レジスト層の開口部内に、常温よりも高い温度状態で、形成すべき外部接続端子の一部を構成する第1の導体層を形成する工程と、
前記第1の導体層上に、常温よりも高い温度状態で、該第1の導体層を構成する材料よりも熱膨張係数の小さい材料からなる第2の導体層を形成する工程と、
常温状態で前記レジスト層を除去する工程とを含むことを特徴とする配線基板の製造方法。 - 前記第1及び第2の導体層の少なくとも一方を、弾性を向上させる金属をめっき種としてめっき法により形成することを特徴とする請求項8に記載の配線基板の製造方法。
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