JP4445524B2 - 半導体記憶装置の製造方法 - Google Patents
半導体記憶装置の製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims description 47
- 239000004065 semiconductor Substances 0.000 title claims description 42
- 239000013078 crystal Substances 0.000 claims description 131
- 230000012010 growth Effects 0.000 claims description 92
- 239000007790 solid phase Substances 0.000 claims description 87
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 77
- 229910052710 silicon Inorganic materials 0.000 claims description 45
- 239000010703 silicon Substances 0.000 claims description 45
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 44
- 238000000034 method Methods 0.000 claims description 40
- 239000000758 substrate Substances 0.000 claims description 30
- 238000005468 ion implantation Methods 0.000 claims description 19
- 238000000137 annealing Methods 0.000 claims description 17
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims description 11
- 238000002425 crystallisation Methods 0.000 claims description 8
- 230000008025 crystallization Effects 0.000 claims description 8
- 150000002500 ions Chemical class 0.000 claims description 7
- 238000005280 amorphization Methods 0.000 claims description 4
- 239000010408 film Substances 0.000 description 161
- 239000010410 layer Substances 0.000 description 95
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 25
- 229910052814 silicon oxide Inorganic materials 0.000 description 25
- 230000007547 defect Effects 0.000 description 20
- 239000001301 oxygen Substances 0.000 description 17
- 229910052760 oxygen Inorganic materials 0.000 description 17
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 15
- 238000005229 chemical vapour deposition Methods 0.000 description 12
- 238000009792 diffusion process Methods 0.000 description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 12
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 10
- 230000003647 oxidation Effects 0.000 description 10
- 238000007254 oxidation reaction Methods 0.000 description 10
- 239000012535 impurity Substances 0.000 description 9
- 238000000576 coating method Methods 0.000 description 8
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 8
- 229910021342 tungsten silicide Inorganic materials 0.000 description 8
- 238000010438 heat treatment Methods 0.000 description 7
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 6
- 239000011248 coating agent Substances 0.000 description 6
- 238000002955 isolation Methods 0.000 description 6
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 229910052799 carbon Inorganic materials 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 229910052732 germanium Inorganic materials 0.000 description 4
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 4
- 238000001459 lithography Methods 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- -1 silicon ions Chemical class 0.000 description 3
- 238000003860 storage Methods 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229920001709 polysilazane Polymers 0.000 description 2
- 230000008439 repair process Effects 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- LPQOADBMXVRBNX-UHFFFAOYSA-N ac1ldcw0 Chemical compound Cl.C1CN(C)CCN1C1=C(F)C=C2C(=O)C(C(O)=O)=CN3CCSC1=C32 LPQOADBMXVRBNX-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 125000004430 oxygen atom Chemical group O* 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000001953 recrystallisation Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000000348 solid-phase epitaxy Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66825—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Recrystallisation Techniques (AREA)
Description
本実施形態では、固相成長によりSOI構造を作製する上で問題となるSOI結晶層の結晶不整合面の位置制御を実現することにより、メモリセルの不良を少なくする方法を提供する。
本実施形態では、従来の問題点を解決するために、隣り合った開口部からの固相成長の継ぎ目の生じると予想されるBOX酸化膜中央部以外をマスクし、酸素、窒素、或いは炭素のイオン注入を行った後、固相成長させる方法を提供する。これにより、結晶粒界の位置を、イオンの注入された領域内に制御することができる。
第2の実施形態では、レジストマスクにより酸素の注入領域を限定したが、この方法では結晶不整合面を限定する領域の幅として、リソグラフィーにより開口できる幅よりも小さいものを実現することができない。この問題点を解決するため、開口部の幅を側壁転写により狭くすることにより、結晶不整合面の形成される位置を、リソグラフィーでの最小加工幅よりも狭い領域に制御することができるようにするものである。
図24は本発明の第4の実施形態に係わる不揮発性半導体記憶装置の製造工程を示す断面図である。
本実施形態では、部分SOIを基板上に固相成長によって形成する場合、必要とされる部分SOIの距離よりも、固相成長によってBOX上をラテラルに成長できる距離が短い場合、又は固相成長の安全な成長を、即ち結晶欠陥を抑制してきれいな成長が見込める距離よりも、固相成長の核になるBOXに設けられた開口部分を長い距離にしなければならないデバイスデザイン上の制約を解決する方法を以下に説明する。
本実施形態では、アモルファスシリコン膜の加工デザインの例を説明する。
なお、本発明は上述した各実施形態に限定されるものではない。実施形態では、固相成長により単結晶化する領域は全てアモルファス状態のシリコンで堆積し、その後の熱処理で固相成長させたが、これに限らず次の(1)又は(2)のようにしても良い。
102…シリコン酸化膜(埋め込み絶縁膜)
103…アモルファスシリコン膜
104…アモルファスシリコン膜
105…シリコン単結晶層(SOI結晶層)
106…結晶不整合面
107…イオン注入による非晶質化層(アモルファスシリコン)
108…結晶不整合面
109…ゲート絶縁膜
110…多結晶シリコン層
111…埋め込み絶縁膜
112…アルミナ膜(電極間絶縁膜)
113…スリット部
114…タングステンシリサイド層
115…n型不純物拡散層
116…層間絶縁膜
117…ビット線コンタクト
120…メモリセルの2層ゲート構造
130…選択ゲートトランジスタの積層ゲート電極構造
204…酸素を高濃度に含んだアモルファスシリコン層
404…第1のアモルファスシリコン膜
405…第1のSOI結晶層
504…第2のアモルファスシリコン膜
505…第2のSOI結晶層
Claims (6)
- シリコン基板上に形成された絶縁膜の複数箇所に開口部を設ける工程と、
前記開口部が設けられた絶縁膜上及び該開口部内にアモルファスシリコン膜を形成する工程と、
前記アモルファスシリコン膜をアニールし、前記開口部をシードとして固相成長させることにより該アモルファスシリコン膜を単結晶化する工程と、
前記固相成長に伴い隣り合った開口部からの成長端同士が接触することにより生じた継ぎ目部分を含む領域にイオン注入を行って該領域を非晶質化する工程と、
前記非晶質化した領域を再びアニールして固相成長させることにより単結晶化する工程と、
前記固相成長及び再度の固相成長により形成されたシリコン単結晶層上にメモリセルアレイを形成する工程と、
を含むことを特徴とする半導体記憶装置の製造方法。 - 前記イオン注入による非晶質化とそれに続くアニールによる固相成長を複数回行うことを特徴とする請求項1記載の半導体記憶装置の製造方法。
- シリコン基板上に形成された絶縁膜の複数箇所に開口部を設ける工程と、
前記開口部が設けられた絶縁膜上及び該開口部内にアモルファスシリコン膜を形成する工程と、
前記アモルファスシリコン膜の一部で、隣り合った開口部からの固相成長の成長端同士が接触すると予想される領域にイオンを注入する工程と、
前記イオン注入が一部の領域に施された前記アモルファスシリコン膜をアニールし、前記開口部をシードとして固相成長させることによりシリコン単結晶層を形成する工程と、
前記シリコン単結晶層上にメモリセルアレイを形成する工程と、
を含むことを特徴とする半導体記憶装置の製造方法。 - シリコン基板上に形成された絶縁膜の複数箇所に開口部を設ける工程と、
前記開口部が設けられた絶縁膜上及び該開口部内に第1のアモルファスシリコン膜を形成する工程と、
前記開口部近傍以外の前記アモルファスシリコン膜を除去する工程と、
前記第1のアモルファスシリコン膜をアニールし、前記開口部をシードとして単結晶を固相成長させることにより第1のシリコン単結晶層を形成する工程と、
前記絶縁膜上及び第1のシリコン単結晶層上に第2のアモルファスシリコン膜を形成する工程と、
隣接する開口部間の中央付近で前記第2のアモルファスシリコン膜を一方の開口部側と他方の開口部側とに分離するための溝を形成する工程と、
前記溝が形成された第2のアモルファスシリコン膜をアニールし、前記第1のシリコン単結晶層をシードとして単結晶を固相成長させることにより第2のシリコン単結晶層を形成する工程と、
前記第2のシリコン単結晶層上にメモリセルアレイを形成する工程と、
を含むことを特徴とする半導体記憶装置の製造方法。 - 前記絶縁膜の開口部はストライプ状であり、ストライプ方向と直交する方向に所定距離離して複数本設けることを特徴とする請求項1,3,4の何れかに記載の半導体記憶装置の製造方法。
- 前記メモリセルアレイは、複数の不揮発性メモリセルを直列接続したNANDセルユニットと、該NANDセルユニットの両側に接続された選択トランジスタを有するものであり、前記メモリセルは前記絶縁膜上のシリコン単結晶層に形成され、前記選択トランジスタは前記開口部上のシリコン単結晶層に形成されることを特徴とする請求項1,3,4の何れかに記載の半導体記憶装置の製造方法。
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JP2007167999A JP4445524B2 (ja) | 2007-06-26 | 2007-06-26 | 半導体記憶装置の製造方法 |
US12/146,802 US7651930B2 (en) | 2007-06-26 | 2008-06-26 | Method of manufacturing semiconductor storage device |
US12/646,563 US7863166B2 (en) | 2007-06-26 | 2009-12-23 | Method of manufacturing semiconductor storage device |
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JP2007167999A JP4445524B2 (ja) | 2007-06-26 | 2007-06-26 | 半導体記憶装置の製造方法 |
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JP4445524B2 true JP4445524B2 (ja) | 2010-04-07 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP4791949B2 (ja) | 2006-12-22 | 2011-10-12 | 株式会社東芝 | 不揮発性半導体メモリ |
JP2009099598A (ja) * | 2007-10-12 | 2009-05-07 | Toshiba Corp | 半導体装置及びその製造方法 |
US8193071B2 (en) * | 2008-03-11 | 2012-06-05 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
JP2010238747A (ja) * | 2009-03-30 | 2010-10-21 | Toshiba Corp | 不揮発性半導体記憶装置 |
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