JP4428717B2 - 基板処理方法及び基板処理システム - Google Patents
基板処理方法及び基板処理システム Download PDFInfo
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- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S414/00—Material or article handling
- Y10S414/135—Associated with semiconductor wafer handling
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S414/00—Material or article handling
- Y10S414/135—Associated with semiconductor wafer handling
- Y10S414/137—Associated with semiconductor wafer handling including means for charging or discharging wafer cassette
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- Engineering & Computer Science (AREA)
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- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Public Health (AREA)
- Health & Medical Sciences (AREA)
- Epidemiology (AREA)
- Environmental & Geological Engineering (AREA)
- Automation & Control Theory (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Description
A1,A2 メインアーム(搬送手段)
C トランスファーアーム(搬送手段)
D,E 搬送アーム(搬送手段)
F インターフェースアーム(搬送手段)
B2 第2の単位ブロック(DEV層)
B3 第3の単位ブロック(COT層)
B4 第4の単位ブロック(COT層)
S1 キャリアブロック
S2 処理ブロック
S3 インターフェースブロック
S4 露光装置
S5 エッチングブロック
S6 測定ブロック
31 現像ユニット(処理ユニット)
32 塗布ユニット(処理ユニット)
23 検知手段
60 制御部(制御手段)
80 エッチングユニット(ドライエッチング装置)
Claims (9)
- 複数種の処理ユニットがそれぞれ複数備えられている基板処理システムによって被処理基板に、少なくともレジスト塗布処理,露光処理,露光後の加熱処理及び現像処理等のリソグラフィ処理を施して所定のパターンを形成するリソグラフィ工程と、上記現像処理後のパターンをマスクとするエッチング工程と、を繰り返し行う基板処理方法であって、
処理が施される被処理基板の処理が1回目か2回目以降かを判別し、
1回目の処理と判別された場合は、1回目の被処理基板の搬送スケジュールに基づいて上記リソグラフィ工程の所定の処理ユニットによる処理を行い、
2回目以降の処理と判別された場合は、前回の被処理基板の搬送履歴のリソグラフィ工程で用いた処理ユニットを使用する基板搬送スケジュールに基づいて被処理基板にリソグラフィ工程の処理を行う、
ことを特徴とする基板処理方法。 - 複数種の処理ユニットがそれぞれ複数備えられている基板処理システムによって被処理基板に、少なくともレジスト塗布処理,露光処理,露光後の加熱処理及び現像処理等のリソグラフィ処理を施して所定のパターンを形成するリソグラフィ工程と、上記現像処理後のパターンをマスクとするエッチング工程と、を繰り返し行う基板処理方法であって、
処理が施される被処理基板の処理が1回目か2回目以降かを判別し、
1回目の処理と判別された場合は、1回目の被処理基板の搬送スケジュールに基づいて上記リソグラフィ工程及びエッチング工程の所定の処理ユニットによる処理を行い、
2回目以降の処理と判別された場合は、前回の被処理基板の搬送履歴のリソグラフィ工程及びエッチング工程で用いた処理ユニットを使用する基板搬送スケジュールに基づいて被処理基板にリソグラフィ工程及びエッチング工程の処理を行う、
ことを特徴とする基板処理方法。 - 請求項1又は2記載の基板処理方法において、
上記2回目以降のリソグラフィ工程によって形成されるパターンを前回のリソグラフィ工程によって形成されたパターンの間に形成する、ことを特徴とする基板処理方法。 - 請求項1記載の基板処理方法において、
上記2回目以降の処理と判別された場合、少なくとも前回の被処理基板の搬送履歴と同じレジスト塗布処理ユニット,露光後加熱処理ユニット及び/又は現像処理ユニットを用いた処理を行う、ことを特徴とする基板処理方法。 - 請求項2記載の基板処理方法において、
上記2回目以降の処理と判別された場合、少なくとも前回の被処理基板の搬送履歴と同じレジスト塗布処理ユニット,露光後加熱処理ユニット,現像処理ユニット及び/又はエッチング処理ユニットを用いた処理を行う、ことを特徴とする基板処理方法。 - 被処理基板の搬入・搬出部と、
それぞれ複数の処理ユニットを備えるレジスト塗布装置,露光後加熱装置及び現像装置を有する塗布・現像処理部と、
上記塗布・現像処理部と露光装置との間に配置され、塗布・現像処理部と露光装置間で被処理基板の受け渡しを司るインターフェース部と、
上記搬入・搬出部,塗布現像処理部及びインターフェース部間、並びに塗布・現像処理部内で被処理基板を搬送する基板搬送手段と、
処理が施される被処理基板の処理が1回目か2回目以降かを判別する検知手段と、
上記検知手段からの検知信号を受けて1回目の処理と判別された場合は、1回目の被処理基板の搬送スケジュールに基づいて上記リソグラフィ工程の所定の処理ユニットによる処理を行い、2回目以降の処理と判別された場合は、前回の被処理基板の搬送履歴のリソグラフィ工程で用いた処理ユニットを使用する基板搬送スケジュールに基づいて被処理基板にリソグラフィ工程の処理を行うように上記処理ユニット及び基板搬送手段に制御信号を伝達する制御手段と、
を具備することを特徴とする基板処理システム。 - 被処理基板の搬入・搬出部と、
それぞれ複数の処理ユニットを備えるレジスト塗布装置,露光後加熱装置及び現像装置を有する塗布・現像処理部と、
上記塗布・現像処理部と露光装置との間に配置され、塗布・現像処理部と露光装置間で被処理基板の受け渡しを司るインターフェース部と、
現像処理後の被処理基板に形成されたパターンをマスクとしてエッチング処理を行うエッチング装置を有するエッチング処理部と、
上記搬入・搬出部,塗布現像処理部,インターフェース部及びエッチング処理部間、並びに塗布・現像処理部内で被処理基板を搬送する基板搬送手段と、
処理が施される被処理基板の処理が1回目か2回目以降かを判別する検知手段と、
上記検知手段からの検知信号を受けて1回目の処理と判別された場合は、1回目の被処理基板の搬送スケジュールに基づいて上記リソグラフィ工程及びエッチング工程の所定の処理ユニットによる処理を行い、2回目以降の処理と判別された場合は、前回の被処理基板の搬送履歴のリソグラフィ工程及びエッチング工程で用いた処理ユニットを使用する基板搬送スケジュールに基づいて被処理基板にリソグラフィ工程及びエッチング工程の処理を行うように上記処理ユニット及び基板搬送手段に制御信号を伝達する制御手段と、
を具備することを特徴とする基板処理システム。 - 請求項6記載の基板処理システムにおいて、
上記制御手段は、2回目以降の処理と判別された場合、少なくとも前回の被処理基板の搬送履歴と同じレジスト塗布処理ユニット,露光後加熱処理ユニット及び/又は現像処理ユニットを用いた処理を行うように上記処理ユニット及び基板搬送手段に制御信号を伝達する、ことを特徴とする基板処理システム。 - 請求項7記載の基板処理システムにおいて、
上記制御手段は、2回目以降の処理と判別された場合、少なくとも前回の被処理基板の搬送履歴と同じレジスト塗布処理ユニット,露光後加熱処理ユニット,現像処理ユニット及び/又はエッチング処理ユニットを用いた処理を行うように上記処理ユニット及び基板搬送手段に制御信号を伝達する、ことを特徴とする基板処理システム。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006307387A JP4428717B2 (ja) | 2006-11-14 | 2006-11-14 | 基板処理方法及び基板処理システム |
TW096142868A TWI379343B (en) | 2006-11-14 | 2007-11-13 | Substrate processing method and substrate processing system |
PCT/JP2007/072117 WO2008059891A1 (fr) | 2006-11-14 | 2007-11-14 | Procédé de traitement de substrat et système de traitement de substrat |
CN2007800423165A CN101536151B (zh) | 2006-11-14 | 2007-11-14 | 衬底处理方法和衬底处理*** |
US12/446,289 US7972755B2 (en) | 2006-11-14 | 2007-11-14 | Substrate processing method and substrate processing system |
KR1020097012134A KR101316343B1 (ko) | 2006-11-14 | 2007-11-14 | 기판 처리 방법 및 기판 처리 시스템 |
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US7879537B1 (en) * | 2007-08-27 | 2011-02-01 | Cadence Design Systems, Inc. | Reticle and technique for multiple and single patterning |
JP5000627B2 (ja) * | 2008-11-27 | 2012-08-15 | 東京エレクトロン株式会社 | 基板処理システム |
US8127713B2 (en) * | 2008-12-12 | 2012-03-06 | Sokudo Co., Ltd. | Multi-channel developer system |
TW201039057A (en) * | 2009-03-12 | 2010-11-01 | Sumitomo Chemical Co | Method for producing resist pattern |
JP5449239B2 (ja) * | 2010-05-12 | 2014-03-19 | 東京エレクトロン株式会社 | 基板処理装置、基板処理方法及びプログラムを記録した記憶媒体 |
JP6351948B2 (ja) * | 2012-10-12 | 2018-07-04 | ラム・リサーチ・アーゲーLam Research Ag | 円板状物品の液体処理装置およびかかる装置で用いる加熱システム |
US10095114B2 (en) | 2014-11-14 | 2018-10-09 | Applied Materials, Inc. | Process chamber for field guided exposure and method for implementing the process chamber |
US9964863B1 (en) | 2016-12-20 | 2018-05-08 | Applied Materials, Inc. | Post exposure processing apparatus |
CN109581816A (zh) * | 2017-09-29 | 2019-04-05 | 长鑫存储技术有限公司 | 一种离线光刻方法及*** |
JP6981918B2 (ja) * | 2018-05-11 | 2021-12-17 | 株式会社Screenホールディングス | 基板処理方法、基板処理装置、およびコンピュータプログラム |
US11092889B2 (en) | 2018-07-31 | 2021-08-17 | Samsung Sdi Co., Ltd. | Semiconductor resist composition, and method of forming patterns using the composition |
US11092890B2 (en) | 2018-07-31 | 2021-08-17 | Samsung Sdi Co., Ltd. | Semiconductor resist composition, and method of forming patterns using the composition |
KR102678588B1 (ko) | 2018-11-14 | 2024-06-27 | 램 리써치 코포레이션 | 차세대 리소그래피에서 유용한 하드 마스크들을 제조하기 위한 방법들 |
US11650506B2 (en) | 2019-01-18 | 2023-05-16 | Applied Materials Inc. | Film structure for electric field guided photoresist patterning process |
KR102180468B1 (ko) * | 2019-07-08 | 2020-11-18 | 세메스 주식회사 | 반송 로봇의 운행 제어 방법 및 운행 제어 시스템 |
CN114200776A (zh) | 2020-01-15 | 2022-03-18 | 朗姆研究公司 | 用于光刻胶粘附和剂量减少的底层 |
US11429026B2 (en) | 2020-03-20 | 2022-08-30 | Applied Materials, Inc. | Lithography process window enhancement for photoresist patterning |
US20230045336A1 (en) * | 2020-07-07 | 2023-02-09 | Lam Research Corporation | Integrated dry processes for patterning radiation photoresist patterning |
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JPH0766265A (ja) | 1993-08-30 | 1995-03-10 | Hitachi Ltd | 製造装置 |
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JP3732388B2 (ja) | 2000-06-06 | 2006-01-05 | 東京エレクトロン株式会社 | 処理装置および処理方法 |
JP3679690B2 (ja) | 2000-07-12 | 2005-08-03 | 東京エレクトロン株式会社 | 基板処理装置 |
SG94851A1 (en) | 2000-07-12 | 2003-03-18 | Tokyo Electron Ltd | Substrate processing apparatus and substrate processing method |
JP3711237B2 (ja) | 2000-12-27 | 2005-11-02 | 東京エレクトロン株式会社 | 基板処理装置 |
US6990380B2 (en) | 2000-12-27 | 2006-01-24 | Tokyo Electron Limited | Substrate processing apparatus and information storage apparatus and method |
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TWI379343B (en) | 2012-12-11 |
US20100009274A1 (en) | 2010-01-14 |
TW200830060A (en) | 2008-07-16 |
KR20090092804A (ko) | 2009-09-01 |
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CN101536151B (zh) | 2011-06-08 |
US7972755B2 (en) | 2011-07-05 |
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