JP4423285B2 - 電子部品内蔵基板および電子部品内蔵基板の製造方法 - Google Patents
電子部品内蔵基板および電子部品内蔵基板の製造方法 Download PDFInfo
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- JP4423285B2 JP4423285B2 JP2006341004A JP2006341004A JP4423285B2 JP 4423285 B2 JP4423285 B2 JP 4423285B2 JP 2006341004 A JP2006341004 A JP 2006341004A JP 2006341004 A JP2006341004 A JP 2006341004A JP 4423285 B2 JP4423285 B2 JP 4423285B2
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- electronic component
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 9
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Combinations Of Printed Boards (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
加えて、外力によりボンディングワイヤに変形や断線が生じるおそれや、リフロー後の洗浄工程に酸性の薬品を用いた場合においては、半導体素子のボンディングパッドに腐食が生じるという課題があり、電子部品内蔵基板に半導体素子をワイヤボンディングによって搭載することが困難であるといった課題があった。
図13,図14に示すように、配線基板10にワイヤボンディング接続した電子部品30のボンディングパッドである電極32とボンディングワイヤ60との接続部分をトランスファーモールド等によって樹脂70で封止することにより、第1の配線基板10に積層した第2の配線基板20をはんだボール40で電気的に接続する処理を行っても、電子部品30の電極32とボンディングワイヤ60の接続部分の電気的接続の信頼性の確保やボンディングワイヤ60を保護することが可能になった。この電子部品内蔵基板では、はんだボール40による第1の配線基板10と第2の配線基板の接続後、2つの基板10,20間に、封止樹脂50を充填する。
また、前記第1の配線基板の上面には、回路部品が搭載されていることを特徴とする。
また、前記はんだボールは、コアとなる導体からなる球状体の外表面にはんだを被覆することにより形成されたコア入りはんだボールであることを特徴とする。
また、前記電子部品は、前記電極がアルミパッドにより形成された半導体素子であることを特徴とする。
また、前記第1の配線基板と前記第2の配線基板とをはんだボールを介して積層させる工程の前に、前記第1の配線基板の上面に、回路部品を搭載する工程を有していることを特徴とする。
また、前記はんだボールは、コアとなる導体からなる球状体の外表面にはんだを被覆することにより形成されたコア入りはんだボールであることを特徴とする。
以下、本発明にかかる電子部品内蔵基板の実施の形態について、図面に基づいて説明する。図1は、本実施形態における電子部品内蔵基板の横断面図である。図2は、電子部品と配線基板のワイヤボンディング部分の状態を示す模式図である。
下層側配線基板10には、上層側配線基板20が載置され、下層側配線基板10と上層側配線基板20はそれぞれの表面に形成された配線パターン(図示せず)と、はんだボール40により電気的に接続されている。本実施形態においては、導体である銅材からなる球状体に形成された銅コア42の外表面をはんだ44で被覆した銅コア入りのはんだボール40が用いられている。はんだボール40のはんだ44をリフローさせることにより、下層側配線基板10と上層側配線基板20が銅コア42により電気的に接続されるのである。下層側配線基板10と上層側配線基板20は少なくとも銅コア42の径寸法離間した状態で接続されることになる。
樹脂70は、図1、図2に示すように、電子部品30の上面側(電極32の形成面)において、少なくとも電極32部分を含む領域を被覆している。樹脂70による被覆部分の形成はエポキシ等の樹脂のポッティングにより行われる。樹脂70で被覆部分を形成する際に、ボンディングワイヤ60により形成されたワイヤループの上端部(頂点)を含む所定部分および下層側配線基板10のボンディングパッド12との接続部分を樹脂70から露出させた状態にすると好適である。これにより、樹脂70の被覆部分の高さ寸法および平面寸法を小さくすることができ、電子部品内蔵基板100の小型化に好都合である。また、下層側配線基板10のボンディングパッド12およびボンディングワイヤ60は金により形成されているため、外部環境に晒されることによる接続部分の劣化や、洗浄に酸等の薬品を用いた場合であっても、ワイヤボンディング部分が侵されるおそれが無いからである。
また、電極32とボンディングワイヤ60との接続の機械的強度も向上できる。保護材である樹脂70は電子部品30の電極32を含む最小限の範囲(高さ方向および幅方向)を被覆しているだけであるので、従来のトランスファーモールドにより形成された樹脂の高さ方向や平面方向の大きさに比べて大幅に高さ寸法および幅寸法を小さくすることができる。
さらには、樹脂70の幅寸法(平面積)が小さくなることにより、はんだボール40を電子部品30に近い位置に配設することができるので、電子部品内蔵基板100全体としての面積をさらに小さくすることができる。
図3は本発明にかかる第2実施形態における電子部品内蔵基板の構造を示す横断面図である。本実施形態は、3枚の配線基板10a,10b,10cを板厚方向に積層し、各配線基板間10a,10bおよび10b,10cの間に電子部品である半導体素子30a,30bを搭載すると共に、ワイヤボンディング接続し、各配線基板間10a,10bおよび10b,10cの間をはんだボール40により電気的に接続し、各配線基板間10a,10bおよび10b,10cの間に封止樹脂50を封止した電子部品内蔵基板100である。図示するように、電子部品内蔵基板100の最上部に配設された配線基板10cの上面には、半導体素子30cを搭載し、回路部品16を配設することもできる。図3においては、半導体素子30cは配線基板10cの上面にフリップチップ接続されているが、フリップチップ接続に替えてワイヤボンディング接続を採用しても良い。
図4は本発明にかかる第3実施形態における電子部品内蔵基板の構造を示す横断面図である。
本実施形態は、第1実施形態で説明した電子部品内蔵基板100の上層側配線基板20の上面に半導体素子30bを搭載し、半導体素子30bを上層側配線基板20にワイヤボンディング接続し、封止樹脂50により半導体素子30bを封止したものである。
本実施形態によれば、既に提供されているBGAタイプの半導体装置の基板を上層側配線基板20として利用することができ、高密度の電子部品内蔵基板100を提供することが可能である。
図5は本発明にかかる第4実施形態における電子部品内蔵基板の構造を示す横断面図である。より具体的には、図14の電子部品内蔵基板に本発明を適用した電子部品内蔵基板の状態を示した模式図である。本実施形態においては、第1実施形態ですでに説明した各部材番号を用いることにより詳細な説明は省略する。
本実施形態における電子部品内蔵基板100は、下層側配線基板10に第1の半導体素子30aがフリップチップ接続され、第1の半導体素子30aの上面に第2の半導体素子30bをスタックし、第2の半導体素子30bの電極32bと下層側配線基板10のボンディングパッド12とがワイヤボンディング接続されている。第1の半導体素子30aと第2の半導体素子30bとは接着剤により接続されている。
以上の実施形態は、電子部品内蔵基板100について説明しているが、本発明は、電子部品内蔵基板100以外にも、電子部品を内蔵したPOP構造の電子部品パッケージ200にも適用することができる。図6は本発明にかかる電子部品内蔵基板を用いたPOP構造の電子部品パッケージの構造を示す横断面図である。このようなPOP構造の電子部品パッケージ200は、第4実施形態で説明した電子部品内蔵基板(半導体パッケージ)100A,100Bを板厚方向に積層することにより形成したものである。
本実施形態を採用することにより、板厚方向の寸法および平面寸法が大幅に小型化され、電気的接続の信頼性の高いPOP構造の電子部品パッケージ200を提供することができる。
次に、第1実施形態における電子部品内蔵基板100の製造方法について説明する。図7〜図11は、電子部品内蔵基板を製造する際の各工程における状態を示した説明断面図である。ここで、下層側配線基板10と上層側配線基板20の配線パターンの形成方法については、公知の方法を採用することができるため、ここでは詳細な説明を省略している。
次に、図9に示すように、下面側に銅コア42を有するはんだボール40が接合された第2の配線基板である上層側配線基板20を位置決めして下層側配線基板10の上面に対向させた状態で載置する。はんだボール40の径寸法は、はんだボール40を構成する銅コア42の径寸法が下層側配線基板10の上面の高さ位置からボンディングワイヤ60のワイヤループの上端面(頂点)の高さ位置までの離間距離より大きい径寸法を有するものが用いられる。
このように、下層側配線基板10と上層側配線基板20の間は封止樹脂50により満たされることになるので、保護材である樹脂70により被覆されていなかったボンディングワイヤ60は、封止樹脂50により保護されることになる。
封止樹脂50の注入が完了した後、図11に示すように、下層側配線基板10の下面側にはんだ等のバンプ14を接合して、電子部品内蔵基板100が完成する。
例えば、以上の実施形態においては、電子部品30として半導体素子を用いて説明しているが、電子部品30は半導体素子に限定されるものではなく、他の電子部品を用いてもよいものはもちろんである。
12 ボンディングパッド
14 バンプ
16 回路部品
20 上層側配線基板
30,30a,30b,30c 電子部品(半導体素子)
32,32b 電極
40 はんだボール
42 銅コア
44 はんだ
50 封止樹脂
60 ボンディングワイヤ
70 樹脂(保護材)
80 アンダーフィル樹脂
100 電子部品内蔵基板
200 POP構造パッケージ
Claims (10)
- 上面に配線パターン及びボンディングパッドが形成された第1の配線基板と、
前記第1の配線基板の上面側に積層され、下面に配線パターンが形成された第2の配線基板と、
前記第1の配線基板の上面側に搭載され、ボンディングワイヤにより前記ボンディングパッドと電極とが電気的に接続された電子部品と、
前記第1の配線基板の上面と前記第2の配線基板の下面との間に配設され、前記第1の配線基板の上面側の配線パターンと前記第2の配線基板の下面側の配線パターンとを電気的に接続するはんだボールとを有し、
前記はんだボールの径寸法が、前記第1の配線基板の上面から前記ボンディングワイヤのワイヤループの頂点位置までの高さ寸法よりも大きく形成されていて、
前記ボンディングワイヤの前記ボンディングパッドとの接続部と、前記ワイヤループの頂点部分が露出するよう、前記電子部品の電極と前記ボンディングワイヤとの接続部が保護材により被覆されていて、
前記第1の配線基板と前記第2の配線基板との間に充填された樹脂により、前記電子部品、前記ボンディングワイヤ、及び前記はんだボールが封止されていることを特徴とする電子部品内蔵基板。 - 前記電子部品は、前記電極がアルミパッドにより形成された半導体素子であることを特徴とする請求項1記載の電子部品内蔵基板。
- 前記第1の配線基板の上面の配線パターンの接続部には、フリップチップ接続により他の電子部品が電気的に接続されていて、
前記他の電子部品の上面には、前記ボンディングワイヤにより前記ボンディングパッドと電極とが電気的に接続された電子部品が接着剤を介して搭載されていることを特徴とする請求項1または2記載の電子部品内蔵基板。 - 前記第1の配線基板の上面には、回路部品が搭載されていることを特徴とする請求項1〜3のうちのいずれか一項に記載の電子部品内蔵基板。
- 前記はんだボールは、コアとなる導体からなる球状体の外表面にはんだを被覆することにより形成されたコア入りはんだボールであることを特徴とする請求項1〜4のうちのいずれか一項に記載の電子部品内蔵基板。
- 上面に配線パターン及びボンディングパッドが形成された第1の配線基板の該上面側に電子部品を搭載する工程と、
前記ボンディングパッドと前記電子部品の電極をボンディングワイヤによって電気的に接続するワイヤボンディング工程と、
前記ボンディングワイヤの前記ボンディングパッドとの接続部と、前記ボンディングワイヤにより形成されるワイヤループの頂点部分を露出させた状態で、前記電子部品の電極と前記ボンディングワイヤとの接続部を保護材により被覆する工程と、
下面に配線パターンを有し、前記第1の配線基板とは別体に形成された第2の配線基板の下側面を、前記電子部品を搭載した前記第1の配線基板の上面側に対向させた状態にして、前記第1の配線基板と前記第2の配線基板とをはんだボールを介して積層させると共に、前記両配線基板の対向する配線パターン同士を前記はんだボールをリフローさせることによって電気的に接続する工程と、
前記はんだボールをリフローさせた後、前記第1の配線基板と前記第2の配線基板の間を洗浄する工程と、
前記第1の配線基板と前記第2の配線基板の間に樹脂を充填し、前記電子部品、前記ボンディングワイヤ及び前記はんだボールを樹脂封止する工程を有することを特徴とする電子部品内蔵基板の製造方法。 - 前記電子部品は、前記電極がアルミパッドにより形成された半導体素子であることを特徴とする請求項6記載の電子部品内蔵基板の製造方法。
- 前記電子部品の搭載工程においては、
前記第1の配線基板の上面に形成された配線パターンに、他の電子部品をフリップチップ接続により電気的に接続する工程と、
前記他の電子部品の上面に、接着剤を介して前記電子部品を積層させ、前記ボンディングパッドと前記電子部品の電極とをボンディングワイヤによって電気的に接続するワイヤボンディング工程とを有し、
前記樹脂封止工程においては、前記第1の配線基板と前記第2の配線基板の間に樹脂を充填し、前記電子部品、前記他の電子部品、前記ボンディングワイヤ、及び前記はんだボールを樹脂封止する工程を有することを特徴とする請求項6または7記載の電子部品内蔵基板の製造方法。 - 前記第1の配線基板と前記第2の配線基板とをはんだボールを介して積層させる工程の前に、前記第1の配線基板の上面に、回路部品を搭載する工程を有していることを特徴とする請求項6〜8のうちいずれか一項に記載の電子部品内蔵基板の製造方法。
- 前記はんだボールは、コアとなる導体からなる球状体の外表面にはんだを被覆することにより形成されたコア入りはんだボールであることを特徴とする請求項6〜9のうちのいずれか一項に記載の電子部品内蔵基板の製造方法。
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