JP4310430B2 - Strontium titanate thin film laminate - Google Patents
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本発明は、ＹＢａ２Ｃｕ３Ｏ７−δ薄膜を中心とする酸化物超伝導デバイスや低温で実用する半導体デバイス等に使用されるチタン酸ストロンチウム積層体に関する。 The present invention, YBa 2 Cu 3 O 7- δ films about the strontium titanate laminates used in a semiconductor device or the like for practical use in an oxide superconducting devices and low-temperature around the.
バルク単結晶のチタン酸ストロンチウム（以下「ＳＴＯ」という。）は、量子常誘電体として知られ、その誘電率は、４．２Ｋで20,000以上の値を示す。また、その誘電率は、バイアス依存性、ストレス依存性を持ち、それらによって低下する特長を持っている。 Bulk single crystal strontium titanate (hereinafter referred to as “STO”) is known as a quantum paraelectric, and has a dielectric constant of 20,000 or more at 4.2K. Further, the dielectric constant has a bias dependency and a stress dependency, and has a feature of decreasing by them.
ＳＴＯの格子定数は、酸化物超伝導体と非常に近い値を持つことから、該超伝導体のエピタキシャル成長下地基板として用いられ、超伝導デバイスの開発には重要な材料である。実際に、ＳＴＯ薄膜は、デバイスに使用されているが、その誘電率（ε）は、10,000以下（４．２Ｋ）であり、バルク単結晶で得られている 20,000には達していない。 Since the lattice constant of STO has a value very close to that of an oxide superconductor, it is used as an underlying substrate for epitaxial growth of the superconductor and is an important material for the development of superconducting devices. Actually, although the STO thin film is used in the device, its dielectric constant (ε) is 10,000 or less (4.2K), and does not reach 20,000 obtained in the bulk single crystal.
図1に、例として、M. Lippmaa, M. Kawasakiらの報告（下記「非特許文献１」参照）によるものを示す。この場合の誘電率は、8,200にしか達していない。
図２に、Hong-Cheng Li, X. X. Xi（下記「非特許文献２」）らの報告を示す。この場合は、誘電率は、1,000にも達していない。上記２件の例の様に現在のところ、ＳＴＯ薄膜の誘電率は10,000にも達していない。
FIG. 1 shows, as an example, a report by M. Lippmaa, M. Kawasaki et al. (See “Non-Patent
FIG. 2 shows a report of Hong-Cheng Li, XX Xi (hereinafter “Non-Patent
上述したように、バルク単結晶ＳＴＯは、低温で高い誘電率を示すため、超伝導や低温デバイスの実用化で極めて有用な誘電体であるにも関わらず、薄膜化すると誘電率が低下してしまうという欠点があり、現在に至るもこの欠点は、克服されていない。 As described above, bulk single crystal STO exhibits a high dielectric constant at low temperatures. Therefore, although it is a very useful dielectric for superconductivity and practical use of low-temperature devices, the dielectric constant decreases when the film thickness is reduced. This defect has not been overcome to date.
本発明では、基板上に粉末微粒子を塗布し、その上にＳＴＯ薄膜を形成することにより、薄膜のＳＴＯにおいても、高誘電率とすることに成功した。 In the present invention, by applying fine powder particles on a substrate and forming an STO thin film thereon, the present invention succeeded in achieving a high dielectric constant even in the thin film STO.
第３図に、本願発明のイメージ図を示す。下部の基板の上に、微粒子を塗布し、その微粒子が塗布された基板の上に、ＳＴＯ膜を形成すると、薄膜のＳＴＯにおいても、高誘電率とすることができる。 FIG. 3 shows an image diagram of the present invention. When fine particles are coated on the lower substrate and an STO film is formed on the substrate coated with the fine particles, a high dielectric constant can be obtained even in a thin STO.
図８に作製した平行平板コンデンサの抵抗率の温度依存性を示す。抵抗率は、半導体的挙動が確認され、その急激な減少が解消されたことが分かる。 FIG. 8 shows the temperature dependence of the resistivity of the manufactured parallel plate capacitor. It can be seen that the resistivity has been confirmed to be semiconducting and its rapid decrease has been eliminated.
図９に誘電率の温度依存性を示す。１００ｋＨｚで温度４．２Ｋにおいて20,000以上の誘電率が確認された。この誘電率の温度依存性は単結晶で得られた特性と一致していることから、優れた誘電特性を持つＳＴＯ薄膜がＹＢＣＯ薄膜上に作製されていることを示している。 FIG. 9 shows the temperature dependence of the dielectric constant. A dielectric constant of 20,000 or more was confirmed at a temperature of 4.2 K at 100 kHz. The temperature dependence of this dielectric constant is consistent with the characteristics obtained with a single crystal, indicating that an STO thin film having excellent dielectric characteristics is produced on the YBCO thin film.
以下に、発明を実施するため好ましい条件及び最良の形態を示す。 In the following, preferred conditions and best modes for carrying out the invention are shown.
図４は、本願発明に係るＳＴＯ薄膜の断面図である。該薄膜は、ＳＴＯ基板上に、下部ＹＢＣＯ電極を形成し、該下部電極の上に、図３において示した微粒子を塗布し、該塗布された電極上に第２のＳＴＯ層を形成する。該第２のＳＴＯ層表面のＣＭＰ研磨を行い、滑らかにする。該滑らかになった表面の上に第１のＳＴＯ層を形成し、該層の上に上部ＹＢＣＯ電極を形成する。 FIG. 4 is a cross-sectional view of an STO thin film according to the present invention. In the thin film, a lower YBCO electrode is formed on an STO substrate, fine particles shown in FIG. 3 are applied on the lower electrode, and a second STO layer is formed on the applied electrode. CMP polishing is performed on the surface of the second STO layer to make it smooth. A first STO layer is formed on the smoothed surface, and an upper YBCO electrode is formed on the layer.
このようにして、積層されたＳＴＯ膜は、薄膜ではあるが、バルク単結晶ＳＴＯと同様に、低温においても高い誘電率を示し、超伝導や低温デバイスの実用化において極めて有用な誘電体となる。 Thus, although the laminated STO film is a thin film, like a bulk single crystal STO, it exhibits a high dielectric constant even at a low temperature, and becomes an extremely useful dielectric in the practical application of superconductivity and low temperature devices. .
上記微粒子の粒径は、上記ＳＴＯ薄膜の厚さ以下であることが望ましい。該薄膜以上であると、ＣＭＰ研磨の量が多くなり、製作工程上好ましくない。 The particle size of the fine particles is desirably equal to or less than the thickness of the STO thin film. If it is more than this thin film, the amount of CMP polishing increases, which is not preferable in the production process.
また、上記微粒子の粒径は、上記ＳＴＯ薄膜の厚さの１／２〜１／１０であることが望ましい。この程度であれば、該薄膜を突き抜ける確率が少なくなり好ましい。
また、上記微粒子の粒径は、具体的な大きさで表現すると、１〜１００ｎｍ程度である。
The particle diameter of the fine particles is preferably 1/2 to 1/10 of the thickness of the STO thin film. This level is preferable because the probability of penetrating the thin film is reduced.
The particle diameter of the fine particles is about 1 to 100 nm when expressed in a specific size.
上記微粒子の材質は、ＳＴＯ、上記基板と同じ物質、ダイヤモンド、半導体又は該半導体の酸化物が好ましい。 The material of the fine particles is preferably STO, the same material as the substrate, diamond, a semiconductor, or an oxide of the semiconductor.
上記微粒子塗布後の微粒子面密度は、形成するＳＴＯ膜が基板上にエピタキシャル成長可能となる程度であることが好ましい。微粒子が多すぎると、ＳＴＯがエピタキシャル成長することができなくなり、逆に少ないと、誘電率が高くならない。 The fine particle surface density after the fine particle application is preferably such that the STO film to be formed can be epitaxially grown on the substrate. If the amount of fine particles is too large, STO cannot be epitaxially grown. Conversely, if the amount is small, the dielectric constant will not increase.
上記微粒子塗布後の微粒子面密度は、具体的には、１０6〜１０8個／ｃｍ2程度であることが好ましい。 Specifically, the fine particle surface density after the fine particle coating is preferably about 10 6 to 10 8 particles / cm 2 .
上記基板は、ABa2Cu3O7-δ（A＝Y, Nd, Sm, Eu, Gd, Dy, Ho, Yb；δは１以下の正数）、MgO、LaAlO3又は半導体ウェーハ基板に前記物質が形成されたものであるのが好ましい。 The substrate is ABa 2 Cu 3 O 7-δ (A = Y, Nd, Sm, Eu, Gd, Dy, Ho, Yb; δ is a positive number of 1 or less), MgO, LaAlO 3 or the semiconductor wafer substrate. It is preferable that the substance is formed.
微粒子塗布を用いたＳＴＯ薄膜の作製プロセスを図４に示す。パルスレーザ成長法（以下「ＰＬＤ法」という。）を用いて、ＳＴＯ（１００）基板上に下部ＹＢＣＯ膜としてｃ軸配向ＹＢＣＯ（００ｎ）薄膜を厚さ３００ｎｍ成膜後、真空を破ることなく連続してＳＴＯ（００１）薄膜を厚さ１０ｎｍ成膜して、ＳＴＯ／ＹＢＣＯ構造を作製する。その後、ダイヤモンドからなる微粒子（粒径１００ｎｍ）をその薄膜表面に、面密度１０7個／ｃｍ2で一様に塗布する。
A process for producing an STO thin film using fine particle coating is shown in FIG. Using a pulse laser growth method (hereinafter referred to as “PLD method”), a c-axis oriented YBCO (00n) thin film having a thickness of 300 nm is continuously formed as a lower YBCO film on an STO (100) substrate, and then continuous without breaking the vacuum. Then, an STO (001) thin film is formed to a thickness of 10 nm to produce an STO / YBCO structure. Thereafter, fine particles (
この厚さ１０ｎｍのＳＴＯ薄膜は、カバーＳＴＯ薄膜とよばれ、作製プロセスでＹＢＣＯが直接、大気や純水にさらされることを防ぎ、ＹＢＣＯ本来の超伝導特性を低下させないために成膜されている。 This STO thin film with a thickness of 10 nm is called a cover STO thin film, and is formed in order to prevent YBCO from being directly exposed to the atmosphere and pure water in the manufacturing process, and not to deteriorate YBCO's original superconducting properties. .
図５に、ＹＢＣＯ薄膜の成膜条件、図６に、ＳＴＯ薄膜の成膜条件を示す。 FIG. 5 shows the film forming conditions for the YBCO thin film, and FIG. 6 shows the film forming conditions for the STO thin film.
次に半導体技術で利用されているフォトリソグラフィー法を用いて、レジストにより下部パターンを作製し、低エネルギーイオンミリングを用いてエッチングを行い、下部ＹＢＣＯのパターンを形成する。次に、ＰＬＤ法により、ＳＴＯ（１００）薄膜厚さ１μｍ成膜を行う。 Next, using a photolithography method used in semiconductor technology, a lower pattern is formed with a resist, and etching is performed using low energy ion milling to form a lower YBCO pattern. Next, an STO (100) thin film having a thickness of 1 μm is formed by the PLD method.
次に、成膜手順について説明する。まず、基板を２００℃に保持し、真空度が１０-4Ｐａに到達した後、酸素ガス雰囲気中（酸素圧１００Ｐａ）において温度上昇を行い、８１０℃に到達した後、ＳＴＯ薄膜を成長する。このＳＴＯ薄膜表面上に存在する突起物を除去し、下部ＹＢＣＯ薄膜の作るパターンの段差を平坦化するためＣＭＰにより研磨する。
Next, a film forming procedure will be described. First, the substrate is held at 200 ° C., and after the degree of vacuum reaches 10 −4 Pa, the temperature is increased in an oxygen gas atmosphere (
下部ＹＢＣＯ薄膜を直接研磨すると超伝導特性を劣化させる原因になるため、ＳＴＯ薄膜の研磨を行った。その後、ＣＭＰプロセスによって表面に付着したＳｉ粒子等の不純物を、アセトン中でサンプルを超音波洗浄による表面クリーニングによって取り除いた。 Since polishing the lower YBCO thin film directly causes deterioration of the superconducting properties, the STO thin film was polished. Thereafter, impurities such as Si particles adhering to the surface by the CMP process were removed by surface cleaning by ultrasonic cleaning in acetone.
ＣＭＰプロセス後、ＲＨＥＥＤ観測で観測した結果、試料表面は、アモルファス的であることが分かった。アモルファス結晶上にはエピタキシャル成長は、期待できない。 As a result of observation by RHEED observation after the CMP process, it was found that the sample surface was amorphous. Epitaxial growth cannot be expected on amorphous crystals.
このため、酸素圧１００Ｐａ雰囲気中、温度６００℃、２時間の熱処理を行った。原子間力顕微鏡（ＡＦＭ）を用いて表面構造の観察を行った。その結果を図７に示す。この写真に見られるように、ＣＭＰ前においては、かなり大きな突起が観察されるが、ＣＭＰ後においては、上記突起に比べるとはるかに小さな突起が見られる程度に表面が滑らかになっている。 For this reason, a heat treatment was performed at a temperature of 600 ° C. for 2 hours in an atmosphere having an oxygen pressure of 100 Pa. The surface structure was observed using an atomic force microscope (AFM). The result is shown in FIG. As can be seen in this photograph, fairly large protrusions are observed before CMP, but after CMP, the surface is smooth enough to have much smaller protrusions than the above protrusions.
典型的に、２００ｎｍ程度の高さの円錐状形状の突起物は、ＣＭＰにより、高さで１／１０以下の２０ｎｍ以下に減少し、底面の面積で０．０４μｍ2以下と１／１０以下になっていることが確認され、ＣＭＰによって突起物の形状が小さくなっていることが確認され、超伝導マイクロショートが解消するであろうことが期待された。 Typically, a cone-shaped projection having a height of about 200 nm is reduced to 20 nm or less, which is 1/10 or less in height, by CMP, and the area of the bottom surface is 0.04 μm 2 or less and 1/10 or less. It was confirmed that the shape of the protrusion was reduced by CMP, and it was expected that the superconducting micro-short would be eliminated.
熱処理後、ＰＬＤを用いて絶縁層ＳＴＯ薄膜を２００ｎｍ成膜し、真空を破ることなく連続して上部ＹＢＣＯ薄膜を２５０ｎｍ成膜する。このＳＴＯ薄膜は、ＣＭＰによって下部ＹＢＣＯ薄膜から成長している突起物の上部を切断した後、上部平面がＳＴＯ研磨表面に出現していることで生じるマイクロショートによる絶縁性の低下を防ぐためである。 After the heat treatment, an insulating layer STO thin film is formed to 200 nm using PLD, and an upper YBCO thin film is continuously formed to 250 nm without breaking the vacuum. This STO thin film is for preventing the deterioration of insulation due to the micro-short caused by the upper plane appearing on the STO polished surface after cutting the upper part of the protrusion growing from the lower YBCO thin film by CMP. .
成膜した上部ＹＢＣＯのパターンをフォトリソグラフィー法及び低エネルギーイオンミリングを用いて行い、平行平板コンデンサを作製した。ＨＦ５％を用いて、下部ＹＢＣＯに作製した電極部分のＳＴＯ薄膜をエッチングにより取り除いた。 The formed upper YBCO pattern was formed using a photolithography method and low energy ion milling to produce a parallel plate capacitor. The STO thin film of the electrode part produced in the lower YBCO was removed by etching using 5% of HF.
上部ＹＢＣＯと下部ＹＢＣＯ薄膜のパターンは、クロスオーバーした構造であり、クロスした部分は、上部ＹＢＣＯ/絶縁層ＳＴＯ／ＣＭＰ−ＳＴＯ／capped−ＳＴＯ／下部ＹＢＣＯの積層構造である。 The pattern of the upper YBCO and the lower YBCO thin film has a crossover structure, and the crossed portion has a laminated structure of upper YBCO / insulating layer STO / CMP-STO / capped-STO / lower YBCO.
超伝導や低温デバイスの実用化で極めて有用な誘電体である。 It is a very useful dielectric for the practical application of superconductivity and low-temperature devices.
Claims (8)
基板上に粉末微粒子を塗布し、その上にチタン酸ストロンチウム薄膜が形成されてなり、上記チタン酸ストロンチウム薄膜の上に、絶縁層チタン酸ストロンチウム薄膜が積層されていることを特徴とする高誘電率チタン酸ストロンチウム薄膜積層体。 A high dielectric constant strontium titanate thin film laminate for superconducting and low temperature devices ,
High dielectric of the powder particles is applied to a substrate, thereon will be strontium titanate thin film is formed, on strontium thin titanate, and feature an insulating layer of strontium titanate thin film are laminated Strontium titanate thin film laminate.
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