JP4203501B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4203501B2 JP4203501B2 JP2005288176A JP2005288176A JP4203501B2 JP 4203501 B2 JP4203501 B2 JP 4203501B2 JP 2005288176 A JP2005288176 A JP 2005288176A JP 2005288176 A JP2005288176 A JP 2005288176A JP 4203501 B2 JP4203501 B2 JP 4203501B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor layer
- metallized
- ground
- sealing region
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Led Device Packages (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Description
2:金属蓋体
3:半導体素子
5a:接地用メタライズ導体層
6:導電性樹脂接着剤
7:セラミック膜
Claims (5)
- セラミックスから成る絶縁基体の上面に、半導体素子が搭載される搭載部および該搭載部を取り囲む枠状の封止領域ならびに該封止領域の一部に配設された接地用メタライズ導体層を有し、金属蓋体が前記封止領域に前記搭載部に搭載された前記半導体素子を覆うようにして導電性樹脂接着剤により接合され、前記半導体素子を封止するとともに前記接地用メタライズ導体層に電気的に接続される半導体装置であって、前記接地用メタライズ導体層は前記絶縁基体の側面に延出しており、前記接地用メタライズ導体層上に、前記接地用メタライズ導体層の一部が露出されるような開口部を有する枠状のセラミック膜が設けられていることを特徴とする半導体装置。
- 前記半導体素子は前記絶縁基体の表面に設けられたメタライズ金属層に搭載されており、該メタライズ金属層は前記接地用メタライズ導体層に電気的に接続されていることを特徴とする請求項1に記載の半導体装置。
- 前記導電性樹脂接着剤は銀−エポキシ樹脂からなることを特徴とする請求項1または請求項2に記載の半導体装置。
- 前記金属蓋体の開口部につば部が形成されていることを特徴とする請求項1乃至請求項3のいずれかに記載の半導体装置。
- 前記セラミック膜および前記接地用メタライズ導体層は、前記金属蓋体の前記開口部の全周に形成された前記導電性樹脂接着剤を介して前記金属蓋体に接続されていることを特徴とする請求項1乃至請求項4のいずれかに記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005288176A JP4203501B2 (ja) | 2005-09-30 | 2005-09-30 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005288176A JP4203501B2 (ja) | 2005-09-30 | 2005-09-30 | 半導体装置 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14869299A Division JP3873145B2 (ja) | 1999-05-27 | 1999-05-27 | 半導体素子収納用パッケージ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006074059A JP2006074059A (ja) | 2006-03-16 |
JP4203501B2 true JP4203501B2 (ja) | 2009-01-07 |
Family
ID=36154260
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005288176A Expired - Fee Related JP4203501B2 (ja) | 2005-09-30 | 2005-09-30 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4203501B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6849425B2 (ja) * | 2016-12-22 | 2021-03-24 | 京セラ株式会社 | 電子装置および電子モジュール |
-
2005
- 2005-09-30 JP JP2005288176A patent/JP4203501B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2006074059A (ja) | 2006-03-16 |
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