WO2006114986A1 - 電子部品搭載用基板及びそれを用いた電子装置 - Google Patents
電子部品搭載用基板及びそれを用いた電子装置 Download PDFInfo
- Publication number
- WO2006114986A1 WO2006114986A1 PCT/JP2006/306854 JP2006306854W WO2006114986A1 WO 2006114986 A1 WO2006114986 A1 WO 2006114986A1 JP 2006306854 W JP2006306854 W JP 2006306854W WO 2006114986 A1 WO2006114986 A1 WO 2006114986A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- insulating base
- connection pad
- electric circuit
- solder
- electronic component
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01012—Magnesium [Mg]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01025—Manganese [Mn]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/09181—Notches in edge pads
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10727—Leadless chip carrier [LCC], e.g. chip-modules for cards
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Definitions
- the present invention relates to a wiring board for mounting an electronic component such as a semiconductor element, and an electronic device using the wiring board.
- a wiring board 1 for mounting an electronic component such as a semiconductor element or a piezoelectric vibrator is generally made of a substantially square plate-like ceramic material or the like, and has an insulating substrate 2 having an electronic component mounting portion 4 on its upper surface, A plurality of wiring layers 3 led out from the electronic component mounting portion 4 of the insulating base 2 through the inside of the insulating base and a plurality of connection pads 5 formed on the outer periphery of the lower surface of the insulating base 2 And a plurality of groove-shaped recesses (which are formed on the side surface of the insulating base 2 and are electrically connected to the wiring layers 3 and the connection pads 5 by the conductor 7 on the inner wall surface.
- the electronic component mounting part 4 of the insulating base 2 is mounted with electronic components such as the semiconductor element 11 and each electrode for electronic component signals, grounding, etc.
- Conductive connection material such as bonding wire 12 is connected to wiring layer 3
- the metal lid 13 made of iron-nickenore-cobalt alloy, iron-nickel alloy, or the like, or transparent glass such as glass is used.
- the electronic device 10 is completed by sealing the electronic component by bonding the brazing material via an adhesive or the like with the lid 13 having the optical material power.
- connection pad 5 formed on the outer peripheral portion of the lower surface of the insulating substrate 2 is connected to the wiring conductor 21 of the external electric circuit board 20 via the solder 31 such as tin-lead solder.
- solder 31 such as tin-lead solder.
- the groove-like recess 6 to which the conductor 7 is attached is formed on the side surface of the insulating substrate 2 in a vertical direction with a substantially identical inner diameter, usually in a semicircular cross section.
- the plurality of connection pads 5 are generally formed in a rectangular shape, and one side of the connection pads 5 is arranged around the entire outer periphery of the lower surface of the insulating base at regular intervals (for example, JP-A-2003-2003). 68921).
- the present invention has been made in view of the above problems, and an object of the present invention is to provide a connection pad externally.
- Wiring board that can be firmly bonded to the wiring conductor of the electric circuit board via lead-free solder, and can be mounted on the external electric circuit board firmly and with high reliability, and an electronic device using the wiring board Is to provide.
- the present invention provides an insulating base having an electronic component mounting portion on the upper surface and a connection pad on at least the outer peripheral portion of the lower surface, and the outer peripheral portion on the side surface of the insulating base.
- a wiring board having a groove-shaped recess formed in a vertical direction from a connection pad and having a conductor attached to an inner wall surface, a plurality of the groove-shaped recesses are formed for one connection pad on the outer periphery. It was made to be.
- the solder crawls along the inner wall surfaces of the plurality of recesses, and the connection pad and the external electric circuit Since the fillet is formed between the wiring conductors of the substrate, the wiring substrate (electronic device) can be bonded extremely firmly to the external electric circuit substrate.
- connection pad of the electronic device to the wiring conductor of the external electric circuit board via lead-free solder or the like and mounting the electronic device on the external electric circuit board
- the electronic device and the external electric circuit board are dropped. Even if an external stress such as an impact acts and a stress due to mechanical deformation occurs between the insulating base of the electronic device and the external electrical circuit board, the connection pads and casters in the direction of the stress are applied. This effectively prevents mechanical damage to the lead-free solder that is bonded to the connection pad, and makes the connection of the electronic device to the external electric circuit board extremely reliable.
- an insulating base having an electronic component mounting portion on the upper surface and a connection pad on at least the outer peripheral portion of the lower surface, and the lead from the connection pad of the outer peripheral portion on the side surface of the insulating base
- the wiring board having a groove-shaped recess (casteration) formed on the inner wall surface and having a conductor attached thereto
- a plurality of the groove-shaped recesses are formed for one connection pad on the outer periphery.
- connection pad of the electronic device is connected to the wiring conductor of the external electric circuit board via lead-free solder, etc., and the electronic device is mounted on the external electric circuit board, and then dropped onto the electronic device and the external electric circuit board.
- an external stress such as an impact
- a stress due to mechanical deformation is generated between the insulating substrate of the electronic device and the external electric circuit board
- casters are applied to the connection pads in the direction of the stress. This effectively prevents mechanical damage to the lead-free solder bonded to the connection pad, which makes the connection of the electronic device to the external electric circuit board extremely reliable. I can do it.
- FIG. 1A is an example of a top view when a wiring board according to the present invention is applied to a package for housing a semiconductor element that houses a semiconductor element.
- FIG. 1B is an example of a side view when the wiring board according to the present invention is applied to a package for housing a semiconductor element that houses a semiconductor element.
- FIG. 1C is an example of a bottom view when the wiring board according to the present invention is applied to a package for housing a semiconductor element that houses a semiconductor element.
- FIG. 2A is an example of a top view showing a semiconductor device in which a semiconductor element is mounted on a wiring board according to the present invention.
- FIG. 2B is an example of a side view showing a semiconductor device in which a semiconductor element is mounted on a wiring board according to the present invention.
- FIG. 2C is an example of a bottom view showing a semiconductor device in which a semiconductor element is mounted on a wiring board according to the present invention.
- FIG. 3 is a schematic perspective view showing a semiconductor device.
- FIG. 4 is an enlarged perspective view of the corner portion of the wiring board as viewed from the back side.
- FIG. 5 is a perspective view showing a solder fillet formed in a recess of a wiring board of a semiconductor device mounted on an external electric circuit board.
- FIG. 6A is a cross-sectional view of part A of FIG. 2A after the semiconductor device is mounted on the external electric circuit board.
- FIG. 6B is a cross-sectional view of part A of FIG. 2A after the semiconductor device is mounted on the external electric circuit board.
- FIG. 7A is an example of a top view of a semiconductor device in which a semiconductor element is mounted on a wiring board according to a conventional example.
- FIG. 7B is an example of a side view of a semiconductor device in which a semiconductor element is mounted on a wiring board according to a conventional example.
- FIG. 7C is an example of a bottom view of a semiconductor device in which a semiconductor element is mounted on a wiring board according to a conventional example.
- FIG. 8A is an example of a top view of a semiconductor device in which a semiconductor element is mounted on a wiring board according to a conventional example.
- FIG. 8B is an example of a side view of a semiconductor device in which a semiconductor element is mounted on a wiring board according to a conventional example.
- FIG. 8C is an example of a bottom view of a semiconductor device in which a semiconductor element is mounted on a wiring board according to a conventional example.
- FIG. 9 is an enlarged perspective view of the corner portion of the wiring board as viewed from the back side.
- FIG. 10A is a cross-sectional view of section A of FIG. 8A after the semiconductor device is mounted on the external electric circuit board.
- FIG. 10B is a cross-sectional view of part A of FIG. 8A after the semiconductor device is mounted on the external electric circuit board.
- FIGS. 1A to 1C show an example in which the wiring board of the present invention is applied to a package for housing a semiconductor element for housing a semiconductor element
- FIGS. 2A to 2C show a semiconductor device in which a semiconductor element is mounted on the wiring board.
- An example of 3 is a schematic perspective view of the semiconductor device
- FIG. 4 is an enlarged perspective view of the corner portion of the wiring board as viewed from the back side.
- 2 is an insulating substrate
- 3 is a wiring layer
- 4 is an electronic component mounting portion
- 5 is a connection pad
- 6 is formed on the side surface of the insulating substrate 2
- a conductor 7 is formed on the inner wall surface.
- This is a groove-shaped recess (casteration).
- a wiring substrate 1 for mounting the semiconductor element 11 is formed by the connection pad 5 and the groove-like recess 6 in which the conductor is formed.
- the insulating base 2 is made of an electrically insulating material such as an aluminum oxide sintered body, an aluminum nitride sintered body, a mullite sintered body, a glass ceramic sintered body, and the semiconductor element 11 is mounted on the upper surface thereof.
- a mounting portion 4 is provided, and the semiconductor element 11 is bonded and fixed to the mounting portion 4 through an adhesive such as glass, resin, or brazing material.
- the insulating base 2 is made of, for example, an aluminum oxide sintered body, an appropriate organic binder and solvent are added to and mixed with raw material powders such as aluminum oxide, silicon oxide, calcium oxide, and magnesium oxide. Then, the slurry is made into a slurry-like ceramic slurry, and then the ceramic slurry is formed into a sheet shape by a sheet forming technique such as a conventionally known doctor blade method or calendar roll method to form a ceramic green sheet (ceramic green sheet) having a predetermined shape. Finally, a plurality of the ceramic green sheets are finally laminated and fired at a temperature of about 1600 ° C. in a reducing atmosphere.
- raw material powders such as aluminum oxide, silicon oxide, calcium oxide, and magnesium oxide.
- the insulating base 2 has a plurality of wiring layers 3 formed from the periphery of the mounting portion on which the semiconductor element 11 is mounted to the side surface through the inside of the insulating base 2. , Acts as a conductive path for connecting the signal and ground electrodes of the semiconductor element 11 mounted on the electronic component mounting part 4 to the connection pad 5, and a semiconductor is provided at one end of the electronic component mounting part 4 side. Electrodes for signal and grounding of the element 11 are electrically connected through the bonding wire 12.
- This wiring layer 3 is made of a metal powder such as tungsten, molybdenum, manganese, copper, silver, gold, palladium, etc., and obtained by adding a suitable organic binder or solvent to a metal powder such as tungsten and calorie mixing.
- the metal paste is applied to the ceramic green sheet that will be the insulating substrate 2 in advance by a conventional screen printing method in a predetermined pattern to form a coating from the upper surface of the insulating substrate 2 to the side surface of the insulating substrate 2 through the inside. Is done.
- connection pads 5 are formed on the outer periphery of the lower surface of the insulating base 2, and the connection pads 5 are connected to the wiring conductor of the external electric circuit board via lead-free solder.
- the eleven signal and ground electrodes are electrically connected to an external electric circuit.
- the connection pad 5 is made of a metal powder such as tungsten, molybdenum, manganese, copper, silver, gold, or rhodium, and is formed in a predetermined shape on the outer peripheral portion of the lower surface of the insulating base 2 by the same method as the wiring layer 3. It is formed.
- the insulating base 2 has a plurality of groove-like recesses 6 (usually semicircular in cross section) formed on the side surface, and a conductor 7 is attached to the inner wall surface thereof.
- the conductor on the inner wall surface of the recess 6 serves to electrically connect the wiring layer 3 and the connection pad 5.
- the conductor on the inner wall surface of the recess 6 is made of a metal powder such as tungsten, molybdenum, manganese, copper, silver, gold, or palladium, and is half-cut by punching on the side surface of the ceramic green sheet serving as the insulating base 2.
- a circular recess is formed, and a metal paste obtained by adding an appropriate organic binder or solvent to a metal powder such as tungsten is mixed and printed in a predetermined pattern in advance by a well-known screen printing method.
- the insulating substrate 2 is formed in a predetermined shape on the side surface.
- connection pad 5A located on the lower surface side of the corner of the insulating base 2 is formed with not only the recess 5a in the corner direction but also the recess 5b in the side direction,
- the corner 2A of the insulating base 2 corresponding to the connection pad 5A not only the groove-shaped recess (caster) 6a in the corner direction but also the groove-shaped recess (caster) 6b in the side direction was formed.
- the semiconductor element 11 is mounted on the electronic component mounting portion 4 on the upper surface of the insulating base 2, and the signal and ground electrodes of the semiconductor element 11 are bonded to the wiring layer 3.
- the electronic component 10 is completed as a semiconductor device of the product by connecting through the ding wire 12 and then sealing the semiconductor element 11 with the lid 13 on the upper surface of the insulating substrate 2 in an airtight manner.
- the semiconductor device 10 is mounted on the external electric circuit board 20 by joining the connection pads 5 on the outer peripheral portion of the lower surface of the insulating base 2 to the wiring conductor 21 of the external electric circuit board 20 via the solder 31. At the same time, the signal and ground electrodes of the semiconductor element 11 are electrically connected to the wiring conductor 21 of the external electric circuit board 20.
- connection pad 5A located at the corner of the insulating base 2 is formed with the recess 5b not only in the corner direction but also in the side direction and at the same time corresponding to the connection pad 5A. Since the corner 2A of the edge base 2 is formed with not only the recess 6a in the corner direction but also in the side direction, the melted solder 31 at the time of solder mounting is casted in the side direction.
- the solder fillet 32 as shown in FIG. 5 is also formed in the recess 6b by being sucked up by the location 6b.
- a mechanical stress such as a drop impact acts on the electronic device 10 and the external electric circuit board 20, and between the insulating base 2 of the electronic device 10 and the external electric circuit board 20.
- the stress is applied to the solder that joins the corner connection pad 5A and the external electric circuit board 20 mainly in the stress application direction.
- the corner direction and side direction corrections 6a, 6b and solder fillet 32 are formed on the connection pad 5A in the direction. This prevents mechanical damage to the lead-free solder bonded to the connection pad 5. This can be effectively prevented and the reliability of the connection of the electronic device 10 to the external electric circuit board 20 can be made extremely high.
- the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.
- the present invention can be modified.
- the wiring board is applied to a package for housing a semiconductor element that houses a semiconductor element, it may be applied to other uses such as a hybrid integrated circuit board.
- the insulating base material is not limited to ceramic, but may be an organic material such as glass epoxy or polyimide.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP06730802A EP1876642A1 (en) | 2005-04-25 | 2006-03-31 | Electronic component mounting board and electronic device using same |
US11/919,292 US7808104B2 (en) | 2005-04-25 | 2006-03-31 | Substrate for mounting electronic component and electronic apparatus including the substrate |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005125894A JP2006303335A (ja) | 2005-04-25 | 2005-04-25 | 電子部品搭載用基板及びそれを用いた電子装置 |
JP2005-125894 | 2005-04-25 |
Publications (1)
Publication Number | Publication Date |
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WO2006114986A1 true WO2006114986A1 (ja) | 2006-11-02 |
Family
ID=37214614
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2006/306854 WO2006114986A1 (ja) | 2005-04-25 | 2006-03-31 | 電子部品搭載用基板及びそれを用いた電子装置 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7808104B2 (ja) |
EP (1) | EP1876642A1 (ja) |
JP (1) | JP2006303335A (ja) |
KR (1) | KR20080003827A (ja) |
CN (1) | CN101167181A (ja) |
TW (1) | TW200703588A (ja) |
WO (1) | WO2006114986A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2015046571A (ja) * | 2013-08-02 | 2015-03-12 | 日本特殊陶業株式会社 | 配線基板およびその製造方法 |
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JP2009158892A (ja) * | 2007-12-28 | 2009-07-16 | Nec Corp | 多層配線基板及びその製造方法 |
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JP2010238821A (ja) * | 2009-03-30 | 2010-10-21 | Sony Corp | 多層配線基板、スタック構造センサパッケージおよびその製造方法 |
EP2447989B1 (en) * | 2009-06-22 | 2016-05-04 | Mitsubishi Electric Corporation | Semiconductor package and semiconductor package mounting structure |
CN201518316U (zh) * | 2009-08-21 | 2010-06-30 | 华为终端有限公司 | 电子模块及其封装结构 |
JP2012513128A (ja) * | 2010-04-30 | 2012-06-07 | ウエイブニクス インク. | 端子一体型金属ベースパッケージモジュールおよび金属ベースパッケージモジュールのための端子一体型パッケージ方法 |
JP5204271B2 (ja) * | 2011-06-16 | 2013-06-05 | 株式会社東芝 | 内視鏡装置および基板 |
JP2014110370A (ja) * | 2012-12-04 | 2014-06-12 | Seiko Epson Corp | ベース基板、実装構造体、モジュール、電子機器、および移動体 |
JP2014207145A (ja) * | 2013-04-12 | 2014-10-30 | タイコエレクトロニクスジャパン合同会社 | 平板状コネクタおよび隔壁実装構造 |
KR20150004118A (ko) * | 2013-07-02 | 2015-01-12 | 삼성디스플레이 주식회사 | 표시 장치용 기판, 상기 표시 장치용 기판의 제조 방법, 및 상기 표시 장치용 기판을 포함하는 표시 장치 |
EP3136430B1 (en) * | 2014-04-22 | 2021-06-16 | Kyocera Corporation | Wiring board, electronic device, and electronic module |
JP6298163B2 (ja) * | 2014-07-29 | 2018-03-20 | 京セラ株式会社 | 配線基板、電子装置および電子モジュール |
JP6501606B2 (ja) * | 2015-05-19 | 2019-04-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6342591B2 (ja) * | 2015-11-25 | 2018-06-13 | 京セラ株式会社 | 電子部品収納用パッケージ、電子装置および電子モジュール |
JP6750862B2 (ja) * | 2016-07-13 | 2020-09-02 | キヤノン株式会社 | 撮像素子およびその実装基板 |
KR20180014903A (ko) * | 2016-08-01 | 2018-02-12 | 삼성디스플레이 주식회사 | 전자 소자, 이의 실장 방법 및 이를 포함하는 표시 장치의 제조 방법 |
KR101967261B1 (ko) * | 2018-05-28 | 2019-08-13 | 테라셈 주식회사 | 이미지 센서 패키지 및 이것의 제조 방법 |
JP7062569B2 (ja) * | 2018-09-27 | 2022-05-06 | 京セラ株式会社 | 電子素子実装用基板、電子装置、および電子モジュール |
CN110176442B (zh) * | 2019-05-30 | 2021-03-02 | 苏州浪潮智能科技有限公司 | 一种防桥接的芯片引脚 |
JP2022048118A (ja) * | 2020-09-14 | 2022-03-25 | エスティーマイクロエレクトロニクス エス.アール.エル. | 信頼性及び検査能力を改善したパッケージ化半導体装置及びその製造方法 |
CN113423173B (zh) * | 2021-05-29 | 2023-09-29 | 华为技术有限公司 | 电子元件封装体、电子元件封装组件及电子设备 |
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- 2006-03-31 WO PCT/JP2006/306854 patent/WO2006114986A1/ja active Application Filing
- 2006-03-31 CN CNA2006800140439A patent/CN101167181A/zh active Pending
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- 2006-04-04 TW TW095111976A patent/TW200703588A/zh unknown
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JP2006303335A (ja) | 2006-11-02 |
US7808104B2 (en) | 2010-10-05 |
EP1876642A1 (en) | 2008-01-09 |
KR20080003827A (ko) | 2008-01-08 |
CN101167181A (zh) | 2008-04-23 |
TW200703588A (en) | 2007-01-16 |
US20090277675A1 (en) | 2009-11-12 |
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