JP4047819B2 - Bgaハンダ・ボールによる相互接続部およびその作製方法 - Google Patents
Bgaハンダ・ボールによる相互接続部およびその作製方法 Download PDFInfo
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- JP4047819B2 JP4047819B2 JP2004008547A JP2004008547A JP4047819B2 JP 4047819 B2 JP4047819 B2 JP 4047819B2 JP 2004008547 A JP2004008547 A JP 2004008547A JP 2004008547 A JP2004008547 A JP 2004008547A JP 4047819 B2 JP4047819 B2 JP 4047819B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06572—Auxiliary carrier between devices, the carrier having an electrical connection structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06589—Thermal management, e.g. cooling
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/098—Special shape of the cross-section of conductors, e.g. very thick plated conductors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/0989—Coating free areas, e.g. areas other than pads or lands free of solder resist
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3452—Solder masks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Wire Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
を構成することである。ベース部分31は、その中に画定され、導電ペーストまたはハンダ38を含む開口37を備えることが好ましく、それによって、内部回路層1の下側バンプ回路層3b上のC4バンプ6上に相互接続部40が形成される。これにより、ベース部分31の位置から水平にオフセットされ、下側バンプ回路層3bのC4搭載面とかなり異なる垂直方向に高い位置にある上面7を有する突出BGAハンダ・ボール・パッド32aが生成される。図からわかるように、各突出ハンダ・ボール・パッド32aは、互いに、かつ、外部導電層13bの主要電力面部分から分離することができる。あるいは、突出BGAハンダ・ボール・パッド32aは、外部導電層13bの主要な平面部分に隣接して延びる半島状突起物である突出部33を有することもできる。突出ハンダ・ボール・パッド32aは、突出BGAハンダ・ボール・パッド32aへの接続点において、BGAハンダ・ボール39の占有面積よりも狭い幅を有する。これにより、BGAハンダ・ボール39を、突出BGAハンダ・ボール・パッド32aの垂直導電壁36ならびに上面7にリフローさせることができ、それによって、相互接続部40の強度が増加し、パッケージ・ボード間のBGAハンダ・ボール39による相互接続部40の信頼性が高くなる。当然、上記で述べた突出部33の構成では、突出部33の側面および端部の周りに垂直導電壁36が存在する。600ミクロンのBGAハンダ・ボール39の場合、BGAハンダ・ボール39の部位で、突出部33の幅を100〜400ミクロンの範囲にすると有利である。
potting material)を使用することによって、底部基板61に集積回路チップを熱的に接触させることもできる。これにより、熱伝導経路を追加することができ、それによって、集積回路チップ25bを冷却する上での難点が軽減される。
側外部導電層13bをフォトリソグラフィによりエッチングすることによって、突出BGAハンダ・ボール・パッド32aおよび32bを製作することができる。もちろん、粘着物をプラズマ・エッチングしてバンプ6の上面16を露出させる際に、エッチングで除去されることが望まれない絶縁粘着層14aおよび14bの領域(たとえば、各突出BGAハンダ・ボール・パッド32aまたは32b間の領域)を保護するために、フォトレジストおよび画像形成ステップを追加して用いることが好ましいであろう。しかし、このステップに必要な重ね合わせの精度は、比較的厳しくない。したがって、この追加のステップは、歩留まりを大きく減少させないはずである。
2 中間絶縁層
3a、3b バンプ回路層
6 バンプ
7 上面
13a、13b 外部導電層
14a、14b 絶縁粘着層
16 上面
25a、25b 集積回路チップ
31 ベース部分
32a、32b BGAハンダ・ボール・パッド
33 突出部
34a、34b チップ・ウィンドウ
36 垂直導電壁
37 開口
38 ハンダ、導電ペースト
39 BGAハンダ・ボール
40 相互接続部
65 ハンダ・マスク層
66 ウィンドウ
100 積層回路アセンブリ
Claims (6)
- 内部回路層、絶縁層および外部導電層を有する積層回路アセンブリの外部導電層へのBGAハンダ・ボールによる相互接続部であって、
前記外部導電層とほぼ同じ平面にあり、75ミクロンよりも高い垂直導電壁を有する突出部を有する、突出BGAハンダ・ボール・パッドと、
前記突出部に粘着するBGAハンダ・ボールとを備え、
前記BGAハンダ・ボールの平均直径が、前記突出部の幅よりも大きい、
BGAハンダ・ボールによる相互接続部。 - 前記外部導電層の一部をフォトリソグラフィでエッチング除去することによって前記突出BGAハンダ・ボール・パッドを形成する、請求項1に記載のBGAハンダ・ボールによる相互接続部。
- 前記突出BGAハンダ・ボール・パッドが広がったベース部分を有し、前記突出部が前記広がったベース部分から水平方向に延びる、請求項1に記載のBGAハンダ・ボールによる相互接続部。
- 前記ベース部分が、その中に画定された開口を有し、前記開口が、前記内部回路層に前記突出BGAハンダ・ボール・パッドを電気的に接続するハンダまたは導電ペーストを含む、請求項3に記載のBGAハンダ・ボールによる相互接続部。
- 前記外部導電層の上にハンダ・マスク層をさらに備え、前記ハンダ・マスク層が、その中に画定され、前記突出BGAハンダ・ボール・パッドの前記突出部の少なくとも一部を露出させるウィンドウを有し、前記BGAハンダ・ボールが前記突出部に粘着する、請求項1に記載のBGAハンダ・ボールによる相互接続部。
- 内部回路層を覆う絶縁層の上で少なくとも75ミクロンの厚さを有する外部導電層を積層化して積層回路アセンブリを形成するステップと、
前記外部導電層のある領域の周りで前記外部導電層の一部を選択的に除去して、少なくとも75ミクロンの高さで、複数の垂直導電壁を有する突出BGAハンダ・ボール・パッドを画定するステップと、
前記突出BGAハンダ・ボール・パッドの前記垂直導電壁を含む部分に前記突出BGAハンダ・ボール・パッドの幅よりも大きい平均直径を有するBGAハンダ・ボールを粘着させるステップとを含む、積層回路アセンブリの外部導電層へのBGAハンダ・ボールによる相互接続部を作製する方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/346,277 US7253510B2 (en) | 2003-01-16 | 2003-01-16 | Ball grid array package construction with raised solder ball pads |
Publications (2)
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JP2004221600A JP2004221600A (ja) | 2004-08-05 |
JP4047819B2 true JP4047819B2 (ja) | 2008-02-13 |
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JP (1) | JP4047819B2 (ja) |
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2003
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2004
- 2004-01-15 JP JP2004008547A patent/JP4047819B2/ja not_active Expired - Fee Related
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US20100308460A1 (en) | 2010-12-09 |
US20070228566A1 (en) | 2007-10-04 |
US7253510B2 (en) | 2007-08-07 |
US7816754B2 (en) | 2010-10-19 |
US8153516B2 (en) | 2012-04-10 |
JP2004221600A (ja) | 2004-08-05 |
US20040141298A1 (en) | 2004-07-22 |
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