JP2717661B2 - Method of forming insulating film - Google Patents
Method of forming insulating filmInfo
- Publication number
- JP2717661B2 JP2717661B2 JP63125510A JP12551088A JP2717661B2 JP 2717661 B2 JP2717661 B2 JP 2717661B2 JP 63125510 A JP63125510 A JP 63125510A JP 12551088 A JP12551088 A JP 12551088A JP 2717661 B2 JP2717661 B2 JP 2717661B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- polysilicon
- oxide film
- insulating film
- silicon nitride
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Local Oxidation Of Silicon (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Non-Volatile Memory (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、高性能・高信頼性を持ったポリシリコン上
の絶縁膜を必要とする半導体装置、例えばポリシリコン
２層構造の半導体不揮発性メモリに関する。The present invention relates to a semiconductor device requiring an insulating film on polysilicon having high performance and high reliability, for example, a semiconductor nonvolatile semiconductor device having a polysilicon two-layer structure. Regarding memory.
本発明は、ポリシリコン上にSiH2cl2とN2Oの高温化学
気相成長（CVD）法により酸化膜（以下、HTO膜（HIGH T
EMPERATURE THIN OXIDE）とよぶ）を堆積した後、このH
TO膜を高温アンモニアガス雰囲気中でアニールし、熱窒
化シリコン酸化膜を形成させた。さらにこのHTO膜上の
熱窒化シリコン酸化膜を熱酸化することによりポリシリ
コンのアスペリティの発生を防ぎ、加えて熱酸化シリコ
ン酸化膜を利用することにより高膜質・高信頼性をもつ
ポリシリコン上の絶縁膜の形成を可能としたものであ
る。The present invention provides an oxide film (hereinafter referred to as HTO film (HIGH T) film on polysilicon by a high temperature chemical vapor deposition (CVD) method of SiH 2 cl 2 and N 2 O.
EMPERATURE THIN OXIDE))
The TO film was annealed in a high temperature ammonia gas atmosphere to form a thermal silicon nitride oxide film. Furthermore, the thermal silicon nitride oxide film on the HTO film is thermally oxidized to prevent the occurrence of polysilicon asperities. In addition, by using the thermal silicon oxide film, a high-quality and highly reliable polysilicon This enables formation of an insulating film.
第２図は従来の技術を用いて作成されたポリシリコン
２層構造を持つ半導体不揮発性メモリセル断面構造図で
ある。このメモリセルでは半導体基板１の表面近傍に形
成されたソース領域２とドレイン領域３間のチャンネル
領域上に薄いゲート絶縁膜４（消火用酸化膜）が形成さ
れており、１層目のポリシリコン電極５と２層のポリシ
リコン電極９の間に熱酸化により形成するポリシリコン
酸化膜10をキャパシタとして使用している。このポリシ
リコン酸化膜は高温で形成した方が良い膜質が得られる
といわれており、従来は1000℃以上の高温雰囲気で酸化
が行われてきた。FIG. 2 is a cross-sectional view of a semiconductor nonvolatile memory cell having a polysilicon two-layer structure formed using a conventional technique. In this memory cell, a thin gate insulating film 4 (fire-extinguishing oxide film) is formed on a channel region between a source region 2 and a drain region 3 formed near the surface of a semiconductor substrate 1, and a first polysilicon layer is formed. A polysilicon oxide film 10 formed by thermal oxidation between the electrode 5 and the two-layer polysilicon electrode 9 is used as a capacitor. It is said that a better film quality can be obtained by forming this polysilicon oxide film at a high temperature. Conventionally, oxidation has been performed in a high-temperature atmosphere of 1000 ° C. or higher.
しかし、1000℃以上の高温雰囲気でポリシリコンの酸
化を行う場合、ポリシリコンのアスペリティが発生し、
特にポリシリコンのコーナー部分の絶縁膜の膜厚が薄く
なり、その部分で絶縁膜の絶縁破壊が起こりやすいとい
う欠点があった。However, when oxidizing polysilicon in a high temperature atmosphere of 1000 ° C. or more, asperity of polysilicon occurs,
In particular, there is a disadvantage that the thickness of the insulating film in the corner portion of the polysilicon becomes thin, and dielectric breakdown of the insulating film easily occurs in that portion.
以上の課題を解決するために、本発明では、ポリシリ
コン上にHTO膜を堆積後、このHTO膜を高温アンモニアガ
ス雰囲気中にてアニールを行って熱窒化シリコン酸化膜
を形成し、さらにこの熱窒化シリコン酸化膜を熱酸化し
た。In order to solve the above problems, according to the present invention, after depositing an HTO film on polysilicon, the HTO film is annealed in a high-temperature ammonia gas atmosphere to form a thermal silicon nitride oxide film. The silicon nitride oxide film was thermally oxidized.
上記のごとくポリシリコン上の絶縁膜を形成する場
合、HTO膜はCVD膜であるのでポリシリコンのアスペリテ
ィを発生させない。さらに熱窒化シリコン酸化膜を形成
することにより、CVD膜であるがゆえに熱酸化膜より界
面状態が不安定なHTO膜の界面状態を改善される。また
熱窒化シリコン酸化膜を酸化することにより、窒化膜に
特有な界面にトラップが多いという欠点を軽減できる。When an insulating film is formed on polysilicon as described above, the HTO film is a CVD film and does not cause asperity of polysilicon. Further, by forming the thermal silicon nitride oxide film, the interface state of the HTO film, whose interface state is more unstable than the thermal oxide film because of the CVD film, is improved. In addition, by oxidizing the thermal silicon nitride oxide film, the defect that there are many traps at the interface unique to the nitride film can be reduced.
以下に、本発明の実施例を図面に基づいて詳細に説明
する。第１図は本発明の技術を用いて作成したポリシリ
コン２層構造を持つ半導体不揮発性メモリセル断面構造
図である。このメモリセルでは半導体基板１の表面近傍
に形成されたソース領域２とドレイン領域３間のチャン
ネル領域上に薄いゲート絶縁膜４（消去用酸化膜）が形
成されている。さらにその上の１層目ポリシリコン電極
５上にCVD法によりHTO膜６を堆積したのち、このHTO膜
を高温アンモニアガス雰囲気中でアニールし、熱窒化シ
リコン酸化膜７を形成させた。さらにHTO膜上の熱窒化
シリコン酸化膜を熱酸化し、薄い酸化膜８を形成する。
そしてその上に２層目ポリシリコン電極９が堆積してあ
る。Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a cross-sectional view of a semiconductor nonvolatile memory cell having a two-layered polysilicon structure formed by using the technique of the present invention. In this memory cell, a thin gate insulating film 4 (erase oxide film) is formed on a channel region between a source region 2 and a drain region 3 formed near the surface of a semiconductor substrate 1. After an HTO film 6 was deposited on the first-layer polysilicon electrode 5 thereon by a CVD method, the HTO film was annealed in a high-temperature ammonia gas atmosphere to form a thermal silicon nitride oxide film 7. Further, the thermal silicon nitride oxide film on the HTO film is thermally oxidized to form a thin oxide film 8.
Then, a second-layer polysilicon electrode 9 is deposited thereon.
以上のようなポリシリコン上の絶縁膜の形成法で１層
目ポリシリコン上の絶縁膜を形成する場合、HTO膜はCVD
膜であるのでポリシリコンのアスペリティを発生させな
いので、ポリシリコンのコーナー部分の絶縁膜の膜厚が
薄くなり、その部分で絶縁膜の絶縁破壊が起こりやすい
という欠点が起こらない。さらにCVD膜であるがゆえに
熱酸化膜よりポリシリコンとの界面状態が不安定なHTO
膜を熱窒化シリコン酸化膜を形成することにより界面状
態を改善した。また熱窒化シリコン酸化膜を酸化するこ
とにより、窒化膜に特有な界面にトラップが多いという
欠点を軽減した。When an insulating film on the first polysilicon layer is formed by the above method for forming an insulating film on polysilicon, the HTO film is formed by CVD.
Since it is a film, asperity of polysilicon is not generated, so that the thickness of the insulating film at the corner portion of the polysilicon is reduced, and there is no drawback that the insulating film is apt to undergo dielectric breakdown at that portion. In addition, HTO has a more unstable interface with polysilicon than a thermal oxide film because it is a CVD film
The interface state was improved by forming a thermal silicon nitride oxide film. Further, by oxidizing the thermal silicon nitride oxide film, the defect that many traps are present at the interface unique to the nitride film is reduced.
本発明は、以上説明したように、ポリシリコン上にCV
D法によりHTO膜を堆積した後、高温アンモニアガス雰囲
気中でアニールし熱窒化シリコン酸化膜を形成させた。
さらにこのHTO膜上の熱窒化シリコン酸化膜を熱酸化し
た。以上の一連の工程によりポリシリコンのアスペリテ
ィの発生を防ぎ、加えて熱窒化シリコン酸化膜を利用す
ることにより高膜質・高信頼性をもつポリシリコン上の
絶縁膜の形成を可能とした。As described above, the present invention uses CV on polysilicon.
After depositing an HTO film by method D, annealing was performed in a high-temperature ammonia gas atmosphere to form a thermal silicon nitride oxide film.
Furthermore, the thermally oxidized silicon nitride film on the HTO film was thermally oxidized. Through the above series of steps, asperity of polysilicon is prevented from being generated, and the use of a thermal silicon nitride oxide film enables formation of an insulating film on polysilicon having high film quality and high reliability.
第１図は本発明の技術を用いて作成したポリシリコン２
層構造を持つ半導体不揮発性メモリセル断面構造図であ
る。 第２図は従来の技術で作成されたポリシリコン２層構造
を持つ半導体不揮発性メモリセル断面構造図である。 １……半導体基板 ２……ソース領域 ３……ドレイン領域 ４……ゲート絶縁膜（消去用酸化膜） ５……１層目ポリシリコン電極 ６……CVD法によるHTO膜 ７……熱窒化シリコン酸化膜 ８……薄い酸化膜 ９……２層目ポリシリコン電極 10……ポリシリコン酸化膜FIG. 1 shows a polysilicon 2 formed using the technique of the present invention.
FIG. 3 is a sectional view of a semiconductor nonvolatile memory cell having a layer structure. FIG. 2 is a cross-sectional view of a semiconductor nonvolatile memory cell having a polysilicon two-layer structure formed by a conventional technique. DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate 2 ... Source region 3 ... Drain region 4 ... Gate insulating film (erase oxide film) 5 ... First layer polysilicon electrode 6 ... HTO film by CVD method 7 ... Silicon thermal nitride Oxide film 8 ... Thin oxide film 9 ... Second layer polysilicon electrode 10 ... Polysilicon oxide film
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０１Ｌ 29/788 29/792 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 6 Identification code Agency reference number FI Technical indication H01L 29/788 29/792
Claims (1)
シリコン酸化膜をゲート絶縁膜上に形成されたポリシリ
コン電極上に堆積する工程と、 前記シリコン酸化膜を高温アンモニアガス雰囲気中でア
ニールし、熱窒化シリコン酸化膜を形成する工程と、 前記熱窒化シリコン酸化膜を熱酸化し、薄い酸化膜をさ
らに形成する一連の工程とからなる絶縁膜の形成方法。A step of depositing a silicon oxide film on a polysilicon electrode formed on a gate insulating film by high temperature chemical vapor deposition of SiH 2 Cl 2 and N 2 O; A method for forming an insulating film, comprising: annealing in a gas atmosphere to form a thermal silicon nitride oxide film; and thermally oxidizing the thermal silicon nitride oxide film to further form a thin oxide film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63125510A JP2717661B2 (en) | 1988-05-23 | 1988-05-23 | Method of forming insulating film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63125510A JP2717661B2 (en) | 1988-05-23 | 1988-05-23 | Method of forming insulating film |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01293631A JPH01293631A (en) | 1989-11-27 |
| JP2717661B2 true JP2717661B2 (en) | 1998-02-18 |
Family
ID=14911918
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63125510A Expired - Lifetime JP2717661B2 (en) | 1988-05-23 | 1988-05-23 | Method of forming insulating film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2717661B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01315141A (en) * | 1988-06-15 | 1989-12-20 | Toshiba Corp | Manufacture of semiconductor device |
-
1988
- 1988-05-23 JP JP63125510A patent/JP2717661B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH01293631A (en) | 1989-11-27 |
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