JP2610036B2 - Circuit board - Google Patents
Circuit boardInfo
- Publication number
- JP2610036B2 JP2610036B2 JP63184063A JP18406388A JP2610036B2 JP 2610036 B2 JP2610036 B2 JP 2610036B2 JP 63184063 A JP63184063 A JP 63184063A JP 18406388 A JP18406388 A JP 18406388A JP 2610036 B2 JP2610036 B2 JP 2610036B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- insulating substrate
- conductive
- conductive paint
- diameter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、絶縁基板の両面に形成される回路パター
ンと、その両面の回路パターンの電気的導通を図る導電
スルーホールとを有する回路基板に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board having circuit patterns formed on both surfaces of an insulating substrate and conductive through holes for electrically connecting the circuit patterns on both surfaces. .
従来、スルーホール回路基板の導電スルーホールは、
絶縁基板にパンチングによって透孔を形成し、この透孔
に導電塗料を印刷によって複数回塗布して回路基板両面
の回路パターンの導通を図っていた（実公昭55−44398
号、以下従来例（イ）と称す）。又、導電スルーホール
の信頼性向上のために、基板の透孔に基板の表裏両面側
から表裏一対のスキージーで導電ペイントを圧入する方
法（特開昭58−91696号、以下従来例（ロ）と称す）
や、基板の透孔に導電ペイントを複数回塗り重ねる方法
（特開昭58−74097号、以下従来例（ハ）と称す）、あ
るいは基板の透孔にスクリーン印刷の手法を用いて導電
ペイントを塗布する際、基板の透孔に対応するマスク孔
に段差のあるスクリーンを用いる方法（特開昭57−1120
96号、以下従来例（ニ）と称す）等もあった。Conventionally, the conductive through-hole of the through-hole circuit board is
A through hole is formed in the insulating substrate by punching, and a conductive paint is applied to the through hole a plurality of times by printing to achieve conduction of the circuit patterns on both sides of the circuit board (Jpn.
(Hereinafter referred to as conventional example (a)). Also, in order to improve the reliability of the conductive through-hole, a method of press-fitting conductive paint into the through-hole of the substrate from both the front and back sides of the substrate with a pair of squeegees (Japanese Patent Application Laid-Open No. 58-91696; Is called)
A method of applying conductive paint to the through-hole of the substrate a plurality of times (Japanese Patent Application Laid-Open No. 58-74097, hereinafter referred to as a conventional example (c)), or applying a conductive paint to the through-hole of the substrate using screen printing. When applying, a method using a screen having a step in a mask hole corresponding to a through hole of a substrate (Japanese Patent Laid-Open No. 57-1120)
No. 96, hereinafter referred to as Conventional Example (d)).
上記従来例（イ）の印刷による導電スルーホールの形
成は上記公報に開示されているように、複数回の塗布及
び硬化を重ねないと信頼性の高いものができなかった。
しかも、複数回の印刷による印刷ズレによって、導電ス
ルーホールの小径化も図れず、工数や材料コストが増大
するという欠点がある。さらに、複数回の印刷によって
導電塗料同士の層間に気泡が入ったり、印刷ムラが生じ
たりして、強度的に弱い個所ができてクラックが入りや
すくなる欠点がある。また、複数回の印刷によって、導
電塗料の飛散により回路間のショートを生ずる機会も増
大し、歩留りも悪くなる。特に、透孔が小さい場合導電
塗料が透孔内に入りにくく、導電層の薄い部分が生じや
すく、断線の可能性も増大してしまう。As disclosed in the above publication, the formation of the conductive through-hole by printing of the above-mentioned conventional example (a) cannot be performed with high reliability unless coating and curing are repeated a plurality of times.
In addition, there is a disadvantage that the diameter of the conductive through hole cannot be reduced due to printing misregistration caused by printing a plurality of times, and the number of steps and material costs increase. Further, there is a drawback that a plurality of times of printing causes bubbles to enter between layers between the conductive paints, causes printing unevenness, causes weak spots in strength, and easily causes cracks. In addition, by printing a plurality of times, the chance of short-circuiting between circuits due to scattering of the conductive paint increases, and the yield decreases. In particular, when the through-hole is small, the conductive paint does not easily enter the through-hole, a thin portion of the conductive layer is easily generated, and the possibility of disconnection increases.
従来例（ロ）では、透孔以外の箇所に付着した導電ペ
イントを後から除去する必要があった。In the conventional example (b), it is necessary to remove the conductive paint adhered to a portion other than the through hole later.
従来例（ハ）では、従来例（イ）と同様の欠点があ
り、従来例（ニ）では、スクリーンのマスク孔に段差を
形成するのに手数がかかっていた。The conventional example (c) has the same defects as the conventional example (a), and in the conventional example (d), it takes time and effort to form a step in the mask hole of the screen.
この発明は上述の従来の技術に鑑みて成されたもの
で、導通不良等がなく高密度実装が可能であり、製造も
容易で歩留りの高い回路基板を提供することを目的とす
る。The present invention has been made in view of the above-described conventional technology, and has as its object to provide a circuit board that can be mounted at high density without conduction failure or the like, is easy to manufacture, and has a high yield.
この発明は、絶縁基板を貫通する透孔が、その両端開
口部の内径が異なり、両開口部のうち径の小さい方の開
口部近傍に透孔内壁面が膨出して内径の狭くなった小径
部を有したつづみ状を呈し、この透孔内から透孔開口部
の外側にわたって導電塗料が塗布硬化して成る導電スル
ーホールを設けたことを特徴とする回路基板である。The present invention is directed to a small-diameter hole in which the through-hole penetrating the insulating substrate has different inner diameters at both end openings, and the inner wall surface of the through-hole swells near the smaller-diameter opening of the two openings to reduce the inner diameter. A circuit board having a conical shape having a portion, and a conductive through-hole formed by applying and curing a conductive paint from inside the through-hole to outside of the through-hole opening.
又、この発明は、絶縁基板の両面に回路パターンが形
成され、この回路パターンの一端部に上記絶縁基板をは
さんで互いに対向してランドが設けられ、このランドの
中央にくり抜きが形成され、このくり抜き部の直径より
小さい内径の透孔が上記くり抜き部が位置する絶縁基板
にくり抜き部との間にすき間を設けて形成されていると
共に、この透孔は、その内径が絶縁基板の両面の開口部
で異なっており、内径の小さい方の開口部近くの透孔内
壁面に膨出して径がさらに小さくなった小径部を有した
つづみ状を呈するものであって、この透孔内及び絶縁基
板両面のランドに導電塗料を塗布硬化して成る導電スル
ーホールを備えた回路基板である。Further, according to the present invention, a circuit pattern is formed on both sides of the insulating substrate, lands are provided at one end of the circuit pattern so as to face each other with the insulating substrate interposed therebetween, and a hollow is formed at the center of the land. A through hole having an inner diameter smaller than the diameter of the hollow portion is formed by providing a gap between the hollow portion and the insulating substrate where the hollow portion is located, and the through hole has an inner diameter of both sides of the insulating substrate. The openings are different, and have a conical shape having a small-diameter portion whose diameter is further reduced by swelling on the inner wall surface of the through-hole near the opening having a smaller inner diameter. This is a circuit board having conductive through holes formed by applying and curing a conductive paint on lands on both surfaces of an insulating substrate.
この発明の回路基板は、絶縁基板と導電塗料との接合
力が強くクラック等が入りにくいものであり、透孔の径
が小さくても導電塗料を塗布しやすいようにしたもので
ある。The circuit board of the present invention has a strong bonding force between the insulating substrate and the conductive paint and is unlikely to crack, etc., and is easy to apply the conductive paint even if the diameter of the through hole is small.
以下この発明の一実施例について図面に基づいて説明
する。An embodiment of the present invention will be described below with reference to the drawings.
第１図、第２図はこの実施例のスルーホール回路基板
の部分断面図であり、絶縁基板１の両面に銅箔による回
路パターン２が形成されており、この回路パターン２の
一端部はランド３になっている。このランド３は、その
中央部がくり抜かれてドーナツ状になっており、このく
り抜き部3aの直径は、絶縁基板１の各面でわずかに異な
っておりここでは図中の直径D1,D2はD1＜D2となってい
る。このくり抜き部3a内の絶縁基板１は、打ち抜かれて
透孔４が形成されている。この透孔４はランド３のくり
抜き部3aの直径D1,D2より小さい内径に打ち抜かれてお
り、その内径は、一方の開口部4aの内径d1と他方の開口
部4bの内径d2の関係がd1＜d2となっており、さらに基板
内部の内径は開口部4aに近い方の内径が徐々に小さくな
るように壁面が膨出して小径部4cを形成しており、従っ
てこの小径部4cの内径d3はd3＜d1となっている。FIGS. 1 and 2 are partial cross-sectional views of a through-hole circuit board of this embodiment. A circuit pattern 2 made of copper foil is formed on both sides of an insulating substrate 1, and one end of the circuit pattern 2 is a land. It is 3. The center of the land 3 is hollowed out to form a donut. The diameter of the hollowed portion 3a is slightly different on each surface of the insulating substrate 1. Here, the diameters D1 and D2 in the figure are D1 and D2. <D2. The insulating substrate 1 in the hollow portion 3a is punched to form a through hole 4. The through hole 4 is punched to have an inner diameter smaller than the diameters D1 and D2 of the hollow portion 3a of the land 3, and the inner diameter is defined by the relationship between the inner diameter d1 of one opening 4a and the inner diameter d2 of the other opening 4b. <D2, and the inside diameter of the inside of the substrate further forms a small diameter portion 4c by bulging the wall so that the inside diameter closer to the opening 4a gradually decreases. Is d3 <d1.
この透孔４には、銀、銅、ニッケル、カーボン等を熱
硬化性樹脂又は紫外線硬化性樹脂中に含んだ導電塗料５
が塗布されており、この導電塗料５は、絶縁基板１両面
のランド３に接続して設けられ導電スルーホール６を形
成している。導電塗料５は、その粘度や透孔４の内径に
よって第１図に示すように透孔４を塞いでしまう場合
や、第２図に示すように孔ができる場合があり、一般に
粘度は10ポイズから60ポイズ程度が好ましく、電気的性
能も良好である。A conductive paint 5 containing silver, copper, nickel, carbon, or the like in a thermosetting resin or an ultraviolet curable resin is provided in the through hole 4.
The conductive paint 5 is provided so as to be connected to the lands 3 on both surfaces of the insulating substrate 1 to form a conductive through hole 6. The conductive paint 5 may block the through-hole 4 as shown in FIG. 1 or may have a hole as shown in FIG. 2 depending on its viscosity or the inner diameter of the through-hole 4, and generally has a viscosity of 10 poise. To about 60 poise, and good electrical performance.
以上の構成の導電スルーホール６を有するスルーホー
ル回路基板を得る製造工程について、第３図（Ａ）ない
し（Ｆ）に基づいて説明する。A manufacturing process for obtaining a through-hole circuit board having the conductive through-holes 6 having the above configuration will be described with reference to FIGS. 3 (A) to 3 (F).
第３図（Ａ）に示すように、絶縁基板１に回路パター
ン２及びランド３を形成し、ランド３のくり抜き部3aの
うち径の大きい方を下側にし、第３図（Ｂ）に示すよう
にプレス加工機にセットする。プレス加工機のポンチ７
は上側のランド３の上方に位置し、ダイス８が下側の径
の大きいくり抜き部3aを有するランド３の下に位置す
る。As shown in FIG. 3 (A), the circuit pattern 2 and the land 3 are formed on the insulating substrate 1, and the larger diameter of the hollow portion 3a of the land 3 is set to the lower side, as shown in FIG. 3 (B). To the press machine as shown. Punch of press machine 7
Is located above the upper land 3 and the die 8 is located below the land 3 having the lower large-diameter cutout 3a.
この後、ポンチ７を作動させ、ランド３のくり抜き部
3aの内側を打ち抜く。この際、第３図（Ｃ）及び第１図
に示すように、ポンチ７とダイス８との間にクリアラン
スをとるため、開口部4aの直径d1より開口部4bの直径d2
の方が大きくなる。また、打ち抜いた後、透孔４の内壁
面はわずかに盛り上がって小径部4cを形成する。この小
径部4cは、せん断当初の絶縁基板１の表面近傍の組織の
すべりがせん断方向に対しＶ字状に斜めに発生し、せん
断の進行に伴ってポンチ７の径より小さい部分が外側に
押しやられ、打ち抜きが終了するとこの押しやられた部
分がわずかに膨出することによって生じるものであり、
透孔の内径が小さい場合に顕著に現れる。Thereafter, the punch 7 is operated, and the hollow portion of the land 3 is cut out.
Punch the inside of 3a. At this time, as shown in FIG. 3 (C) and FIG. 1, in order to provide a clearance between the punch 7 and the die 8, the diameter d1 of the opening 4b is smaller than the diameter d1 of the opening 4b.
Is larger. After punching, the inner wall surface of the through hole 4 is slightly raised to form the small diameter portion 4c. In the small diameter portion 4c, the slip of the tissue near the surface of the insulating substrate 1 at the beginning of the shearing occurs in a V-shape with respect to the shearing direction, and a portion smaller than the diameter of the punch 7 is pushed outward with the progress of the shearing. It is caused by the fact that this pressed part swells slightly when the punching is completed,
Appears remarkably when the inner diameter of the through hole is small.
次に、この絶縁基板１の透孔４に導電塗料５を塗布す
る。この際、第３図（Ｄ）に示すように、導電塗料５
は、ポンチ７で打ち抜いた方向と逆の方向から塗り込ま
れる。この導電塗料５の塗布は、透孔４の大径の開口部
4b側の表面にスクリーン９を載せ、位置合わせをし、そ
の上から導電塗料５をゴム等の弾性のあるスキージ10で
かき取りながら一回の操作によりスクリーン９の透過部
9aから透孔４内に導電塗料５を塗り込む。この際、スキ
ージ10は図示するように絶縁基板１に押しつけて、スク
リーン９との角度が先端部で小さくなるようにし、塗り
込む圧力が高くなるようにする。すると、第３図（Ｅ）
に示すように、導電塗料５は透孔４内を通って反対側の
開口部4aでわずかに広がり、ちょうどランド３と接続す
る。この際、導電塗料がランド３にまで広がるように、
基台11には逃げ部12が形成されている。この基台11の形
状は適宜変更できる。Next, a conductive paint 5 is applied to the through holes 4 of the insulating substrate 1. At this time, as shown in FIG.
Is applied from the direction opposite to the direction punched by the punch 7. This conductive paint 5 is applied to the large-diameter opening of the through hole 4.
The screen 9 is placed on the surface on the 4b side, the positioning is performed, and the conductive paint 5 is scraped off with an elastic squeegee 10 such as a rubber while performing a single operation to remove the conductive paint 5 from the screen.
The conductive paint 5 is applied into the through holes 4 from 9a. At this time, the squeegee 10 is pressed against the insulating substrate 1 as shown in the drawing, so that the angle with the screen 9 is reduced at the tip end, and the pressure for application is increased. Then, FIG. 3 (E)
As shown in FIG. 5, the conductive paint 5 spreads slightly through the through hole 4 at the opening 4a on the opposite side, and just connects to the land 3. At this time, so that the conductive paint spreads to the land 3,
An escape portion 12 is formed in the base 11. The shape of the base 11 can be appropriately changed.
最後に、導電塗料５を加熱または紫外線により硬化さ
せ導電スルーホール６が完成する。Finally, the conductive paint 5 is cured by heating or ultraviolet rays, and the conductive through hole 6 is completed.
この実施例の導電スルーホール６は、近年の高密度実
装化の要請により、透孔４の径を第１図のd2の径で2d＝
0.8mm位に設定しており、d1はd2より５ないし10％程度
小さく設定している。そして、ランド３のくり抜き部3a
と透孔４とのすき間ｘは0.05mmないし0.3mmに設定す
る。このように設定すると、従来のように内径が1.5mm
程度の透孔では見られなかった透孔４内での盛り上がり
が顕著になり、ポンチ７とダイス８とのクリアランスを
適度に設定することにより、図示するように透孔４に丸
みが生じ、透孔４の開口部4a,4bでの角部にも丸みが生
じる。これによって、絶縁基板１が加熱乾燥によって収
縮しても角部で導電塗料にクラックが入ったりすること
がなくなる。The conductive through hole 6 of this embodiment has a diameter 2d = 2d = diameter d2 in FIG.
It is set to about 0.8 mm, and d1 is set to be about 5 to 10% smaller than d2. And the hollow part 3a of the land 3
The gap x between the hole and the through hole 4 is set to 0.05 mm to 0.3 mm. With this setting, the inner diameter is 1.5 mm
The swelling in the through-hole 4 which was not seen with the through-hole of a certain degree becomes remarkable, and by appropriately setting the clearance between the punch 7 and the die 8, the through-hole 4 is rounded as shown in FIG. The corners at the openings 4a and 4b of the hole 4 are also rounded. Thereby, even if the insulating substrate 1 shrinks by heating and drying, cracks do not occur in the conductive paint at the corners.
また、前記製造工程においては、導電塗料５をスクリ
ーン９を介して透孔４に一回の操作で塗り込むだけなの
で、簡単に塗布することができる。しかも、打ち抜き方
向とは逆の方向から塗り込むので、透孔４の開口部のう
ち大きい方から導電塗料が流れ込み、小径部4cで導電塗
料に圧力が加わることになり粗面である透孔４に非常に
スムーズに且つすきまなく導電塗料が充満する。特に従
来のように、ピンを挿入して塗布できないような小さい
透孔でも、確実に塗布が可能である。Further, in the manufacturing process, since the conductive paint 5 is only applied to the through-hole 4 through the screen 9 in one operation, the conductive paint 5 can be easily applied. Moreover, since the paint is applied from the direction opposite to the punching direction, the conductive paint flows from the larger one of the openings of the through holes 4, and pressure is applied to the conductive paint at the small-diameter portion 4 c, so that the rough through holes 4 are formed. Is filled with conductive paint very smoothly and without gaps. In particular, even in a small through-hole which cannot be applied by inserting a pin as in the related art, the application can be reliably performed.
また、本発明による回路基板は、第４図と第５図
（Ｂ）に示すように、片面の回路パターン21のランド31
が導電スルーホール６の口縁部分の導電塗料５の上部及
び外側に重ねて印刷形成されたものであってもよい。Further, as shown in FIGS. 4 and 5B, the circuit board according to the present invention has a land 31 of the circuit pattern 21 on one side.
May be formed by printing over and above the conductive paint 5 at the edge of the conductive through hole 6.
また、その製造に際しては、第５図に示すように、絶
縁基板１の片面にのみ回路パターン22を形成し、そのラ
ンド32と一緒に絶縁基板１を打ち抜いてくり抜き部3aと
つづみ状の透孔４を同時に形成し、それから前述の方法
と同様にして導電塗料５の塗り込みと硬化を行ない、そ
の後絶縁基板１のまだ回路パターンが形成されていない
面に、ランド31が導電塗料５の上に重なるようにして回
路パターン21を印刷形成する場合もある。ここで、透孔
４の穿設前に形成する回路パターン22は絶縁基板１のい
ずれの面にあっても良い。At the time of manufacturing, as shown in FIG. 5, a circuit pattern 22 is formed only on one surface of the insulating substrate 1, and the insulating substrate 1 is punched out together with its land 32 to form a cut-out portion 3a and a continuous transparent shape. The holes 4 are simultaneously formed, and then the conductive paint 5 is applied and cured in the same manner as described above. Then, the land 31 is formed on the conductive paint 5 on the surface of the insulating substrate 1 where the circuit pattern has not been formed yet. In some cases, the circuit pattern 21 is printed and formed so as to overlap the pattern. Here, the circuit pattern 22 formed before the formation of the through hole 4 may be on any surface of the insulating substrate 1.
さらに、第６図に示すように、絶縁基板１の両面に回
路パターン２を形成し、絶縁基板１を介して相対するラ
ンド３のくり抜き部3aを透孔４の穿設時に併せて形成
し、その後前述の方法と同様に透孔４の大径開口部4b側
から導電塗料を塗り込み、そして硬化処理を行なう方法
も可能である。Further, as shown in FIG. 6, circuit patterns 2 are formed on both surfaces of the insulating substrate 1, and the hollow portions 3a of the lands 3 opposed to each other via the insulating substrate 1 are also formed when the through holes 4 are formed. Thereafter, similarly to the above-described method, a method of applying a conductive paint from the large-diameter opening 4b side of the through hole 4 and performing a curing treatment is also possible.
上記二例の製造工程においてはランド３のくり抜き部
3aを透孔４の穿設時に併せて形成するものであるから、
予めくり抜き部3aを形成する工程が省略出来る。In the manufacturing process of the above two examples, the hollow portion of the land 3
3a is also formed when the through hole 4 is formed.
The step of forming the hollow portion 3a in advance can be omitted.
尚、この発明の回路パターンは、銅箔ばかりでなく、
導電塗料を印刷した回路パターンでも良いし、また従来
行なわれている他の方法により形成したものでも良い。
さらに、導電塗料の材料も任意に設定し得るものであ
り、粘度や塗布の際のスキージの角度や速さも透孔の径
等に合わせて適宜設定すれば良い。Incidentally, the circuit pattern of the present invention is not only copper foil,
A circuit pattern printed with a conductive paint may be used, or a circuit pattern formed by another method conventionally used may be used.
Further, the material of the conductive paint can be arbitrarily set, and the viscosity and the angle and speed of the squeegee at the time of application may be appropriately set in accordance with the diameter of the through-hole.
また、透孔をパンチングにより形成した後、透孔の形
状を整えるために、ドリルで角を落したり小径部をわず
かに削ったりすること等も適宜可能であり、導電塗料の
塗布を容易にするため等の加工は任意になし得るもので
ある。In addition, after forming the through-hole by punching, it is also possible to appropriately cut a corner or slightly cut a small diameter portion with a drill in order to adjust the shape of the through-hole, thereby facilitating the application of the conductive paint. Processing such as pitting can be arbitrarily performed.
この発明の回路基板は、絶縁基板の透孔内部の小さい
方の開口部近傍にふくらみを持たせたつづみ形状にした
ので、導電塗料にクラックが生じたり剥離したりするこ
とがないことは勿論、基板上への電子部品の取付けが支
障なく行える。従って、導電性スルーホールの検査を表
裏面からの外観目視のみによって行なっても支障がな
く、回路基板の製造工程や電子部品の実装工程での歩留
りが向上し、回路基板の信頼性も高くなる。Since the circuit board of the present invention has a conical shape with a bulge near the smaller opening inside the through hole of the insulating substrate, it is needless to say that the conductive paint does not crack or peel off. In addition, the electronic components can be mounted on the substrate without any trouble. Therefore, there is no problem even if the inspection of the conductive through hole is performed only by visual inspection from the front and back surfaces, and the yield in the circuit board manufacturing process and the electronic component mounting process is improved, and the reliability of the circuit board is also increased. .
第１図はこの発明の一実施例の回路基板の部分断面図、
第２図はこの実施例における導電スルーホールの他の状
態を示す部分断面図、第３図（Ａ）ないし（Ｆ）はこの
実施例の回路基板の製造工程を示す部分断面図、第４図
は本発明回路基板の他の実施例における導電スルーホー
ル部分の断面図、第５図（Ａ）（Ｂ）と第６図（Ａ）
（Ｂ）は本発明の回路基板を得るための他の製造工程に
おける主要な作業工程を示す部分断面図である。 １……絶縁基板、2,21,22……回路パターン、 3,31,32……ランド、3a……くり抜き部、４……透孔、4
a,4b……開口部、4c……小径部、 ５……導電塗料、 ６……導電スルーホール、９……スクリーン、 10……スキージFIG. 1 is a partial sectional view of a circuit board according to one embodiment of the present invention,
FIG. 2 is a partial sectional view showing another state of the conductive through hole in this embodiment, FIGS. 3 (A) to 3 (F) are partial sectional views showing a manufacturing process of the circuit board of this embodiment, and FIG. FIGS. 5A and 5B are cross-sectional views of a conductive through-hole portion in another embodiment of the circuit board of the present invention.
(B) is a partial cross-sectional view showing a main working process in another manufacturing process for obtaining the circuit board of the present invention. 1 ... insulating substrate, 2, 21, 22 ... circuit pattern, 3, 31, 32 ... land, 3a ... hollow part, 4 ... through-hole, 4
a, 4b ... opening, 4c ... small diameter part, 5 ... conductive paint, 6 ... conductive through hole, 9 ... screen, 10 ... squeegee
───────────────────────────────────────────────────── フロントページの続き (72)発明者 伴 悟志 富山県上新川郡大沢野町下大久保3158番 地 北陸電気工業株式会社内 (56)参考文献 特開 昭54−97778（ＪＰ，Ａ) 特開 昭62−43200（ＪＰ，Ａ) 特開 昭56−60093（ＪＰ，Ａ) ────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Satoshi Ban 3158, Shimo-Okubo, Osawano-cho, Kamishinkawa-gun, Toyama Prefecture Hokuriku Electric Industry Co., Ltd. (56) References 62-43200 (JP, A) JP-A-56-60093 (JP, A)
Claims (2)
部の内径が異なり、両開口部のうち径の小さい方の開口
部近傍に透孔内壁面が膨出して内径の狭くなった小径部
を有したつづみ状を呈し、この透孔内から透孔開口部の
外側にわたって導電塗料を塗布硬化して成る導電スルー
ホールを設けたことを特徴とする回路基板1. A through-hole penetrating an insulating substrate has different inner diameters at both end openings, and the inner wall surface of the through-hole bulges near an opening having a smaller diameter between the two openings, so that the inner diameter becomes narrower. A circuit board having a conical shape having a small diameter portion and having a conductive through hole formed by applying and curing a conductive paint from inside the through hole to outside of the through hole opening.
と、この回路パターンの一端部に上記絶縁基板をはさん
で互いに対向して形成され中央にくり抜き部が設けられ
たランドと、このくり抜き部の内側の絶縁基板にくり抜
き部との間にすき間を設けて形成された透孔であって絶
縁基板の両面での各開口部の内径が異なっており、この
開口部のうち径の小さい方の開口部に近い透孔内壁面が
膨出して内径が小さくなっている小径部を有したつづみ
状を呈する透孔及び上記絶縁基板の両面のランドに導電
塗料を塗布硬化してなる導電スルーホールを備えたこと
を特徴とする回路基板2. A circuit pattern formed on both sides of an insulating substrate; a land formed at one end of the circuit pattern so as to face each other with the insulating substrate interposed therebetween; A through hole formed by providing a gap between the cutout and the insulating substrate inside the portion, the inner diameter of each opening on both sides of the insulating substrate is different, and the smaller of the openings A conductive through-hole formed by applying and curing a conductive paint on a continuous hole having a small diameter portion whose inner diameter is reduced by bulging the inner wall surface of the through hole near the opening and a land on both surfaces of the insulating substrate. Circuit board having holes
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63184063A JP2610036B2 (en) | 1988-07-23 | 1988-07-23 | Circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63184063A JP2610036B2 (en) | 1988-07-23 | 1988-07-23 | Circuit board |
Related Child Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7081820A Division JP2775715B2 (en) | 1995-03-13 | 1995-03-13 | Circuit board and its manufacturing method |
| JP18556895A Division JP2683330B2 (en) | 1995-07-21 | 1995-07-21 | Circuit board manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0233996A JPH0233996A (en) | 1990-02-05 |
| JP2610036B2 true JP2610036B2 (en) | 1997-05-14 |
Family
ID=16146728
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63184063A Expired - Fee Related JP2610036B2 (en) | 1988-07-23 | 1988-07-23 | Circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2610036B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2722639B1 (en) * | 1994-07-18 | 1996-08-30 | Solaic Sa | METHOD FOR ESTABLISHING AN ELEXTRIC LINK BETWEEN TWO PRINTED CIRCUITS LOCATED ON THE OPPOSITE FACES OF A WAFER, AND ELECTRONIC CARD COMPRISING SUCH A LINK |
| JP5081267B2 (en) * | 2010-03-25 | 2012-11-28 | パナソニック株式会社 | Circuit component built-in module and method for manufacturing circuit component built-in module |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5497778A (en) * | 1978-01-19 | 1979-08-02 | Matsushita Electric Ind Co Ltd | Method of producing printed circuit board |
| JPS5660093A (en) * | 1979-10-19 | 1981-05-23 | Matsushita Electric Ind Co Ltd | Method of manufacturing bothhside printed circuit board |
| JPS6243200A (en) * | 1985-08-20 | 1987-02-25 | 日本シイエムケイ株式会社 | Manufacture of printed wiring board |
-
1988
- 1988-07-23 JP JP63184063A patent/JP2610036B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0233996A (en) | 1990-02-05 |
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