JP2683330B2 - Circuit board manufacturing method - Google Patents
Circuit board manufacturing methodInfo
- Publication number
- JP2683330B2 JP2683330B2 JP18556895A JP18556895A JP2683330B2 JP 2683330 B2 JP2683330 B2 JP 2683330B2 JP 18556895 A JP18556895 A JP 18556895A JP 18556895 A JP18556895 A JP 18556895A JP 2683330 B2 JP2683330 B2 JP 2683330B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- conductive paint
- circuit board
- conductive
- insulating substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、絶縁基板の両面に
形成される回路パターンと、その両面の回路パターン間
の電気的導通を図る導電スルーホールとを有する回路基
板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a circuit board having circuit patterns formed on both sides of an insulating substrate and conductive through holes for electrically connecting the circuit patterns on both sides.
【０００２】[0002]
【従来の技術】従来、スルーホール回路基板の導電スル
ーホールは絶縁基板にパンチングによって透孔を形成
し、この透孔に導電塗料を印刷によって複数回塗布して
回路基板両面の回路パターンの導通を図っていた（実公
昭５５−４４３９８号、以下従来例（イ）と称す）。
又、導電スルーホールの信頼性向上のために、基板の透
孔に基板の表裏両面側から表裏１対のスキージーで導電
ペイントを圧入する方法（特開昭５８−９１６９６号、
以下従来例（ロ）と称す）や、基板の透孔に導電ペイン
トを複数回塗り重ねる方法（特開昭５８−７４０９７
号、以下従来例（ハ）と称す）、あるいは基板の透孔に
スクリーン印刷の手法を用いて導電ペイントを塗布する
際、基板の透孔に対応するマスク孔に段差のあるスクリ
ーンを用いる方法（特開昭５７−１１２０９６号、以下
従来例（ニ）と称す）等もあった。2. Description of the Related Art Conventionally, a conductive through hole of a through-hole circuit board is formed by punching a through hole on an insulating substrate, and conductive paint is applied to the through hole by printing a plurality of times so that the circuit patterns on both sides of the circuit board are electrically connected. (Japanese Utility Model Publication No. 55-44398, hereinafter referred to as conventional example (a)).
Further, in order to improve the reliability of the conductive through hole, a method of press-fitting conductive paint into the through hole of the substrate from both sides of the substrate with a pair of front and back squeegees (Japanese Patent Laid-Open No. 58-91696,
Hereinafter, referred to as a conventional example (b)) or a method of applying conductive paint a plurality of times on the through holes of the substrate (Japanese Patent Laid-Open No. 58-74097).
(Hereinafter referred to as "conventional example (c)") or a method of using a screen having a step in a mask hole corresponding to the through hole of the substrate when applying a conductive paint to the through hole of the substrate by a screen printing method ( JP-A-57-112096, hereinafter referred to as a conventional example (d)) and the like were also available.
【０００３】[0003]
【発明が解決しようとする課題】上記従来例（イ）の印
刷による導電スルーホールの形成は上記公報に開示され
ているように、複数回の塗布及び硬化を重ねないと信頼
性の高いものができなかった。しかも、複数回の印刷に
よる印刷ズレによって、導電スルーホールの小径化も図
れず、工数や材料コストが増大するという欠点がある。
更に、複数回の印刷によって導電塗料同士の層間に気泡
が入ったり、印刷ムラが生じたりして、強度的に弱い個
所ができてクラックが入りやすくなる欠点がある他、導
電塗料の飛散により回路間のショートを生ずる機会も増
大し、歩留りも悪くなる。特に透孔が小さい場合導電塗
料が透孔内に入りにくく、導電層の薄い部分が生じやす
く、断線の可能性も増大してしまう。従来例（ロ）で
は、透孔以外の箇所に付着した導電ペイントを後から除
去する必要があった。従来例（ハ）では、従来例（イ）
と同様の欠点があり、従来例（ニ）では、スクリーンの
マスク孔に段差を形成するのに手数がかかっていた。As disclosed in the above-mentioned publication, the formation of the conductive through-hole by the printing of the prior art (a) is highly reliable unless the coating and curing are repeated a plurality of times. could not. In addition, there is a disadvantage that the diameter of the conductive through hole cannot be reduced due to printing misregistration caused by printing a plurality of times, and the number of steps and material costs increase.
In addition, there are drawbacks that bubbles are generated between the conductive paint layers due to multiple printing and uneven printing occurs, weak spots are created and cracks easily occur. The chances of short-circuiting between them also increase, and the yield decreases. In particular, when the through holes are small, the conductive paint is less likely to enter the through holes, a thin portion of the conductive layer is likely to occur, and the possibility of disconnection increases. In the conventional example (b), it is necessary to remove the conductive paint adhered to a portion other than the through hole later. In the conventional example (C), the conventional example (B)
However, in the conventional example (d), it takes time to form a step in the mask hole of the screen.
【０００４】この発明は上述の従来の技術に鑑みて成さ
れたもので、導通不良等がなく高密度実装が可能であ
り、製造も容易で歩留りの高い回路基板の製造方法を提
供することを目的とする。The present invention has been made in view of the above-mentioned conventional technique, and provides a method for manufacturing a circuit board which is free from conduction defects and enables high-density mounting, is easy to manufacture, and has a high yield. To aim.
【０００５】[0005]
【課題を解決するための手段】上記課題を解決するため
に成された本発明による回路基板の製造方法は、絶縁基
板の少なくとも片面に、ランドを有する回路パターンを
形成し、このランドの中央の絶縁基板を、ポンチとダイ
スとの間に適度なクリアランスを設けたプレス加工機で
打ち抜くことで、両端開口部の内径が異なり、且つ両開
口部のうち径の小さい方の開口部近傍に内壁面が膨出し
て内径の狭くなった小径部を有し、且つ両開口部の角部
が丸みを帯びたつづみ状を呈する透孔を形成し、この透
孔の径の小さい開口部に、逃げ部が透孔に面した基台を
あてがい、この透孔に上記打ち抜きの方向とは逆の方向
からスクリーンを介してスキージによる一回の塗り込み
によって導電塗料を塗布し、この後導電塗料を硬化させ
て導電スルーホールを形成することを特徴とする。A method of manufacturing a circuit board according to the present invention, which has been made to solve the above problems, forms a circuit pattern having a land on at least one surface of an insulating substrate, By punching the insulating substrate with a press machine that has an appropriate clearance between the punch and the die, the inner diameter of the openings at both ends is different, and the inner wall surface near the opening with the smaller diameter of both openings. Has a small diameter part with a bulge and a narrow inner diameter, and the corners of both openings form a rounded trapezoidal through hole. Place the base facing the through hole, apply the conductive paint to the through hole from the direction opposite to the punching direction through the screen once with a squeegee, and then cure the conductive paint. Let conductive through And forming a.
【０００６】[0006]
【発明の実施の形態】以下本発明による回路基板の製造
方法の実施の形態について図面に基づいて説明する。回
路基板の製造工程を順を追って説明すると、先ず、図１
（ロ）に示すようにポンチ７を作動させランド３のくり
抜き部３ａの内側を打ち抜く。この際、ポンチ７とダイ
ス８との間にクリアランスをとるため、図１（ハ）およ
び図３の如く開口部４ａの直径ｄ１より開口部４ｂの直
径ｄ２の方が大きくなる。また、打ち抜いた後に、透孔
４の内壁面はわずかに盛り上がって小径部４ｃを形成す
るが、この小径部４ｃは、せん断当初の絶縁基板１の表
面近傍の組織のすべりがせん断方向に対しＶ字状に斜め
に発生し、せん断の進行に伴ってポンチ７の径より小さ
い部分が外側に押しやられ、打ち抜きが終了するとこの
押しやられた部分がわずかに膨出することによって生じ
るものであり、透孔の内径が小さい場合に顕著に現れ
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of a method for manufacturing a circuit board according to the present invention will be described below with reference to the drawings. The manufacturing process of the circuit board will be described step by step. First, referring to FIG.
As shown in (b), the punch 7 is operated to punch out the inside of the cut-out portion 3a of the land 3. At this time, since a clearance is provided between the punch 7 and the die 8, the diameter d2 of the opening 4b becomes larger than the diameter d1 of the opening 4a as shown in FIGS. Further, after punching, the inner wall surface of the through hole 4 slightly rises to form a small diameter portion 4c. In the small diameter portion 4c, the slip of the tissue near the surface of the insulating substrate 1 at the time of shearing is V with respect to the shearing direction. It occurs diagonally in the shape of a letter, and as the shearing progresses, a portion smaller than the diameter of the punch 7 is pushed outward, and when punching is completed, this pushed portion slightly swells. It appears remarkably when the inner diameter of the hole is small.
【０００７】次に、図２（イ）の如く、この絶縁基板１
の透孔４に導電塗料５を塗布する。この際、導電塗料５
はポンチ７で打ち抜いた方向と逆の方向から塗り込まれ
る。この導電塗料５の塗布は、透孔４の大径の開口部４
ｂ側の表面にスクリーン９を載せ、位置合わせをし、そ
の上から導電塗料５をゴム等の弾性のあるスキージ１０
でかき取りながら一回の操作によりスクリーン９の透過
部９ａから透孔４内に導電塗料５を塗り込むものであ
る。この際、スキージ１０は図示するように絶縁基板１
に押しつけて、スクリーン９との角度が先端部で小さく
なるようにし、塗り込む圧力が高くなるようにする。す
ると、図２（ロ）に示すように、導電塗料５は透孔４内
を通って反対側の開口部４ａでわずかに広がりちょうど
ランド３と接続する。この際、導電塗料がランド３にま
で広がるように、基台１１には逃げ部１２が形成されて
いる。この基台１１の形状は適宜変更できる。Next, as shown in FIG. 2A, this insulating substrate 1
The conductive paint 5 is applied to the through holes 4 of the. At this time, the conductive paint 5
Is applied from the direction opposite to the punching direction. The conductive coating 5 is applied to the large-diameter opening 4 of the through hole 4.
The screen 9 is placed on the surface of the b side, the position is adjusted, and the conductive paint 5 is placed on the screen 9 so as to have elasticity such as rubber.
The conductive paint 5 is applied from the transmissive portion 9a of the screen 9 to the inside of the through-hole 4 while scraping. At this time, the squeegee 10 is attached to the insulating substrate 1 as shown.
To make the angle with the screen 9 smaller at the tip end so that the application pressure becomes higher. Then, as shown in FIG. 2B, the conductive paint 5 passes through the through hole 4 and slightly spreads at the opening 4a on the opposite side to be connected to the land 3. At this time, an escape portion 12 is formed in the base 11 so that the conductive paint spreads to the land 3. The shape of the base 11 can be appropriately changed.
【０００８】最後に、導電塗料５を加熱または紫外線に
より硬化させ導電スルーホール６が完成する。Finally, the conductive paint 5 is heated or cured by ultraviolet rays to complete the conductive through holes 6.
【０００９】図３はこの製造方法により得られた回路基
板の部分断面図であり、絶縁基板１の両面に銅箔による
回路パターン２が形成されており、この回路パターン２
の一端部はランド３になっている。このランド３は、そ
の中央部がくり抜かれてドーナツ状になっており、この
くり抜き部３ａの直径は、絶縁基板１の各面でわずかに
異なっており、ここでは図中の直径Ｄ１，Ｄ２はＤ１＜
Ｄ２となっている。このくり抜き部３ａ内の絶縁基板１
は、打ち抜かれて透孔４が形成されている。この透孔４
はランド３のくり抜き部３ａの直径Ｄ１，Ｄ２より小さ
い内径に打ち抜かれており、その内径は、一方の開口部
４ａの内径ｄ１と他方の開口部４ｂの内径ｄ２の関係が
ｄ１＜ｄ２となっており、さらに基板内部の内径は開口
部４ａに近い方の内径が徐々に小さくなるように壁面が
膨出して小径部４ｃを形成しており、従ってこの小径部
４ｃの内径ｄ３はｄ３＜ｄ１となっている。FIG. 3 is a partial cross-sectional view of a circuit board obtained by this manufacturing method. A circuit pattern 2 made of copper foil is formed on both sides of an insulating substrate 1, and the circuit pattern 2 is formed.
One end of is a land 3. The land 3 has a donut shape in which the central portion is hollowed out, and the diameter of the hollowed-out portion 3a is slightly different on each surface of the insulating substrate 1. Here, the diameters D1 and D2 in the drawing are D1 <
It is D2. Insulating substrate 1 inside this hollow 3a
Are punched to form the through hole 4. This through hole 4
Is punched to have an inner diameter smaller than the diameters D1 and D2 of the cut-out portion 3a of the land 3, and the inner diameter d1 of the opening 4a and the inner diameter d2 of the other opening 4b are d1 <d2. Further, the inner diameter of the inside of the substrate forms a small diameter portion 4c by bulging the wall so that the inner diameter closer to the opening 4a becomes gradually smaller. Therefore, the inner diameter d3 of this small diameter portion 4c is d3 <d1. Has become.
【００１０】この透孔４には、銀、銅、ニッケル、カー
ボン等を熱硬化性樹脂又は紫外線硬化性樹脂中に含んだ
導電塗料５が塗布されており、この導電塗料５は、絶縁
基板１両面のランド３に接続して設けられ導電スルーホ
ール６を形成している。導電塗料５は、その粘度や透孔
４の内径によって図３に示すように透孔４を塞いでしま
う場合や、図４に示すように孔ができる場合があり、一
般に粘度は１０ポイズから６０ポイズ程度が好ましく、
電気的性能も良好である。A conductive paint 5 containing silver, copper, nickel, carbon or the like in a thermosetting resin or an ultraviolet curable resin is applied to the through hole 4, and the conductive paint 5 is the insulating substrate 1. Conductive through holes 6 are formed so as to be connected to the lands 3 on both sides. The conductive paint 5 may block the through holes 4 as shown in FIG. 3 depending on its viscosity or the inner diameter of the through holes 4, or may have holes as shown in FIG. 4, and the viscosity is generally 10 poises to 60 poises. Poise is preferable,
The electrical performance is also good.
【００１１】前記工程にて得られた回路基板の導電スル
ーホール６は、近年の高密度実装化の要請により、透孔
４の径を図３のｄ２の径でｄ２＝０．８ｍｍ位に設定し
ており、ｄ１はｄ２より５％ないし１０％程度小さく設
定している。そして、ランド３のくり抜き部３ａと透孔
４とのすき間ｘは０．０５ｍｍないし０．３ｍｍに設定
する。このように設定すると、従来のように内径が１．
５ｍｍ程度の透孔では見られなかった透孔４内での盛り
上がりが顕著になり、ポンチ７とダイス８とのクリアラ
ンスを適度に設定することで、図示するように透孔４に
丸みが生じ、透孔４の開口部４ａ，４ｂでの角部にも丸
みが生じる。これによって、絶縁基板１が加熱乾燥によ
って収縮しても角部で導電塗料にクラックが入ったりす
ることがなくなる。In the conductive through hole 6 of the circuit board obtained in the above process, the diameter of the through hole 4 is set to about d2 = 0.8 mm in the diameter of d2 in FIG. 3 due to the recent demand for high-density mounting. Therefore, d1 is set to be smaller than d2 by about 5% to 10%. The clearance x between the cut-out portion 3a of the land 3 and the through hole 4 is set to 0.05 mm to 0.3 mm. With this setting, the inner diameter is 1.
The swelling in the through hole 4 which was not seen in the through hole of about 5 mm becomes remarkable, and by appropriately setting the clearance between the punch 7 and the die 8, the through hole 4 is rounded as shown in the drawing, The corners of the openings 4a and 4b of the through hole 4 are also rounded. Thereby, even if the insulating substrate 1 shrinks by heating and drying, cracks do not occur in the conductive paint at the corners.
【００１２】また、前記製造方法は、導電塗料５をスク
リーン９を介して透孔４に一回の操作で塗り込むだけな
ので、簡単に塗布することができる。しかも、打ち抜き
の方向とは逆の方向から塗り込むので、透孔４の開口部
のうち大きい方から導電塗料が流れ込み、小径部４ｃで
導電塗料に圧力が加わることになり粗面である透孔４に
非常にスムーズに且つすきまなく導電塗料が充満する。
特に従来のように、ピンを挿入して塗布できないような
小さい透孔でも、確実に塗布が可能である。Further, in the above-mentioned manufacturing method, since the conductive paint 5 is applied to the through hole 4 through the screen 9 by one operation, it can be applied easily. Moreover, since the coating is applied from the direction opposite to the punching direction, the conductive paint flows in from the larger one of the openings of the through holes 4, and pressure is applied to the conductive paint at the small diameter portion 4c, so that the through holes which are rough surfaces. 4 is filled with conductive paint very smoothly and without gaps.
In particular, even in a small through-hole which cannot be applied by inserting a pin as in the related art, the application can be reliably performed.
【００１３】また、図６に示すように絶縁基板１の片面
にのみ回路パターン２２を形成し、そのランド３２と一
緒に絶縁基板１を打ち抜いてくり抜き部３ａとつづみ状
の透孔４を同時に形成し、それから前述の方法と同様に
して導電塗料５の塗り込みと硬化を行ない、その後絶縁
基板１のまだ回路パターンが形成されていない面に、ラ
ンド３１が導電塗料５の上に重なるようにして回路パタ
ーン２１を印刷形成する場合もある。ここで、透孔４の
穿設前に形成する回路パターン２２は絶縁基板１のいず
れの面にあっても良い。Further, as shown in FIG. 6, the circuit pattern 22 is formed only on one surface of the insulating substrate 1, and the insulating substrate 1 is punched together with the land 32 thereof to form the hollow portion 3a and the stab-like through hole 4 at the same time. Then, the conductive paint 5 is applied and cured in the same manner as described above, and then the land 31 is placed on the conductive paint 5 on the surface of the insulating substrate 1 on which the circuit pattern is not yet formed. In some cases, the circuit pattern 21 is formed by printing. Here, the circuit pattern 22 formed before the formation of the through hole 4 may be on any surface of the insulating substrate 1.
【００１４】さらに、図７に示すように、絶縁基板１の
両面に回路パターン２を形成し、絶縁基板１を介して相
対するランド３のくり抜き部３ａを透孔４の穿設時に併
せて形成し、その後前述の方法と同様に透孔４の大径開
口部４ｂ側から導電塗料を塗り込み、そして硬化処理を
行なう方法も可能である。Further, as shown in FIG. 7, the circuit patterns 2 are formed on both sides of the insulating substrate 1, and the cut-out portions 3a of the lands 3 facing each other with the insulating substrate 1 formed are also formed when the through holes 4 are formed. Then, as in the method described above, a method of applying conductive paint from the large-diameter opening 4b side of the through hole 4 and then performing a curing treatment is also possible.
【００１５】上記二例の製造方法においては、ランド３
のくり抜き部３ａを透孔４の穿設時に併せて形成するも
のであるから、予めくり抜き部３ａを形成する工程を省
略することが出来る。また、上記のごとく本発明による
製造方法を適宜応用することによって、図５と図６
（ロ）に示すように、片面の回路パターン２１のランド
３１が導電スルーホール６の口縁部分の導電塗料５の上
部及び外側に重ねて印刷形成された回路基板を得ること
もできる。In the manufacturing method of the above two examples, the land 3
Since the hollow portion 3a is also formed when the through hole 4 is formed, the step of forming the hollow portion 3a in advance can be omitted. Further, by appropriately applying the manufacturing method according to the present invention as described above, FIG.
As shown in (b), it is also possible to obtain a circuit board in which the land 31 of the circuit pattern 21 on one surface is printed and formed on the upper and outer sides of the conductive paint 5 at the rim portion of the conductive through hole 6.
【００１６】尚、この発明の回路パターンは、銅箔ばか
りでなく、導電塗料を印刷した回路パターンでも良い
し、また従来行なわれている他の方法により形成したも
のでも良い。さらに、導電塗料の材料も任意に設定し得
るものであり、粘度や塗布の際のスキージの角度や速さ
も透孔の径等に合わせて適宜設定すれば良い。また、透
孔をパンチングにより形成した後、透孔の形状を整える
ために、ドリルで角を落したり小径部をわずかに削った
りすること等も適宜可能であり、導電塗料の塗布を容易
にするため等の加工は任意になし得るものである。The circuit pattern of the present invention is not limited to the copper foil, and may be a circuit pattern printed with a conductive paint, or may be formed by another conventional method. Further, the material of the conductive paint can be arbitrarily set, and the viscosity and the angle and speed of the squeegee at the time of application may be appropriately set in accordance with the diameter of the through-hole. In addition, after forming the through-hole by punching, it is also possible to appropriately cut a corner or slightly cut a small diameter portion with a drill in order to adjust the shape of the through-hole, thereby facilitating the application of the conductive paint. Processing such as pitting can be arbitrarily performed.
【００１７】[0017]
【発明の効果】以上のごとく本発明による回路基板の製
造方法は、絶縁基板の透孔の打ち抜きの方向とは逆の方
向から導電塗料を塗り込んでいるので、透孔の開口部の
うち広い方から１回の印刷でスムーズに導電塗料が流れ
込み、極めて小さい透孔に対しても導電塗料の塗布が可
能である。しかも、導電塗料を塗り込む際に、透孔に面
して逃げ部を形成した基台をあてがうために、導電塗料
がいたずらに打ち抜きの方向へ押し出されることなくラ
ンド３にまで好適に広がるものである。これによって、
導電スルーホールの直径０．８ｍｍ以下に至る小径化が
可能となり、回路基板の実装密度の向上を図ることがで
きるのみならず、回路基板の生産性を顕著に高め得る。As described above, in the method of manufacturing a circuit board according to the present invention, since the conductive coating material is applied in the direction opposite to the punching direction of the through hole of the insulating substrate, the opening of the through hole is wide. The conductive paint flows in smoothly from one side by one printing, and it is possible to apply the conductive paint even to an extremely small through hole. Moreover, when the conductive paint is applied, since the base having the escape portion formed facing the through hole is applied, the conductive paint can be suitably spread to the land 3 without being extruded in the punching direction. is there. by this,
The diameter of the conductive through holes can be reduced to 0.8 mm or less, and not only the mounting density of the circuit board can be improved, but also the productivity of the circuit board can be remarkably improved.
【００１８】また、特殊なプレス加工機を用い、絶縁基
板の透孔の内部にふくらみを持たせ且つ透孔の両開口部
の角部に丸みを持たせるようにしたので、この製造方法
により得られた回路基板は、導電塗料にクラックが生じ
たり剥離したりすることがない。従って、導電性スルー
ホールの検査を表裏面からの外観目視のみによって行な
っても支障がない程に回路基板の製造工程や部品の実装
工程での歩留りが向上し、回路基板の信頼性も高くな
る。Further, since a special press machine is used to make the through holes of the insulating substrate have a bulge and to make the corners of both openings of the through holes round, it is possible to obtain by this manufacturing method. The obtained circuit board does not crack or peel off in the conductive paint. Therefore, the yield in the manufacturing process of the circuit board and the mounting process of components is improved to the extent that there is no problem even if the inspection of the conductive through holes is performed only by visually observing the appearance from the front and back surfaces, and the reliability of the circuit board is also increased. .
【図１】（イ）（ロ）（ハ）本発明による回路基板の製
造方法における作業工程を示す部分断面図である。1 (a), (b), (c) are partial cross-sectional views showing working steps in a method for manufacturing a circuit board according to the present invention.
【図２】（イ）（ロ）（ハ）図１に続く作業工程の部分
断面図である。2 (a), (b), and (c) are partial cross-sectional views of a work process following FIG.
【図３】本発明による回路基板の製造方法により得られ
た回路基板における導電スルーホール部分の一例を示す
断面図である。FIG. 3 is a cross-sectional view showing an example of a conductive through hole portion in a circuit board obtained by the method for manufacturing a circuit board according to the present invention.
【図４】本発明による回路基板の製造方法により得られ
た回路基板における導電スルーホール部分の一例を示す
断面図である。FIG. 4 is a cross-sectional view showing an example of a conductive through hole portion in a circuit board obtained by the method for manufacturing a circuit board according to the present invention.
【図５】本発明による回路基板の製造方法により得られ
た回路基板における導電スルーホール部分の一例を示す
断面図であるFIG. 5 is a cross-sectional view showing an example of a conductive through hole portion in a circuit board obtained by the method for manufacturing a circuit board according to the present invention.
【図６】（イ）（ロ）本発明による回路基板の製造方法
の応用例における主要な作業工程を示す部分断面図であ
る。6A and 6B are partial cross-sectional views showing main work steps in an application example of the method for manufacturing a circuit board according to the present invention.
【図７】（イ）（ロ）本発明による回路基板の製造方法
の応用例における主要な作業工程を示す部分断面図であ
る。7A and 7B are partial cross-sectional views showing main work steps in an application example of the method for manufacturing a circuit board according to the present invention.
１ 絶縁基板、 ２，２１，２２ 回路パターン ３，３１，３２ ランド ４ 透孔 ４ａ，４ｂ 開口部 ５ 導電塗料 ６ 導電スルーホール ７ ポンチ ８ ダイス ９ スクリーン １０ スキージ １１ 基台 １２ 逃げ部 1 Insulating substrate, 2, 21, 22 Circuit pattern 3, 31, 32 Land 4 Through hole 4a, 4b Opening 5 Conductive paint 6 Conductive through hole 7 Punch 8 Dice 9 Screen 10 Squeegee 11 Base 12 Relief part
───────────────────────────────────────────────────── フロントページの続き (56)参考文献 特開 昭49−14977（ＪＰ，Ａ) 特開 昭56−60093（ＪＰ，Ａ) 実開 平58−111972（ＪＰ，Ｕ) ─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-49-14977 (JP, A) JP-A-56-60093 (JP, A) Actual Kaihei 58-111972 (JP, U)
Claims (1)
ンド（３，３１，３２）を有する回路パターン（２，２
１，２２）を形成し、このランド（３，３１，３２）の
中央の絶縁基板（１）を、ポンチ（７）とダイス（８）
との間に適度なクリアランスを設けたプレス加工機で打
ち抜くことで、両端開口部（４ａ，４ｂ）の内径が異な
り、且つ両開口部（４ａ，４ｂ）のうち径の小さい方の
開口部（４ａ）近傍に内壁面が膨出して内径の狭くなっ
た小径部（４ｃ）を有し、且つ両開口部（４ａ，４ｂ）
の角部が丸みを帯びたつづみ状を呈する透孔（４）を形
成し、この透孔（４）の径の小さい開口部（４ａ）に、
逃げ部（１２）が透孔（４）に面した基台（１１）をあ
てがい、この透孔（４）に上記打ち抜きの方向とは逆の
方向からスクリーン（９）を介してスキージ（１０）に
よる一回の塗り込みによって導電塗料（５）を塗布し、
この後導電塗料（５）を硬化させて導電スルーホール
（６）を形成することを特徴とする回路基板の製造方
法。1. A circuit pattern (2, 2) having lands (3, 31, 32) on at least one surface of an insulating substrate (1).
1, 22) are formed, and the insulating substrate (1) at the center of the lands (3, 31, 32) is connected to the punch (7) and the die (8).
By punching with a press machine having a proper clearance between the two openings (4a, 4b), the inner diameters of the openings (4a, 4b) are different, and the opening of the smaller opening (4a, 4b) ( 4a) has a small diameter portion (4c) whose inner wall surface is swollen and whose inner diameter is narrowed, and both opening portions (4a, 4b)
Forming a through hole (4) whose corners are rounded in a zigzag shape, and the opening (4a) having a small diameter of the through hole (4),
The escape portion (12) applies the base (11) facing the through hole (4), and the squeegee (10) is inserted into the through hole (4) from the direction opposite to the punching direction through the screen (9). Apply the conductive paint (5) by applying once with
After that, the conductive paint (5) is cured to form conductive through holes (6), which is a method for manufacturing a circuit board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18556895A JP2683330B2 (en) | 1995-07-21 | 1995-07-21 | Circuit board manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18556895A JP2683330B2 (en) | 1995-07-21 | 1995-07-21 | Circuit board manufacturing method |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63184063A Division JP2610036B2 (en) | 1988-07-23 | 1988-07-23 | Circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH08172266A JPH08172266A (en) | 1996-07-02 |
| JP2683330B2 true JP2683330B2 (en) | 1997-11-26 |
Family
ID=16173090
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18556895A Expired - Fee Related JP2683330B2 (en) | 1995-07-21 | 1995-07-21 | Circuit board manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2683330B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5081267B2 (en) * | 2010-03-25 | 2012-11-28 | パナソニック株式会社 | Circuit component built-in module and method for manufacturing circuit component built-in module |
-
1995
- 1995-07-21 JP JP18556895A patent/JP2683330B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH08172266A (en) | 1996-07-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4912844A (en) | Methods of producing printed circuit boards | |
| DE69935009T2 (en) | PRINTED PCB AND THEIR MANUFACTURING PROCESS | |
| EP0608726A1 (en) | Process for plating through-connections between conducting foils | |
| JP2002368390A (en) | Hole filling apparatus for printed wiring board and method therefor, and method for manufacturing printed wiring board | |
| EP0620702B1 (en) | Core for electrical interconnection substrates and electrical interconnection substrates with core, and method for manufacturing the same | |
| JPS63311790A (en) | High accuracy variable thickness lay-down for electronic component | |
| US4064357A (en) | Interconnected printed circuits and method of connecting them | |
| JP2683330B2 (en) | Circuit board manufacturing method | |
| JP2775715B2 (en) | Circuit board and its manufacturing method | |
| JP2610036B2 (en) | Circuit board | |
| JP3068530B2 (en) | Circuit board manufacturing method | |
| DE3780995T2 (en) | METHOD FOR PRODUCING A METALLIC PATTERN. | |
| US2823286A (en) | Contacts for electrical circuits and methods for making same | |
| US20030121146A1 (en) | Method for fabricating electrical connecting elements, and connecting element | |
| JPH02146793A (en) | Manufacture of printed circuit board | |
| DE3914727A1 (en) | MULTIPLE LAYER PCB FOR FINE CONDUCTORS AND METHOD FOR THEIR PRODUCTION | |
| US4410574A (en) | Printed circuit boards and methods for making same | |
| GB2258087A (en) | A method of manufacturing a printed wiring board | |
| JP3794064B2 (en) | Printed wiring board and manufacturing method thereof | |
| JP3855303B2 (en) | Method for manufacturing printed wiring board | |
| JPH0516199B2 (en) | ||
| JP3604421B2 (en) | Conductive paste through-hole printed wiring board | |
| JPH0122758B2 (en) | ||
| JP3774932B2 (en) | Method for manufacturing printed wiring board | |
| JPS63314887A (en) | Printed wiring board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |