JP2541487B2 - 半導体装置パッケ―ジ - Google Patents

半導体装置パッケ―ジ

Info

Publication number
JP2541487B2
JP2541487B2 JP5297137A JP29713793A JP2541487B2 JP 2541487 B2 JP2541487 B2 JP 2541487B2 JP 5297137 A JP5297137 A JP 5297137A JP 29713793 A JP29713793 A JP 29713793A JP 2541487 B2 JP2541487 B2 JP 2541487B2
Authority
JP
Japan
Prior art keywords
mcm
frame
semiconductor device
device package
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP5297137A
Other languages
English (en)
Other versions
JPH07153903A (ja
Inventor
優 斉藤
学 盆子原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP5297137A priority Critical patent/JP2541487B2/ja
Priority to US08/350,122 priority patent/US5570274A/en
Publication of JPH07153903A publication Critical patent/JPH07153903A/ja
Application granted granted Critical
Publication of JP2541487B2 publication Critical patent/JP2541487B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04—Assemblies of printed circuits
    • H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09072—Hole or recess under component or special relationship between hole and component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10439—Position of a single component
    • H05K2201/10477—Inverted
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10674—Flip chip
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10977—Encapsulated connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
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Description

【発明の詳細な説明】
【０００１】
【産業上の利用分野】本発明は、半導体装置パッケージ
に関し、特に１枚の基板に複数の半導体集積回路チップ
を搭載するマルチチップモジュール（ＭＣＭ）に関す
る。
【０００２】
【従来の技術】図８に、従来のＭＣＭを示す。ＭＣＭ基
板２１上にＬＳＩチップ１９をフェースダウンでバンプ
１８を介してフリップチップ法、又はフェースアップで
ワイヤーボンディング法等により１個ないし複数個搭載
した後、ＬＳＩチップ１９の保護及び接続信頼性確保の
為に封止樹脂２５により全体を封止するが、そのままの
状態で封止樹脂２５を塗布すると、外周に広く樹脂が流
れ出してしまうために枠２４を設けている。ＭＣＭ基板
２１はＬＳＩチップ１９の搭載面から裏面に至る配線層
と接続用パッドが設けてあり、この接続用パッド上に半
田のボールバンプ２３を形成しマザーボード２２に搭載
する。その後、マザーボード２２上に搭載されている他
の電子部品と一括でリフロー加熱することによりＭＣＭ
をマザーボード２２に接続する。このようなＭＣＭは
「ＣＲＥＡＴＥ ＥＮＧＩＮＥＥＲＲＩＮＧ ＲＥＰＯ
ＲＴＳ 第１７回ＣＲＥＡＴＥ−Ｓｈｏｗ セミナー予
稿集ボールグリッドアレイ（ＢＧＡ）のパッケージング
と実装技術」１頁〜７頁に記載されている。この構造の
ＭＣＭは、ＬＳＩチップ１９の搭載面の裏面をマザーボ
ード２２との接続に使用しているのでＭＣＭ基板２１の
裏面に部品を実装することはできない。
【０００３】図９（ａ）及び（ｂ）は他の従来のＭＣＭ
の斜視図及び断面図である。ＭＣＭ基板３０に半導体チ
ップ２９及び枠２８を搭載し、ＭＣＭ基板３０上の枠２
８内に半導体チップ２９を封止するための樹脂２５を塗
布してある。
【０００４】ＭＣＭ基板３０のマザーボードとの電気的
接続をＭＣＭ基板３０の側面に設けた端子電極２７を半
田付けすることにより得ている。この場合、ＭＣＭ基板
３０のＬＳＩチップ２９の搭載面の裏面は、マザーボー
ドに密着実装するので裏面への部品実装はできなく又、
密着実装しているためＭＣＭ基板が大きくなるとマザー
ボードの反りに対応できない。さらに複数個のＭＣＭを
積み重ね実装することもできない。このようなＭＣＭは
「ＮＥＣユーザーズ・マニアルＩＥＵ−７６５Ｃ ＬＬ
ＣタイプアイブリッドＩＣ」３頁〜４頁に記載されてい
る。
【０００５】そのほかの従来の半導体装置パッケージと
しては「’９２ＬＳＩパッケージ新技術シンポジュウム
論文集−高速高密度ＬＳＩパッケージ技術の展望」５５
頁〜５８頁にＬＳＩチップを搭載した基板を積み重ねて
多階層にしたものが記載されている。またＩＳＨＭ発行
の「ＩＪＭＥＰ−Ｖｏｉｕｍ１６，Ｎｕｍｂｅｒ２Ｓｅ
ｃｏｎｄ Ｑｕａｒｔｅｒ １９９３」１１７頁〜１２
３頁に同様に多階層の構造のものが記載されている。こ
れらの構造では、端子同士の接続が難しく信頼性を向上
させるためにはコストが高くなる。又、外部接続端子を
外周部に設けている為、端子数が多くなると外形を大き
くするか、端子を微細化する事が必要になり更に接続が
困難となる。
【０００６】
【発明が解決しようとする課題】従来、情報機器の高性
能、高機能、さらに小型化といった要求に対応するため
のプリント配線板へ電子回路を高密度に実装する方法と
して、ＭＣＭが用いられているが、さらなる高密度化に
対応しようとする場合には従来のＭＣＭでは難しい状況
にある。さらに大幅な高密度化を図ろうとした場合、一
つの解決手段としてマザーボードの高さ方向の空間を利
用する構造がある。このような構造の半導体装置パッケ
ージはＭＣＭを積み重ねたりＭＣＭの両面にＬＳＩチッ
プを搭載することにより得られるが、図８及び図９に示
した従来のＭＣＭでは裏面がマザーボードとの接続用に
使われているのでこのような構造とすることができな
い。また従来の多階層にした半導体装置パッケージでも
単純に外部接続用端子を増やすと外形が大きくなってし
まい、これを避けるために端子を微細化すると、マザー
ボード等との接続が困難となってしまう。したがって、
さらに高密度化を図ることができないという問題があっ
た。
【０００７】
【課題を解決するための手段】本発明の半導体装置は、
半導体チップを搭載するＭＣＭ基板と、前記半導体チッ
プを内側に囲み前記ＭＣＭ基板に設けられた枠と、前記
枠の内側に充填され前記半導体チップを封止する封止樹
脂と、前記枠の面であって前記ＭＣＭ基板に対し反対側
に位置する面に配列され電気的に前記ＭＣＭ基板の回路
に接続され突起状の半田又は導電ペースとを設けた電極
端子とを備えている。
【０００８】本発明の半導体装置パッケージは、半導体
チップを両面に搭載するＭＣＭ基板と、前記半導体チッ
プを内側に囲み前記ＭＣＭ基板の両面に設けられた２つ
の枠と、前記２つの枠の内側に充填され前記半導体チッ
プを封止する封止樹脂と、前記２つの枠の少くとも一方
のものの面であって前記ＭＣＭ基板に対し反対側に位置
する面に配列され電気的に前記ＭＣＭ基板の回路に接続
され突起状の半田又は導電ペーストを設けた電極端子と
を備えている。
【０００９】本発明の積層形半導体装置パッケージは、
半導体装置パッケージは両面に半導体チップを搭載した
ＭＣＭ基板と、このＭＣＭ基板の両面に設けられて前記
半導体チップを内側に囲む枠と、前記枠の内側に充填さ
れ前記半導体チップを封止する封止樹脂と、前記枠の面
であって前記ＭＣＭ基板に対し反対側に位置する面に配
列され電気的に前記ＭＣＭ基板の回路に接続され突起状
の半田または導電ペーストを設けた電極端子を備え、前
記半導体装置パッケージを複数段重ね隣接する前記半導
体装置パッケージの電極端子を互いに接続したことを特
徴とする。
【００１０】
【実施例】次に、本発明の実施例を図面を参照しながら
説明する。
【００１１】図１（ａ）及び（ｂ）はそれぞれ本発明の
第１の実施例の半導体装置パッケージの斜視図及びマザ
ーボード１０に搭載した直後（半田リフローを行う前）
の状態を示す断面図である。ＭＣＭ基板１（材質はガラ
スエポキシ，セラミック等）にＬＳＩチップ２をフリッ
プチップ法又は、ワイヤーボンディング法により搭載
し、さらに封止樹脂流れ止め用枠４を取り付ける。ＭＣ
Ｍ基板１のＬＳＩチップ２の搭載面の枠４の外側となる
外周部に接続用パッド３をもうけた。封止樹脂流れ止め
用枠４のＭＣＭ基板１との接合面の反対面に電極端子５
を設け側面に端子５に連接する側面端子７を設けてあ
る。端子５にはマザーボード１０との接続用に、予めク
リーム半田（例えば、Ｓｎ−Ｐｂ系、Ｂｉ−Ｐｂ系、Ｉ
ｎ−Ｐｂ系合金等）により半田ボール１１を形成してお
く。この際、リフロー時に半田が流れ落ちないようにソ
ルダーレジストで端子５の回りにダム９を設けた。
【００１２】この枠４をＭＣＭ基板１に接着剤６で固定
した後にパッド３及び端子７にディスペンサでクリーム
半田（例えばＳｎ−Ｐｂ共晶半田）を塗布しリフロー加
熱によりＭＣＭ基板１のパッド３と、枠４の端子７と半
田８で電気的に接続する。その後、枠４の内側に封止樹
脂２５を充填しキュアすることにより第１実施例の構造
を得た。以上の様にして得られた構造のＭＣＭを、マザ
ーボード１０に搭載しリフロー加熱することで半田ボー
ル１１によりマザーボード側のパッド２６と電気的に接
続した。
【００１３】本実施例のＭＣＭは、ＭＣＭ基板１の構造
が簡単であるため安価に製造することができる。また半
導体チップ２がＭＣＭ基板１、枠４及びマザーボード１
０で囲まれ、単に樹脂２５で封止するより一層確実に半
導体チップ２を保護することができる。
【００１４】図２は、本発明の第２の実施例の半導体装
置パッケージの断面図である。大半の構成要素は第１の
実施例と同じであり、相違点のみを説明する。この第２
の実施例ではＭＣＭ基板１の枠４の外側に接続用パッド
を設けることなくＭＣＭ基板１の枠４との接合部に接続
用パッド３５を設けてある。また枠４のＭＣＭ基板１と
の接合面に側面端子７に連接する底面端子３６を設けて
ある。パッド３５又は、底面端子３６にクリーム半田を
塗布しリフロー加熱することによりＭＣＭ基板１と枠４
とを電気的に接続した。また、半田の替わりに厚さ方向
のみ導電性を有する異方導電性シートをＭＣＭ基板１と
枠４との間に熱圧着する等の方法でこれらを電気的に接
続することも可能である。その後、枠の外周を接着剤１
３で覆い内側に封止樹脂２５を充填し硬化させ完成す
る。ＭＣＭ基板１上の接着剤１３の占める範囲は狭くで
きるのでこの実施例では、パッド３が枠４の外周より内
側にあるため第１の実施例により小型化することができ
た。
【００１５】図３は、本発明の第３の実施例の半導体装
置パッケージの断面図である。第３の実施例では、ＭＣ
Ｍ基板３７が図１中のＭＣＭ基板１と枠４とが一体とな
ったものに相当する。ＭＣＭ基板３７は配線層３２，ス
ルーホール３３，外部接続用の端子５等を備えている。
ＭＣＭ基板３７は印刷配線基板の中央部を切削して凹部
を設ける等の方法で製造できる。この第３の実施例では
枠の取り付け作業が不要になり組立工数低減が図れた。
【００１６】図４（ａ）及び（ｂ）はそれぞれ本発明の
第４の実施例の半導体装置パッケージの斜視図及び断面
図である。枠１４はマザーボード１０との接続面に接続
用端子５を格子状、又は千鳥状に配置した構造で、ＭＣ
Ｍ基板１及びマザーボード１０との接続構造は、第１及
び第２の実施例と同様とした。この実施例ではマザーボ
ードとの接続ピッチを微細化することなく接続端子数を
増やすことができた。
【００１７】図５は本発明の第５の実施例の半導体装置
パッケーザの断面図である。第５の実施例のＭＣＭ基板
１は、マザーボード１０との接続面側の実装構造及び接
続構造を第１及び第２の実施例と同様とし、これらと異
なる点は、両面にＬＳＩチップ２を実装して配線パター
ン及び、スルーホール（図示略）により枠４との接続面
へ配線することで枠４を通じてマザーボード１０と電気
的に接続した。この実施例では、ＭＣＭ基板１の両面に
ＬＳＩチップ等の電子部品を搭載することで実装密度を
増やすことができた。
【００１８】図６は本発明の第６の実施例の半導体装置
パッケージ１５の構造を示す。大部分は第５の実施例と
同様で異る点としてはＭＣＭ基板１のマザーボード１０
との接続面側の反対面に設ける枠４を第１の実施例と同
様とし、枠４に端子７、半田ボール１１等を設けた。こ
の実施例では、同じ枠を使用することで部品を共通化し
部品種の削減を図ると共に、上部の半田ボール電極１１
を検査用プローブの接点に用いることで実装後の電気検
査を行うことが可能になった。
【００１９】図７は本発明の第７の実施例の断面図で、
図６の半導体装置パッケージ１５を、２個積み重ね、上
の段の半導体装置パッケージ１５の下側の枠４の端子５
と下の段の半導体装置パッケージ１５の上側の枠４の端
子５とを半田ボール１１により接続して積層形の半導体
装置パッケージ１７を構成している。図７においては半
導体装置用パッケージ１５を２段積み重ねているが、２
段に限ることはなく３段以上積み重ねることも可能であ
る。異なる回路を有する半導体装置パッケージを積み重
ね、半導体装置パッケージ１７を形成することも可能で
ある。第７の実施例では、マザーボード上への実装面積
を増やさず実装密度を向上することができた。
【００２０】
【発明の効果】以上説明したように本発明は、ＭＣＭ基
板に設けた枠のＭＣＭ基板と反対側の面に電極端子を設
けることにより、マザーボードに取り付けるＭＣＭ基板
の両面に半導体チップを搭載することができる。さらに
ＭＣＭ基板の両面に枠を設け、これらの枠に電極端子を
設けることにより半導体チップを搭載したＭＣＭ基板を
有する半導体装置パッケージを多段に積層して半導体チ
ップの実装密度を高めることができる。
【図面の簡単な説明】
【図１】（ａ）及び（ｂ）はそれぞれ本発明の第１の実
施例の斜視図及び断面図である。
【図２】本発明の第２の実施例の断面図である。
【図３】本発明の第３の実施例の断面図である。
【図４】（ａ）及び（ｂ）は本発明の第４の実施例の斜
視図及び断面図である。
【図５】本発明の第５の実施例の断面図である。
【図６】本発明の第６の実施例の断面図である。
【図７】本発明の第７の実施例の積層形の半導体パッケ
ージの断面図である。
【図８】従来の半導体装置パッケージの断面図である。
【図９】（ａ）及び（ｂ）はそれぞれ従来の他の半導体
装置パッケージの斜視図及び断面図である。
【符号の説明】
１ ＭＣＭ基板 ２ ＬＳＩチップ ３ パッド ４ 枠 ５ 端子 ６ 接着剤 ７ 端子 ８ 半田 ９ ダム １０ マザーボード １１ 半田ボール １２ 半田 １３ 接着剤 １４ 枠 １５ 半導体装置パッケージ １６ 枠 １７ 半導体装置パッケージ １８ バンプ １９ 半導体チップ ２０ ワイヤー ２１ ＭＣＭ基板 ２２ マザーボード ２３ ボールバンプ ２４ 枠 ２５ 封止樹脂 ２６ パッド ２７ 端子電極 ２８ 枠 ２９ ＬＳＩチップ ３０ ＭＣＭ基板 ３１ 半田ボール電極 ３２ 配線層 ３３ スルーホール

Claims (9)

    (57)【特許請求の範囲】
  1. 【請求項１】 半導体チップを搭載するＭＣＭ基板と、
    前記半導体チップを内側に囲み前記ＭＣＭ基板に設けら
    れた枠と、前記枠の内側に充填され前記半導体チップを
    封止する封止樹脂と、前記枠の面であって前記ＭＣＭ基
    板に対し反対側に位置する面に配列され電気的に前記Ｍ
    ＣＭ基板の回路に接続され突起状の半田又は導電ペース
    トを設けた電極端子とを含むことを特徴とする半導体装
    置パッケージ。
  2. 【請求項２】 半導体チップを両面に搭載するＭＣＭ基
    板と、前記半導体チップを内側に囲み前記ＭＣＭ基板の
    両面に設けられた２つの枠と、前記２つの枠の内側に充
    填され前記半導体チップを封止する封止樹脂と、前記２
    つの枠の少くとも一方のものの面であって前記ＭＣＭ基
    板に対し反対側に位置する面に配列され電気的に前記Ｍ
    ＣＭ基板の回路に接続され突起状の半田又は導電ペース
    トを設けた電極端子とを含むことを特徴とする半導体装
    置パッケージ。
  3. 【請求項３】 半導体装置パッケージは両面に半導体チ
    ップを搭載したＭＣＭ基板と、このＭＣＭ基板の両面に
    設けられて前記半導体チップを内側に囲む枠と、前記枠
    の内側に充填され前記半導体チップを封止する封止樹脂
    と、前記枠の面であって前記ＭＣＭ基板に対し反対側に
    位置する面に配列され電気的に前記ＭＣＭ基板の回路に
    接続され突起状の半田又は導電ペーストを設けた電極端
    子を備え、前記半導体装置パッケージを複数段重ね隣接
    する前記半導体装置パッケージの電極端子を互いに接続
    したことを特徴とする積層形の半導体装置パッケージ。
  4. 【請求項４】 枠のＭＣＭ基板側の面と前記ＭＣＭ基板
    とが接着剤で固着され、前記枠の外側面に電極端子と連
    接して側面端子が設けられ前記ＭＣＭ基板の前記枠より
    外側の部分に設けられたパッドと前記側面端子とが半田
    で接続された請求項１記載の半導体装置パッケージ。
  5. 【請求項５】 枠のＭＣＭ基板側の面に設けられた底面
    端子と前記ＭＣＭ基板に設けられたパッドとが半田で接
    続され前記枠の外側面に電極端子及び前記底面端子と連
    接する側面端子が設けられた請求項１記載の半導体装置
    パッケージ。
  6. 【請求項６】 枠のＭＣＭ基板側の面に設けられた底面
    端子と前記ＭＣＭ基板に設けられたパッドが異方性導電
    シートで電気的に接続され前記枠の外側面に電極端子及
    び前記底面端子と連接する側面端子が設けられた請求項
    １記載の半導体装置パッケージ。
  7. 【請求項７】 枠とＭＣＭ基板とが一体に形成された請
    求項１記載の半導体装置パッケージ。
  8. 【請求項８】 電極端子が格子状または千鳥状に配列さ
    れた請求項１、４、５、６又は７記載の半導体装置パッ
    ケージ。
  9. 【請求項９】 電極端子の突起状の半田の回りに絶縁性
    樹脂からなる半田流れ防止ダムを設けた請求項１．４、
    ５、６、７又は８記載の半導体装置パッケージ。
JP5297137A 1993-11-29 1993-11-29 半導体装置パッケ―ジ Expired - Lifetime JP2541487B2 (ja)

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JP5297137A JP2541487B2 (ja) 1993-11-29 1993-11-29 半導体装置パッケ―ジ
US08/350,122 US5570274A (en) 1993-11-29 1994-11-29 High density multichip module packaging structure

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JP2541487B2 true JP2541487B2 (ja) 1996-10-09

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