JP2018195623A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2018195623A JP2018195623A JP2017095922A JP2017095922A JP2018195623A JP 2018195623 A JP2018195623 A JP 2018195623A JP 2017095922 A JP2017095922 A JP 2017095922A JP 2017095922 A JP2017095922 A JP 2017095922A JP 2018195623 A JP2018195623 A JP 2018195623A
- Authority
- JP
- Japan
- Prior art keywords
- heat treatment
- film
- semiconductor device
- temperature
- interface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 123
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 33
- 238000010438 heat treatment Methods 0.000 claims abstract description 88
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 56
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 26
- 239000012298 atmosphere Substances 0.000 claims abstract description 25
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 22
- 239000001301 oxygen Substances 0.000 claims abstract description 22
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 22
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 13
- 239000010703 silicon Substances 0.000 claims abstract description 13
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 7
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 22
- 238000005229 chemical vapour deposition Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 3
- 230000007547 defect Effects 0.000 description 35
- 238000003949 trap density measurement Methods 0.000 description 16
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 14
- 230000005527 interface trap Effects 0.000 description 14
- 230000005684 electric field Effects 0.000 description 12
- 229910052814 silicon oxide Inorganic materials 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 239000000758 substrate Substances 0.000 description 10
- 239000012299 nitrogen atmosphere Substances 0.000 description 8
- 238000007254 oxidation reaction Methods 0.000 description 8
- 230000003647 oxidation Effects 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 6
- 238000011156 evaluation Methods 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 238000003763 carbonization Methods 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000004913 activation Effects 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 238000000137 annealing Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/048—Making electrodes
- H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/66181—Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors having potential barriers
- H01L29/94—Metal-insulator-semiconductors, e.g. MOS
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Optics & Photonics (AREA)
- Formation Of Insulating Films (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
なお、図面は模式的または概念的なものであり、各部分の厚さと幅との関係、部分間の大きさの比率などは、必ずしも現実のものと同一とは限らない。また、同じ部分を表す場合であっても、図面により互いの寸法や比率が異なって表される場合もある。
なお、本願明細書と各図において、既出の図に関して前述したものと同様の要素には同一の符号を付して詳細な説明は適宜省略する。
図2は、実施形態に係る半導体装置を例示する模式的断面図である。
図1に示すように、実施形態に係る半導体装置の製造方法は、第1膜の準備(ステップS110)、第1熱処理(ステップS120)、及び、第2熱処理(ステップS130)を含む。
図3は、実施形態に係る半導体装置の製造方法を例示する模式図である。
図3の横軸は、時間tmである。縦軸は、温度Tである。
図4は、上記の方法により作製された試料110a(トランジスタ)における電圧−電流特性の測定結果を示す。図4の横軸は、ドレイン電圧VD(V)である。縦軸は、ドレイン電流ID(mA)である。図4には、ゲート電圧VGが、5V、15V、20V及び25Vの時の特性が例示されている。図4に示すように、良好な特性が得られている。
図5は、試料110aにおける移動度μの評価結果を示す。図5の横軸は、ゲートにおける電界強度EF(MV/cm)である。縦軸は、移動度μ(cm2/(V・s))である。図5には、第1参考例の試料119の特性も示されている。試料119においては、上記の第1熱処理が行われず、第2熱処理だけが行われる。
図6は、試料110aのしきい値の変化の評価結果を例示している。この評価においては、試料110aにおいて、半導体部材50と第1導電膜E1(ゲート電極)と、の間に、直流電界が印加される。直流電界の印加時間Tsの経過に対する、しきい値電圧の変化ΔVthが評価される。図6の横軸は、印加時間Ts(103sec(秒))である。縦軸は、しきい値電圧の変化ΔVth(V)である。この例では、直流電界が、+4MV/cm、または、−2MV/cmであるときの特性が示されている。直流電界の印加における温度が、175℃である。
図7は、上記の試料110aの二次イオン質量分析(SIMS:Secondary Ion Mass Spectrometry)による分析結果を示している。図7の横軸は、Z軸方向における位置pZ(深さ)である。縦軸は、窒素の濃度CN(×1021cm−3)である。図7から分かるように、試料110aにおいては、半導体部材50と第1膜10との間の界面近傍(界面15を含む領域)において、高い濃度CNの窒素が観測される。この例では、界面近傍における窒素の濃度CN(ピーク濃度)は、約2.4×1021cm−3である。このように、実施形態に係る製造方法により作製された試料110aにおいては、高い濃度CN(例えば、1×1020cm−3以上1×1022cm−3以下)の窒素が観測できる。
図8に示すように、第1膜10は、界面近傍領域10a及びバルク領域10bを含む。界面近傍領域10aは、バルク領域10bと半導体部材50との間に位置する。一方、半導体部材50は、界面近傍領域50a及びバルク領域50bを含む。界面近傍領域50aは、バルク領域50bと第1膜10との間に位置する。
図9(a)及び図9(b)の横軸は、キャパシタ素子に印加される電界EG(MV/cm)である。図9(a)の縦軸は、電流密度JG(A/cm2)である。複数の素子に関して、図9(a)に示す特性が評価され、その評価結果から、複数の素子のそれぞれにおける破壊電界が導出される。その結果が統計的に処理され、図9(b)の特性が得られる。図9(b)は、複数の素子についての、破壊電界の分布を示す。図9(b)の縦軸は、標準偏差NDである。
図10に示すように、半導体装置111は、第1導電形の第1半導体領域51、第2導電形の第2半導体領域52、第1導電形の第3半導体領域53、第2導電形の第4半導体領域54、第1膜10、第1導電膜E1、第2導電膜E2、第3導電膜E3、及び、絶縁膜I1を含む。半導体装置111は、トランジスタである。上記の半導体領域は、例えば、窒化珪素を含む。第2半導体領域52が、上記の半導体部材50に対応する。第1膜10は、例えば、ゲート絶縁膜に対応する。第1導電膜E1は、ゲート電極に対応する。第2導電膜E2は、例えば、ソース電極に対応する。第3導電膜E3は、例えば、ドレイン電極に対応する。この例では、基板55(SiC基板)が設けられている。
図10に示すように、半導体装置111は、第1導電形の第1半導体領域51、第2導電形の第2半導体領域52、第1導電形の第3半導体領域53、第2導電形の第4半導体領域54、第1膜10、第1導電膜E1、第2導電膜E2、第3導電膜E3、及び、絶縁膜I1を含む。半導体装置111は、トランジスタである。上記の半導体領域は、例えば、炭化珪素を含む。第2半導体領域52が、上記の半導体部材50に対応する。第1膜10は、例えば、ゲート絶縁膜に対応する。第1導電膜E1は、ゲート電極に対応する。第2導電膜E2は、例えば、ソース電極に対応する。第3導電膜E3は、例えば、ドレイン電極に対応する。この例では、基板55(SiC基板)が設けられている。
Claims (9)
- 炭化珪素を含む半導体部材の上に堆積され珪素及び酸素を含む第1膜を、酸素を含む第1雰囲気中で500℃以上900℃以下の第1温度の第1熱処理を実施することと、
前記第1熱処理の後に前記第1膜を窒素を含む第2雰囲気で1200℃以上1400℃未満の第2温度の第2熱処理を実施することと、
を備えた、半導体装置の製造方法。 - 前記第2熱処理の後において、前記第1膜に含まれる窒素の濃度は、1×1020cm−3以上1×1022cm−3以下である、請求項1記載の半導体装置の製造方法。
- 前記第1膜は、化学気相成長により形成された、請求項1または2に記載の半導体装置の製造方法。
- 前記第1膜を前記半導体部材の上に堆積することをさらに備えた、請求項1〜3のいずれか1つに記載の半導体装置の製造方法。
- 前記第2雰囲気は、酸素を含まない、または、
前記第2雰囲気に含まれる酸素の濃度は、3vol%以下である、請求項1〜4のいずれか1つに記載の半導体装置の製造方法。 - 前記第1雰囲気における酸素の濃度は、5vol%以上である、請求項1〜5のいずれか1つに記載の半導体装置の製造方法。
- 前記第1熱処理と前記第2熱処理との間において、前記第1膜の温度を前記第1温度よりも低い第3温度にすることをさらに備えた、請求項1〜6のいずれか1つに記載の半導体装置の製造方法。
- 前記第1熱処理の前における前記第1膜の厚さは、20nm以上60nm以下である、請求項1〜7のいずれか1つに記載の半導体装置の製造方法。
- 前記第2熱処理の後に、前記第1膜の上に導電膜を形成することをさらに備えた、請求項1〜8のいずれか1つに記載の半導体装置の製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017095922A JP6805074B2 (ja) | 2017-05-12 | 2017-05-12 | 半導体装置の製造方法 |
US15/893,950 US10741395B2 (en) | 2017-05-12 | 2018-02-12 | Method for manufacturing semiconductor device |
CN201810160327.3A CN108878276B (zh) | 2017-05-12 | 2018-02-27 | 半导体装置的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017095922A JP6805074B2 (ja) | 2017-05-12 | 2017-05-12 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018195623A true JP2018195623A (ja) | 2018-12-06 |
JP6805074B2 JP6805074B2 (ja) | 2020-12-23 |
Family
ID=64096158
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017095922A Active JP6805074B2 (ja) | 2017-05-12 | 2017-05-12 | 半導体装置の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10741395B2 (ja) |
JP (1) | JP6805074B2 (ja) |
CN (1) | CN108878276B (ja) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008147365A (ja) * | 2006-12-08 | 2008-06-26 | Tohoku Univ | 半導体装置および半導体装置の製造方法 |
JP2011082454A (ja) * | 2009-10-09 | 2011-04-21 | Panasonic Corp | 絶縁膜構造体及びこれを用いた半導体装置 |
JP2011091186A (ja) * | 2009-10-22 | 2011-05-06 | Mitsubishi Electric Corp | 炭化珪素半導体装置の製造方法 |
WO2011111627A1 (ja) * | 2010-03-12 | 2011-09-15 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
JP2012227336A (ja) * | 2011-04-19 | 2012-11-15 | Mitsubishi Electric Corp | 絶縁膜の製造方法 |
JP2014241445A (ja) * | 2009-03-11 | 2014-12-25 | 三菱電機株式会社 | 炭化珪素半導体装置の製造方法 |
JP2015142078A (ja) * | 2014-01-30 | 2015-08-03 | 富士電機株式会社 | 炭化ケイ素半導体装置およびその製造方法 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4784975A (en) * | 1986-10-23 | 1988-11-15 | International Business Machines Corporation | Post-oxidation anneal of silicon dioxide |
US7101812B2 (en) * | 2002-09-20 | 2006-09-05 | Mattson Technology, Inc. | Method of forming and/or modifying a dielectric film on a semiconductor surface |
US7221010B2 (en) * | 2002-12-20 | 2007-05-22 | Cree, Inc. | Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors |
US7235812B2 (en) * | 2004-09-13 | 2007-06-26 | International Business Machines Corporation | Method of creating defect free high Ge content (>25%) SiGe-on-insulator (SGOI) substrates using wafer bonding techniques |
JP2008028070A (ja) * | 2006-07-20 | 2008-02-07 | Sumco Corp | 貼り合わせウェーハの製造方法 |
JP2009212365A (ja) * | 2008-03-05 | 2009-09-17 | Oki Semiconductor Co Ltd | 半導体装置の製造方法 |
KR20130043063A (ko) * | 2011-10-19 | 2013-04-29 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작 방법 |
CN105140283A (zh) * | 2015-07-28 | 2015-12-09 | 国网智能电网研究院 | 一种碳化硅MOSFETs功率器件及其制作方法 |
DE102016112877B4 (de) * | 2015-09-07 | 2021-07-15 | Fuji Electric Co., Ltd. | Verfahren zum Herstellen einer Halbleitervorrichtung und für das Verfahren verwendete Halbleiterherstellungsvorrichtung |
-
2017
- 2017-05-12 JP JP2017095922A patent/JP6805074B2/ja active Active
-
2018
- 2018-02-12 US US15/893,950 patent/US10741395B2/en active Active
- 2018-02-27 CN CN201810160327.3A patent/CN108878276B/zh active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008147365A (ja) * | 2006-12-08 | 2008-06-26 | Tohoku Univ | 半導体装置および半導体装置の製造方法 |
JP2014241445A (ja) * | 2009-03-11 | 2014-12-25 | 三菱電機株式会社 | 炭化珪素半導体装置の製造方法 |
JP2011082454A (ja) * | 2009-10-09 | 2011-04-21 | Panasonic Corp | 絶縁膜構造体及びこれを用いた半導体装置 |
JP2011091186A (ja) * | 2009-10-22 | 2011-05-06 | Mitsubishi Electric Corp | 炭化珪素半導体装置の製造方法 |
WO2011111627A1 (ja) * | 2010-03-12 | 2011-09-15 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
JP2012227336A (ja) * | 2011-04-19 | 2012-11-15 | Mitsubishi Electric Corp | 絶縁膜の製造方法 |
JP2015142078A (ja) * | 2014-01-30 | 2015-08-03 | 富士電機株式会社 | 炭化ケイ素半導体装置およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US10741395B2 (en) | 2020-08-11 |
CN108878276B (zh) | 2023-08-22 |
US20180330949A1 (en) | 2018-11-15 |
JP6805074B2 (ja) | 2020-12-23 |
CN108878276A (zh) | 2018-11-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5584823B2 (ja) | 炭化珪素半導体装置 | |
JP6305294B2 (ja) | 半導体装置及びその製造方法 | |
US7816688B2 (en) | Semiconductor device and production method therefor | |
JP5229845B2 (ja) | 炭化ケイ素mosfetの製造方法および炭化ケイ素mosfet | |
WO2014103186A1 (ja) | 炭化珪素半導体装置およびその製造方法 | |
JP2016157762A (ja) | 半導体装置及びその製造方法 | |
JP2011082454A (ja) | 絶縁膜構造体及びこれを用いた半導体装置 | |
US11757028B2 (en) | Semiconductor device and method for manufacturing the same | |
US20160197150A1 (en) | Semiconductor device and method for manufacturing the same | |
JP2016058658A (ja) | 炭化ケイ素半導体装置 | |
US20180233574A1 (en) | Silicon carbide power transistor apparatus and method of producing same | |
JP6629252B2 (ja) | 半導体装置の製造方法 | |
JP7154772B2 (ja) | 炭化珪素半導体装置の製造方法 | |
JP6805074B2 (ja) | 半導体装置の製造方法 | |
US10163637B2 (en) | Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device | |
US9887270B2 (en) | Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device | |
US20200035810A1 (en) | Structure and a manufacturing method of a mosfet with an element of iva group ion implantation | |
US20230064865A1 (en) | Semiconductor device and method for manufacturing semiconductor device | |
Constant et al. | Oxidation process by RTP for 4H-SiC MOSFET gate fabrication | |
JP2018157076A (ja) | Mfs型の電界効果トランジスタ | |
JP2023035819A (ja) | 半導体装置、及び、半導体装置の製造方法 | |
JP2016149428A (ja) | 半導体装置とその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180117 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20190318 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20191226 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20200120 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200226 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20200812 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20201104 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20201203 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 6805074 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |