JP2018191016A - 封止された半導体発光デバイス - Google Patents
封止された半導体発光デバイス Download PDFInfo
- Publication number
- JP2018191016A JP2018191016A JP2018169311A JP2018169311A JP2018191016A JP 2018191016 A JP2018191016 A JP 2018191016A JP 2018169311 A JP2018169311 A JP 2018169311A JP 2018169311 A JP2018169311 A JP 2018169311A JP 2018191016 A JP2018191016 A JP 2018191016A
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- Prior art keywords
- layer
- conductive
- wafer
- metal
- metal layer
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 85
- 229910052751 metal Inorganic materials 0.000 claims abstract description 130
- 239000002184 metal Substances 0.000 claims abstract description 130
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 22
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 20
- 239000010931 gold Substances 0.000 claims description 20
- 239000010949 copper Substances 0.000 claims description 19
- 229910052737 gold Inorganic materials 0.000 claims description 19
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 18
- 229910052802 copper Inorganic materials 0.000 claims description 18
- 229910052759 nickel Inorganic materials 0.000 claims description 11
- 239000011810 insulating material Substances 0.000 claims description 8
- 239000004020 conductor Substances 0.000 claims description 5
- 239000000758 substrate Substances 0.000 abstract description 60
- 238000000034 method Methods 0.000 abstract description 40
- 238000007789 sealing Methods 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 241
- 235000012431 wafers Nutrition 0.000 description 81
- 239000000463 material Substances 0.000 description 44
- 239000012777 electrically insulating material Substances 0.000 description 17
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 15
- 229910052710 silicon Inorganic materials 0.000 description 13
- 238000005530 etching Methods 0.000 description 12
- 239000010703 silicon Substances 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 11
- 238000007747 plating Methods 0.000 description 11
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 9
- 238000000059 patterning Methods 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000000203 mixture Substances 0.000 description 4
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- 239000002131 composite material Substances 0.000 description 3
- 238000011109 contamination Methods 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- -1 dielectric Substances 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- 239000002019 doping agent Substances 0.000 description 3
- 238000010292 electrical insulation Methods 0.000 description 3
- 239000000374 eutectic mixture Substances 0.000 description 3
- 238000000227 grinding Methods 0.000 description 3
- 238000001465 metallisation Methods 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 2
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229920000642 polymer Polymers 0.000 description 2
- 239000002096 quantum dot Substances 0.000 description 2
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 2
- 229910010271 silicon carbide Inorganic materials 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- 229910008599 TiW Inorganic materials 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005422 blasting Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- YOCUPQPZWBBYIX-UHFFFAOYSA-N copper nickel Chemical compound [Ni].[Cu] YOCUPQPZWBBYIX-UHFFFAOYSA-N 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000000975 dye Substances 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000001746 injection moulding Methods 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000011344 liquid material Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000011325 microbead Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 239000002159 nanocrystal Substances 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical class [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000009987 spinning Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 238000001429 visible spectrum Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L33/0004—Devices characterised by their operation
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- H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
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- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/387—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
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- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/29076—Plural core members being mutually engaged together, e.g. through inserts
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- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H01L2224/29186—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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- H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
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Abstract
Description
(付記1)
n型領域とp型領域との間に挟まれる発光層を含む半導体構造体と、各半導体デバイス用の第1及び第2の金属コンタクトであって、各第1の金属コンタクトは、前記n型領域に直接的に接触し、各第2の金属コンタクトは、前記p型領域に直接的に接触する、前記第1及び第2の金属コンタクトと、を含む、半導体デバイスのウェハを提供するステップと、
各半導体デバイスの前記半導体構造体を封止する構造体を形成するステップと、
前記半導体デバイスの前記ウェハを、支持基板のウェハに取付けるステップと、
を含む、方法。
(付記2)
各半導体デバイスの前記半導体構造体を封止する構造体を形成するステップは、
前記ウェハ上の各半導体デバイスの前記第1及び第2の金属コンタクト上に、それぞれ、後の処理の間に前記半導体構造体を支えるのに十分に厚い第1及び第2の金属層を形成するステップと、
第1及び第2の金属層を形成した後に、前記第1及び第2の金属層間の間隙を埋める電気絶縁層を形成するステップと、
を含む、付記1に記載の方法。
(付記3)
前記支持基板の前記ウェハは、本体の表面上に形成される複数の接合金属領域を含む、付記2に記載の方法。
(付記4)
前記半導体デバイスの前記ウェハを、前記支持基板の前記ウェハに取付けるステップは、前記支持基板の前記ウェハ上の前記複数の接合金属領域を、前記半導体デバイスの前記ウェハ上の前記第1及び第2の金属層と位置合わせするステップを含む、付記3に記載の方法。
(付記5)
前記半導体デバイスの前記ウェハを、前記支持基板の前記ウェハに取付けるステップは更に、前記複数の接合金属領域がリフローするように前記複数の接合金属領域を加熱するステップを含む、付記4に記載の方法。
(付記6)
前記電気絶縁層を形成するステップは、前記複数の接合金属領域が加熱される場合に前記接合金属が濡れない材料の前記電気絶縁層を形成するステップを含む、付記5に記載の方法。
(付記7)
第1及び第2の金属層を形成するステップは、前記半導体デバイスの前記ウェハ上に、第1及び第2の金属層をめっきするステップを含む、付記2に記載の方法。
(付記8)
前記第1及び第2の金属層は、少なくとも50μmの厚さである、付記2に記載の方法。
(付記9)
前記電気絶縁層を形成するステップは、
前記半導体デバイスの前記ウェハ上にモールドを位置付けるステップと、
前記モールドを、電気絶縁モールド材料によって埋めるステップと、
前記モールド材料を硬化させるステップと、
を含む、付記2に記載の方法。
(付記10)
各半導体デバイスの前記半導体構造体を封止する前記構造体を形成した後に、前記半導体デバイスの前記ウェハをダイシングするステップを更に含む、付記1に記載の方法。
(付記11)
前記半導体デバイスの前記ウェハを、前記支持基板の前記ウェハに取付けた後に、前記半導体デバイスの前記ウェハから成長用基板を取り除くステップを更に含む、付記1に記載の方法。
(付記12)
前記支持基板の前記ウェハを形成するステップを更に含み、
前記支持基板の前記ウェハを形成するステップは、
本体を提供するステップと、
前記本体の底面から前記本体の上面に向かってそれぞれ延在する複数のビアを前記本体内にエッチングするステップと、
前記複数のビアのそれぞれの側壁及び最上部を金属でライニングするステップと、
を含む、付記1に記載の方法。
(付記13)
前記支持基板の前記ウェハを形成するステップは更に、
各ビアの前記最上部における前記金属を露出するように、前記本体の前記上面から前記本体を薄化するステップと、
前記本体の前記上面上に、各ビアの前記最上部における前記金属と直接的に接触する接合金属領域を形成するステップと、
前記本体の上面上に電気絶縁層を形成するステップと、
を含む、付記12に記載の方法。
(付記14)
前記支持基板の前記ウェハを形成するステップを更に含み、
前記支持基板の前記ウェハを形成するステップは、
本体を提供するステップと、
前記本体の上面上に接合金属層を形成するステップと、
ビアそれぞれが、前記本体の底面から前記本体の上面に向かって延在し、前記本体の前記上面上に形成された前記接合金属層で終端する複数のビアを前記本体内にエッチングするステップと、
を含む、付記1に記載の方法。
(付記15)
各ビアの最上部上に配置される電気的に絶縁された接合金属領域を形成するように、前記本体の前記上面上の前記接合金属層をパターニングするステップと、
第2の金属層それぞれが、各ビアの側壁及び前記本体の底面上に形成され、各ビアの前記最上部に配置される前記電気的に絶縁された接合金属領域と直接的に接触する複数の第2の金属層を形成するステップと、
を更に含む、付記14に記載の方法。
(付記16)
各半導体デバイスの前記半導体構造体を封止する構造体を形成するステップは、前記半導体構造体を汚染から保護する構造体を形成するステップを含む、付記1に記載の方法。
(付記17)
n型領域とp型領域との間に挟まれるIII窒化物発光層を含む半導体構造体と、
前記n型領域と直接的に接触する第1の金属層と、前記p型領域と直接的に接触する第2の金属層と、
前記第1及び第2の金属層上に配置され、前記半導体構造体を支えるのに十分に厚い第3及び第4の金属層と、
前記第3及び第4の金属層間の間隙を埋める電気絶縁層と、
を含み、
前記第3及び第4の金属層と、前記電気絶縁層とは、前記半導体構造体を封止する、デバイス。
(付記18)
前記第3及び第4の金属層は、少なくとも50μmの厚さである、付記17に記載のデバイス。
(付記19)
前記第3及び第4の金属層は、前記第1及び第2の金属層上にめっきされる、付記17に記載のデバイス。
(付記20)
シリコンマウントを更に含み、前記第3及び第4の金属層は、前記半導体構造体と前記シリコンマウントとの間に配置される、付記17に記載のデバイス。
12 LED
20 p−コンタクト
22 n−コンタクト
26、28 厚い金属層
30 間隔
40 本体
42、44 ビア
46 誘電体層
48、50 導電層
Claims (12)
- n型領域とp型領域との間に配置されたIII族窒化物発光層を有する半導体構造体と、
金属層であり、該金属層において形成され、かつ、絶縁材料で充填された開口を有し、
前記開口は、前記金属層を第2部分から電気的に絶縁された第1部分へと分離しており、
前記第1部分は前記n型領域に対して接続され、かつ、前記第2部分は前記p型領域に対して接続されている、
金属層と、
複数の導電性スタックであり、該導電性スタックそれぞれの第1表面は、前記半導体構造体と反対側の前記金属層の表面と接触しており、前記導電性スタック間には、それぞれに間隙が配置されている、複数の導電性スタックと、
前記第1表面の反対側にある前記導電性スタックそれぞれの第2表面と直接的に接触している本体と、
を含む、デバイス。 - 前記絶縁材料は、前記半導体構造体の露出された全ての表面を完全にカバーする、
請求項1に記載のデバイス。 - 前記金属層は、前記複数の導電性スタックに対して接合されている、
請求項1に記載のデバイス。 - 前記本体は、該本体において形成された複数のビアを含み、前記複数のビアそれぞれは、前記複数の導電性スタックのうち1つと整列されている、
請求項1に記載のデバイス。 - 前記ビアそれぞれは、導電性材料と一列に並べられており、該導電性材料は、また、前記複数の導電性スタックと隣接していない前記本体の外部表面も一列に並べる、
請求項4に記載のデバイス。 - 前記ビアそれぞれを一列に並べる前記導電性材料は、前記複数の導電性スタックのうちそれぞれ1つと結合されている、
請求項5に記載のデバイス。 - 前記導電性スタックそれぞれは、複数の異なる導電性材料に係るスタックを含む、
請求項1に記載のデバイス。 - 前記導電性スタックそれぞれは、銅、ニッケル、および金の連続的な層を含む、
請求項1に記載のデバイス。 - 前記導電性スタック間の前記間隙は、周囲ガスで充填されている、
請求項1に記載のデバイス。 - 前記導電性スタックと、前記金属層の前記第1部分および前記第2部分とは、全てが同一の形状を有している、
請求項1に記載のデバイス。 - 前記導電性スタックと、前記金属層の前記第1部分および前記第2部分とは、異なる形状を有している、
請求項1に記載のデバイス。 - 反対側の導電性スタックと、前記金属層の前記第1部分または前記第2部分とは、正確には整列されていない、
請求項1に記載のデバイス。
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-
2013
- 2013-03-22 CN CN201380018252.0A patent/CN104205366B/zh active Active
- 2013-03-22 WO PCT/IB2013/052290 patent/WO2013144801A1/en active Application Filing
- 2013-03-22 CN CN201810908784.6A patent/CN109994586B/zh active Active
- 2013-03-22 JP JP2015502504A patent/JP6470677B2/ja active Active
- 2013-03-22 KR KR1020147030395A patent/KR102129146B1/ko active IP Right Grant
- 2013-03-22 EP EP13722081.0A patent/EP2831930B1/en active Active
- 2013-03-22 US US14/387,591 patent/US10020431B2/en active Active
-
2018
- 2018-07-09 US US16/030,325 patent/US20180323353A1/en not_active Abandoned
- 2018-09-11 JP JP2018169311A patent/JP2018191016A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
US10020431B2 (en) | 2018-07-10 |
WO2013144801A1 (en) | 2013-10-03 |
EP2831930A1 (en) | 2015-02-04 |
KR102129146B1 (ko) | 2020-07-02 |
CN104205366B (zh) | 2018-08-31 |
US20180323353A1 (en) | 2018-11-08 |
KR20150002717A (ko) | 2015-01-07 |
CN109994586A (zh) | 2019-07-09 |
EP2831930B1 (en) | 2018-09-19 |
CN109994586B (zh) | 2022-06-03 |
JP6470677B2 (ja) | 2019-02-13 |
JP2015514319A (ja) | 2015-05-18 |
CN104205366A (zh) | 2014-12-10 |
US20150076538A1 (en) | 2015-03-19 |
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