JP2017022126A - Manufacturing method of anisotropically conductive member - Google Patents

Manufacturing method of anisotropically conductive member Download PDF

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JP2017022126A
JP2017022126A JP2016170735A JP2016170735A JP2017022126A JP 2017022126 A JP2017022126 A JP 2017022126A JP 2016170735 A JP2016170735 A JP 2016170735A JP 2016170735 A JP2016170735 A JP 2016170735A JP 2017022126 A JP2017022126 A JP 2017022126A
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conductive member
anisotropic conductive
residual stress
base material
insulating base
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JP6166826B2 (en
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佑介 小沢
Yusuke Ozawa
佑介 小沢
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Fujifilm Corp
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    • C25D11/00Electrolytic coating by surface reaction, i.e. forming conversion layers
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    • C25D11/00Electrolytic coating by surface reaction, i.e. forming conversion layers
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    • C25D11/00Electrolytic coating by surface reaction, i.e. forming conversion layers
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    • C25D11/00Electrolytic coating by surface reaction, i.e. forming conversion layers
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    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48After-treatment of electroplated surfaces
    • C25D5/50After-treatment of electroplated surfaces by heat-treatment
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
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    • C23C18/1603Process or apparatus coating on selected surface areas
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601Process or apparatus
    • C23C18/1633Process of electroless plating
    • C23C18/1646Characteristics of the product obtained
    • C23C18/165Multilayered product
    • C23C18/1653Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating
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    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02Anodisation
    • C25D11/04Anodisation of aluminium or alloys based thereon
    • C25D11/06Anodisation of aluminium or alloys based thereon characterised by the electrolytes used
    • C25D11/10Anodisation of aluminium or alloys based thereon characterised by the electrolytes used containing organic acids
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    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02Anodisation
    • C25D11/04Anodisation of aluminium or alloys based thereon
    • C25D11/16Pretreatment, e.g. desmutting
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    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/38Electroplating: Baths therefor from solutions of copper

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of an anisotropically conductive member which can prevent breakage of an insulating base material.SOLUTION: The manufacturing method of an anisotropically conductive member includes a residual stress relaxation step of obtaining an anisotropically conductive member subjected to a treatment to relax residual stress after manufacturing the anisotropically conductive member having multiple conductive paths filled with electric conductive members in multiple micropores of an insulating base material consisting of an anodized film.SELECTED DRAWING: Figure 1

Description

本発明は、異方導電性部材の製造方法に関する。   The present invention relates to a method for manufacturing an anisotropic conductive member.

異方導電性部材は、半導体素子等の電子部品と回路基板との間に挿入し、加圧するだけで電子部品と回路基板間の電気的接続が得られるため、半導体素子等の電子部品を接続するための電気的接続部材や半導体素子等の電子部品を機能検査するための検査用コネクタ等として広く使用されている。   An anisotropic conductive member is inserted between an electronic component such as a semiconductor element and a circuit board, and an electrical connection between the electronic component and the circuit board can be obtained simply by applying pressure. It is widely used as an inspection connector for functionally inspecting electronic components such as electrical connection members and semiconductor elements.

例えば、特許文献1には、「絶縁性基材中に、導電性部材からなる複数の導通路が、互いに絶縁された状態で絶縁性基材を厚み方向に貫通し、かつ、各導通路の一端が絶縁性基材の一方の面において露出し、各導通路の他端が絶縁性基材の他方の面において露出した状態で設けられる異方導電性部材であって、導通路の密度が200万個/mm2以上であり、絶縁性基材がマイクロポアを有するアルミニウム基板の陽極酸化膜からなる構造体である、異方導電性部材。」が開示されている。 For example, Patent Document 1 states that “in the insulating base material, a plurality of conductive paths made of conductive members penetrate the insulating base material in the thickness direction while being insulated from each other, and each conductive path An anisotropic conductive member provided with one end exposed at one surface of the insulating base material and the other end of each conductive path exposed at the other surface of the insulating base material, and the density of the conductive paths is An anisotropic conductive member that is a structure made of an anodized film of an aluminum substrate having a micropore of 2 million pieces / mm 2 or more ”is disclosed.

また、特許文献2には、「貫通孔(マイクロポア)への金属(導通路)の仮想充填率が100%よりも大きくなるように、電解めっき処理により貫通孔へ金属を充填する工程、および、電解めっき処理によって絶縁性基材の表面に付着した金属を研磨処理により除去する工程を有し、貫通孔内部に充填される金属の平均結晶粒子径と、絶縁性基材の表面に付着する金属の平均結晶粒子径と、の差が20nm以下となるように電解めっき処理を実施することを特徴とする金属充填微細構造体(異方導電性部材)の製造方法。」が開示されている。   Patent Document 2 states that “a step of filling the through hole with metal by electrolytic plating so that the virtual filling rate of the metal (conduction path) into the through hole (micropore) is greater than 100%; and And a step of removing metal adhering to the surface of the insulating base material by electrolytic plating treatment by polishing treatment, and attaching to the surface of the insulating base material and the average crystal particle diameter of the metal filled in the through holes A method for producing a metal-filled microstructure (anisotropic conductive member), characterized in that the electrolytic plating process is performed so that the difference between the average crystal particle diameter of the metal and the metal particle diameter is 20 nm or less. " .

特開2008−270158号公報JP 2008-270158 A 特開2011−202194号公報JP 2011-202194 A

しかしながら、特許文献1の異方導電性部材では、その製造工程において、例えば絶縁性基材を貫通するように複数の導通路を設ける際に、内部に残留応力が蓄積されており、外部から熱などのエネルギーが加えられることにより絶縁性基材が破損するおそれがある。このため、例えば、異方導電性部材に電子部品を接続するための配線を形成すると、配線形成時の熱により破損(例えば、クラック等)が生じ、実装品の得率の低下を招くといった問題があった。   However, in the anisotropic conductive member of Patent Document 1, in the manufacturing process, for example, when a plurality of conduction paths are provided so as to penetrate the insulating base material, residual stress is accumulated inside, and heat is generated from the outside. There is a possibility that the insulating base material may be damaged by applying energy such as. For this reason, for example, when a wiring for connecting an electronic component to an anisotropic conductive member is formed, damage (for example, a crack or the like) occurs due to heat at the time of wiring formation, and the yield of a mounted product is reduced. was there.

そこで、絶縁性基材の破損を抑制するために、特許文献2では、残留応力が大きく発生しないように異方導電性部材の製造を行っている。
本発明は、特許文献2と同様、絶縁性基材の破損を抑制することができる異方導電性部材の製造方法を提供することを課題とする。
Therefore, in order to suppress damage to the insulating base material, in Patent Document 2, an anisotropic conductive member is manufactured so that a large residual stress does not occur.
This invention makes it a subject to provide the manufacturing method of the anisotropically conductive member which can suppress the failure | damage of an insulating base material similarly to patent document 2. FIG.

本発明者は、上記課題を達成すべく鋭意検討した結果、導通路を形成した後に残留応力を緩和する処理を施すことにより、絶縁性基材の破損を抑制することを見出し、本発明を完成させた。
すなわち、本発明は、以下の構成の異方導電性部材の製造方法を提供する。
As a result of intensive studies to achieve the above-mentioned problems, the present inventor has found that the insulation substrate is prevented from being damaged by applying a treatment for relaxing the residual stress after forming the conduction path, and the present invention has been completed. I let you.
That is, this invention provides the manufacturing method of the anisotropically conductive member of the following structures.

(1) 陽極酸化膜からなる絶縁性基材の複数のマイクロポアに導電性部材が充填された複数の導通路を有する異方導電性部材を作製した後に、
残留応力を緩和する処理を施した異方導電性部材を得る残留応力緩和工程を具備し、
前記残留応力緩和工程は、液体に浸しつつ超音波振動を与える工程である異方導電性部材の製造方法。
(1) After producing an anisotropic conductive member having a plurality of conduction paths in which a plurality of micropores of an insulating base material made of an anodized film is filled with a conductive member,
Comprising a residual stress relaxation step for obtaining an anisotropic conductive member subjected to a treatment for relaxing residual stress;
The method for manufacturing an anisotropic conductive member, wherein the residual stress relaxation step is a step of applying ultrasonic vibration while being immersed in a liquid.

(2) 残留応力緩和工程は、超音波振動を20kHz〜100kHzで与える工程である(1)に記載の異方導電性部材の製造方法。   (2) The method for producing an anisotropic conductive member according to (1), wherein the residual stress relaxation step is a step of applying ultrasonic vibration at 20 kHz to 100 kHz.

(3) 残留応力緩和工程は、超音波振動を10分以上与える工程である(1)または(2)に記載の異方導電性部材の製造方法。   (3) The residual stress relaxation step is a method for producing an anisotropic conductive member according to (1) or (2), which is a step of applying ultrasonic vibration for 10 minutes or more.

本発明によれば、絶縁性基材の破損を抑制することができる異方導電性部材の製造方法を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the anisotropically conductive member which can suppress the failure | damage of an insulating base material can be provided.

異方導電性部材の好適な実施形態の一例を示す簡略図であり、図1(A)は正面図、図1(B)は図1(A)の切断面線Ib−Ibからみた断面図である。FIG. 1A is a simplified view showing an example of a preferred embodiment of an anisotropic conductive member, FIG. 1A is a front view, and FIG. 1B is a cross-sectional view taken along a cutting plane line Ib-Ib in FIG. It is. マイクロポアの規則化度を算出する方法の説明図である。It is explanatory drawing of the method of calculating the regularization degree of a micropore. 本発明の異方導電性部材の製造方法の一例を説明する断面図である。It is sectional drawing explaining an example of the manufacturing method of the anisotropically conductive member of this invention. 電着処理を施した異方導電性部材を示す断面図である。It is sectional drawing which shows the anisotropically conductive member which performed the electrodeposition process. 異方導電性接合パッケージの一例を示す図である。It is a figure which shows an example of an anisotropically conductive joining package.

以下に、本発明の異方導電性部材の製造方法および異方導電性接合パッケージの製造方法を詳細に説明する。
本発明の異方導電性部材の製造方法において、後述する残留応力緩和行程に用いられる異方導電性部材は、陽極酸化膜からなる絶縁性基材の複数のマイクロポアに導電性部材が充填された複数の導通路を有する異方導電性部材である。
次に、この異方導電性部材について、図1を用いて説明する。
Below, the manufacturing method of the anisotropic conductive member of this invention and the manufacturing method of an anisotropic conductive junction package are demonstrated in detail.
In the anisotropic conductive member manufacturing method of the present invention, the anisotropic conductive member used in the residual stress relaxation step described later is formed by filling a plurality of micropores of an insulating substrate made of an anodized film with a conductive member. An anisotropic conductive member having a plurality of conduction paths.
Next, this anisotropic conductive member will be described with reference to FIG.

図1は、異方導電性部材の好適な実施態様の一例を示す簡略図であり、図1(A)は正面図、図1(B)は図1(A)の切断面線Ib−Ibからみた断面図である。
異方導電性部材1は、絶縁性基材2および導電性部材からなる複数の導通路3を具備するものである。
絶縁性基材2は、厚み方向Zに貫通する複数のマイクロポア4を有し、この複数のマイクロポア4内に複数の導通路3が充填されている。
複数の導通路3は、少なくとも絶縁性基材2の一方の面から他方の面まで複数のマイクロポア4内に設けられるが、図1(B)に示すように、各導通路3の一端が絶縁性基材2の一方の面2aから突出し、各導通路3の他端が絶縁性基材2の他方の面2bから突出した状態でマイクロポア4内に設けられるのが好ましい。即ち、各導通路3の両端は、絶縁性基材の主面である2aおよび2bから突出する各突出部3aおよび3bを有するのが好ましい。
次に、絶縁性基材および導通路について、材料、寸法、形成等を詳細に説明する。
FIG. 1 is a simplified diagram showing an example of a preferred embodiment of an anisotropic conductive member, FIG. 1 (A) is a front view, and FIG. 1 (B) is a section line Ib-Ib of FIG. 1 (A). It is sectional drawing seen from.
The anisotropic conductive member 1 includes a plurality of conductive paths 3 made of an insulating base material 2 and a conductive member.
The insulating substrate 2 has a plurality of micropores 4 penetrating in the thickness direction Z, and a plurality of conduction paths 3 are filled in the plurality of micropores 4.
The plurality of conductive paths 3 are provided in the plurality of micropores 4 from at least one surface of the insulating substrate 2 to the other surface. As shown in FIG. It is preferable to be provided in the micropore 4 in a state where it protrudes from one surface 2 a of the insulating base material 2 and the other end of each conduction path 3 protrudes from the other surface 2 b of the insulating base material 2. That is, it is preferable that both ends of each conduction path 3 have the protruding portions 3a and 3b protruding from 2a and 2b which are the main surfaces of the insulating base material.
Next, materials, dimensions, formation, and the like will be described in detail for the insulating base material and the conduction path.

[絶縁性基材]
異方導電性部材を構成する上記絶縁性基材は、マイクロポアを有するアルミニウム基板の陽極酸化膜からなる構造体であり、平面方向の絶縁性を保つように機能する。
本発明においては、上記絶縁性基材の厚み(図1(B)においては符号6で表される部分の全ての厚み)は、1〜1000μmの範囲内であるのが好ましく、5〜500μmの範囲内であるのがより好ましく、10〜300μmの範囲内であるのが更に好ましい。絶縁性基材の厚みが1μm以上であると絶縁性基材の取り扱いが良好であり、絶縁性基材の厚みが1000μm以下であると後述する異方導電性部材の製造方法において残留応力を容易に緩和することができる。
[Insulating substrate]
The insulating base material constituting the anisotropic conductive member is a structure made of an anodized film of an aluminum substrate having micropores, and functions to maintain the insulation in the planar direction.
In the present invention, the thickness of the insulating base material (all thicknesses of the portion represented by reference numeral 6 in FIG. 1B) is preferably in the range of 1 to 1000 μm, and preferably 5 to 500 μm. It is more preferable that it is within the range, and it is even more preferable that it is within the range of 10 to 300 μm. When the thickness of the insulating base material is 1 μm or more, the handling of the insulating base material is good, and when the thickness of the insulating base material is 1000 μm or less, residual stress is easily generated in the manufacturing method of the anisotropic conductive member described later. Can be relaxed.

本発明においては、平面方向に配置された複数の導通路間の絶縁性をより確実に担保し且つ部分的に応力が不均一化することを抑制する観点から、上記マイクロポアについて下記式(i)により定義される規則化度が50%以上であるのが好ましく、70%以上であるのがより好ましく、80%以上であるのが更に好ましい。   In the present invention, from the viewpoint of more reliably ensuring the insulation between the plurality of conductive paths arranged in the planar direction and suppressing the uneven stress partially, the following formula (i) ) Is preferably 50% or more, more preferably 70% or more, and still more preferably 80% or more.

規則化度(%)=B/A×100 (i)   Ordering degree (%) = B / A × 100 (i)

上記式(i)中、Aは、測定範囲におけるマイクロポアの全数を表す。Bは、一のマイクロポアの重心を中心とし、他のマイクロポアの縁に内接する最も半径が短い円を描いた場合に、その円の内部に上記一のマイクロポア以外のマイクロポアの重心を6個含むことになる上記一のマイクロポアの測定範囲における数を表す。   In the above formula (i), A represents the total number of micropores in the measurement range. B is centered on the center of gravity of one micropore, and when a circle with the shortest radius inscribed in the edge of another micropore is drawn, the center of gravity of the micropore other than the one micropore is placed inside the circle. This represents the number in the measurement range of the one micropore to be included.

図2は、ポアの規則化度を算出する方法の説明図である。図2を用いて、上記式(1)をより具体的に説明する。
図2(A)に示されるマイクロポア101は、マイクロポア101の重心を中心とし、他のマイクロポアの縁に内接する最も半径が短い円103(マイクロポア102に内接している。)を描いた場合に、円3の内部にマイクロポア101以外のマイクロポアの重心を6個含んでいる。したがって、マイクロポア101は、Bに算入される。
図2(B)に示されるマイクロポア104は、マイクロポア104の重心を中心とし、他のマイクロポアの縁に内接する最も半径が短い円106(マイクロポア105に内接している。)を描いた場合に、円106の内部にマイクロポア104以外のマイクロポアの重心を5個含んでいる。したがって、マイクロポア104は、Bに算入されない。
また、図2(B)に示されるマイクロポア107は、マイクロポア107の重心を中心とし、他のマイクロポアの縁に内接する最も半径が短い円109(マイクロポア108に内接している。)を描いた場合に、円109の内部にマイクロポア107以外のマイクロポアの重心を7個含んでいる。したがって、マイクロポア107は、Bに算入されない。
FIG. 2 is an explanatory diagram of a method for calculating the degree of ordering of pores. The above formula (1) will be described more specifically with reference to FIG.
A micropore 101 shown in FIG. 2 (A) draws a circle 103 (inscribed in the micropore 102) having the shortest radius that is centered on the center of gravity of the micropore 101 and inscribed in the edge of another micropore. In this case, the center of gravity of the micropores other than the micropores 101 is included in the circle 3. Therefore, the micropore 101 is included in B.
The micropore 104 shown in FIG. 2 (B) draws a circle 106 (inscribed in the micropore 105) having the shortest radius centered on the center of gravity of the micropore 104 and inscribed in the edge of another micropore. In such a case, the center of gravity of the micropores other than the micropores 104 is included inside the circle 106. Therefore, the micropore 104 is not included in B.
Further, the micropore 107 shown in FIG. 2B is centered on the center of gravity of the micropore 107 and has the shortest radius 109 inscribed in the edge of another micropore (inscribed in the micropore 108). Is drawn, the circle 109 includes seven centroids of micropores other than the micropore 107. Therefore, the micropore 107 is not included in B.

また、後述する導通路を直管構造とする観点から、上記マイクロポアが分岐構造を有しないこと、即ち、陽極酸化膜の一方の表面の単位面積あたりのマイクロポア数Aと、別表面の単位面積あたりのマイクロポア数Bの比率が、A/B=0.90〜1.10であるのが好ましく、A/B=0.95〜1.05であるのがより好ましく、A/B=0.98〜1.02であるのが特に好ましい。   In addition, from the viewpoint of making the conduction path described later have a straight tube structure, the micropores do not have a branch structure, that is, the number A of micropores per unit area of one surface of the anodized film and the unit of another surface The ratio of the number of micropores B per area is preferably A / B = 0.90 to 1.10, more preferably A / B = 0.95 to 1.05, and A / B = It is particularly preferably 0.98 to 1.02.

また、本発明においては、上記絶縁性基材における上記導通路間の幅(図1(B)においては符号7で表される部分)は、10nm以上であるのが好ましく、20〜200nmであるのがより好ましい。絶縁性基材における導通路間の幅がこの範囲であると、絶縁性基材が絶縁性の隔壁として十分に機能する。   Moreover, in this invention, it is preferable that the width | variety between the said conduction paths in the said insulating base material (part represented by the code | symbol 7 in FIG. 1 (B)) is 10 nm or more, and is 20-200 nm. Is more preferable. When the width between the conductive paths in the insulating substrate is within this range, the insulating substrate sufficiently functions as an insulating partition.

本発明においては、上記絶縁性基材は、例えば、アルミニウム基板を陽極酸化し、陽極酸化により生じたマイクロポアを貫通化することにより製造することができる。なお、アルミニウムの陽極酸化膜の素材であるアルミナは、従来公知の異方導電性フィルム等を構成する絶縁性基材(例えば、熱可塑性エラストマー等)と同様、電気抵抗率は1014Ω・cm程度である。
ここで、陽極酸化および貫通化の処理工程については、後述する本発明の異方導電性部材の製造方法において詳述する。
In the present invention, the insulating base material can be produced, for example, by anodizing an aluminum substrate and penetrating micropores generated by the anodization. Note that alumina, which is a material of an anodic oxide film of aluminum, has an electrical resistivity of 10 14 Ω · cm as in the case of an insulating base material (for example, a thermoplastic elastomer) that constitutes a conventionally known anisotropic conductive film or the like. Degree.
Here, the anodizing and penetrating treatment steps will be described in detail in the method for manufacturing an anisotropic conductive member of the present invention described later.

[導通路]
異方導電性部材を構成する上記導通路は、導電性部材からなるものであり、絶縁性基材の厚み方向に電気を導通する導通路として機能する。
上記導電性部材は、電気抵抗率が103Ω・cm以下の材料であれば特に限定されず、その具体例としては、金(Au)、銀(Ag)、銅(Cu)、アルミニウム(Al)、マグネシウム(Mg)、ニッケル(Ni)、インジウムがドープされたスズ酸化物(ITO)等が好適に例示される。
中でも、電気伝導性の観点から、銅、金、アルミニウム、ニッケルが好ましく、銅、金がより好ましい。また、後述する残留応力緩和工程において残留応力を容易に緩和できる理由から、銅およびニッケルが好ましい。
また、コストの観点から、導通路の上記絶縁性基材の両面から露出した面や突出した面(以下、「端面」ともいう。)の表面だけが金で形成されるのがより好ましい。
[Conduction path]
The conduction path constituting the anisotropic conductive member is made of a conductive member and functions as a conduction path that conducts electricity in the thickness direction of the insulating substrate.
The conductive member is not particularly limited as long as the electrical resistivity is 10 3 Ω · cm or less, and specific examples thereof include gold (Au), silver (Ag), copper (Cu), aluminum (Al ), Magnesium (Mg), nickel (Ni), indium-doped tin oxide (ITO), and the like.
Among these, from the viewpoint of electrical conductivity, copper, gold, aluminum, and nickel are preferable, and copper and gold are more preferable. Also, copper and nickel are preferable because the residual stress can be easily relaxed in the residual stress relaxation step described later.
Further, from the viewpoint of cost, it is more preferable that only the surfaces of the conductive path exposed from both surfaces of the insulating substrate or the surfaces of the protruding surfaces (hereinafter also referred to as “end faces”) are formed of gold.

本発明においては、上記導通路は柱状であり、その全ての導通路の直径(図1(B)においては符号8で表される部分)は5〜500nmの範囲内であるのが好ましく、20〜400nmの範囲内であるのがより好ましく、40〜200nmの範囲内であるのが更に好ましく、50〜100nmの範囲内であるのが特に好ましい。導通路の直径がこの範囲であると、電気信号を流した際に十分な応答が得ることができるため、異方導電性部材を電子部品の電気的接続部材や検査用コネクタとして、より好適に用いることができる。また、絶縁性基材の厚みが500nm以下であると、後述する残留応力緩和行程において残留応力を容易に緩和することができる。   In the present invention, the conducting paths are columnar, and the diameter of all the conducting paths (portion represented by reference numeral 8 in FIG. 1B) is preferably in the range of 5 to 500 nm. It is more preferably within the range of ˜400 nm, even more preferably within the range of 40 to 200 nm, and particularly preferably within the range of 50 to 100 nm. If the diameter of the conduction path is within this range, a sufficient response can be obtained when an electric signal is passed. Therefore, the anisotropic conductive member is more preferably used as an electrical connection member or inspection connector for electronic components. Can be used. Further, if the thickness of the insulating base material is 500 nm or less, the residual stress can be easily relaxed in the residual stress relaxation step described later.

また、本発明においては、上記絶縁性基材の厚みに対する上記導通路の中心線の長さ(長さ/厚み)は1.0〜1.2であるのが好ましく、1.0〜1.05であるのがより好ましい。上記絶縁性基材の厚みに対する上記導通路の中心線の長さがこの範囲であると、上記導通路が直管構造であると評価でき、電気信号を流した際に1対1の応答を確実に得ることができるため、異方導電性部材を電子部品の検査用コネクタや電気的接続部材として、より好適に用いることができる。   Moreover, in this invention, it is preferable that the length (length / thickness) of the center line of the said conduction path with respect to the thickness of the said insulating base material is 1.0-1.2, 1.0-1. More preferably, it is 05. When the length of the center line of the conduction path with respect to the thickness of the insulating substrate is within this range, it can be evaluated that the conduction path has a straight pipe structure, and a one-to-one response is obtained when an electric signal is passed. Since it can obtain reliably, an anisotropically conductive member can be used more suitably as an inspection connector of an electronic component, or an electrical connection member.

また、本発明においては、上記導通路の両端が上記絶縁性基材の両面から突出している場合、その突出した部分(図1(B)においては符号3aおよび3bで表される部分。以下、「バンプ」ともいう。)の高さは、10〜100nmであるのが好ましく、10〜50nmであるのがより好ましい。バンブの高さがこの範囲であると、電子部品の電極(パッド)部分との接合性が向上する。   Moreover, in this invention, when the both ends of the said conduction path protrude from both surfaces of the said insulating base material, the protruded part (The part represented by code | symbol 3a and 3b in FIG. 1 (B). The height of the “bump” is preferably 10 to 100 nm, and more preferably 10 to 50 nm. When the height of the bump is within this range, the bondability with the electrode (pad) portion of the electronic component is improved.

本発明においては、上記導通路は上記絶縁性基材によって互いに絶縁された状態で存在するものであるが、その密度は200万個/mm2以上であり、1000万個/mm2以上であるのが好ましく、5000万個/mm2以上であるのがより好ましく、1億個/mm2以上であるのが更に好ましい。
上記導通路の密度がこの範囲にあることにより、異方導電性部材は高集積化が一層進んだ現在においても半導体素子等の電子部品の検査用コネクタや電気的接続部材等として使用することができる。
In the present invention, the conductive paths exist in a state of being insulated from each other by the insulating base material, and the density thereof is 2 million pieces / mm 2 or more and 10 million pieces / mm 2 or more. Of 50 million / mm 2 or more, more preferably 100 million / mm 2 or more.
Due to the density of the conduction paths being in this range, anisotropic conductive members can be used as inspection connectors and electrical connection members for electronic components such as semiconductor elements even at the present time when the integration is further advanced. it can.

本発明においては、隣接する各導通路の中心間距離(図1においては符号9で表される部分。以下、「ピッチ」ともいう。)は、20〜500nmであるのが好ましく、40〜200nmであるのがより好ましく、50〜140nmであるのが更に好ましい。ピッチがこの範囲であると、導通路直径と導通路間の幅(絶縁性の隔壁厚)とのバランスがとりやすい。   In the present invention, the distance between the centers of adjacent conductive paths (a portion represented by reference numeral 9 in FIG. 1; hereinafter also referred to as “pitch”) is preferably 20 to 500 nm, and preferably 40 to 200 nm. Is more preferable, and it is still more preferable that it is 50-140 nm. When the pitch is within this range, it is easy to balance the conduction path diameter and the width between the conduction paths (insulating partition wall thickness).

異方導電性部材は、上述したように、高い絶縁性を維持しつつ高密度で電気の導通が確保でき、さらに後述する残留応力緩和行程において残留応力を容易に緩和できるという理由から、上記絶縁性基材の厚みは1〜1000μmであるのが好ましく、上記導通路の直径は5〜500nmであるのが好ましい。   As described above, the anisotropic conductive member is capable of ensuring electrical conduction at a high density while maintaining high insulation, and further, because the residual stress can be easily relaxed in the residual stress relaxation process described later. The thickness of the conductive substrate is preferably 1 to 1000 μm, and the diameter of the conduction path is preferably 5 to 500 nm.

本発明の異方導電性部材の製造方法(以下、単に「本発明の製造方法」ともいう。)は、陽極酸化膜からなる絶縁性基材の複数のマイクロポアに導電性部材が充填された複数の導通路を有する上述の異方導電性部材を作製した後に、
残留応力を緩和する処理を施した異方導電性部材を得る残留応力緩和工程を具備する異方導電性部材の製造方法である。
次に、本発明の異方導電性部材の製造方法の一例を示す。
In the method for manufacturing an anisotropic conductive member of the present invention (hereinafter also simply referred to as “the manufacturing method of the present invention”), a plurality of micropores of an insulating substrate made of an anodized film are filled with a conductive member. After producing the above anisotropic conductive member having a plurality of conduction paths,
It is a manufacturing method of an anisotropic conductive member which comprises the residual stress relaxation process which obtains the anisotropic conductive member which performed processing which eases residual stress.
Next, an example of the manufacturing method of the anisotropically conductive member of the present invention is shown.

本発明の異方導電性部材の製造方法は、
アルミニウム基板を陽極酸化する陽極酸化処理工程、
上記陽極酸化処理工程の後に、上記陽極酸化により生じた複数の細孔を貫通化して、複数のマイクロポアを有する絶縁性基材を得る貫通化処理工程、
上記貫通化処理工程の後に、得られた上記絶縁性基材における上記複数のマイクロポアの内部に導電性部材を充填して複数の導通路を形成する導通路形成工程、および、
上記導通路形成工程の後に、残留応力を緩和する処理を施した異方導電性部材を得る残留応力緩和工程を具備することが好ましい。
次に、本発明の製造方法について各処理工程を詳述する。
The method for producing the anisotropic conductive member of the present invention is as follows.
An anodizing process for anodizing an aluminum substrate;
After the anodizing treatment step, a plurality of pores generated by the anodizing are penetrated to obtain an insulating substrate having a plurality of micropores,
After the penetration process step, a conductive path forming step of forming a plurality of conductive paths by filling the inside of the plurality of micropores in the obtained insulating base material with a conductive member; and
It is preferable to provide the residual stress relaxation process which obtains the anisotropically conductive member which performed the process which relaxes a residual stress after the said conduction path formation process.
Next, each process process is explained in full detail about the manufacturing method of this invention.

[アルミニウム基板]
本発明の製造方法に用いられるアルミニウム基板は、特に限定されず、その具体例としては、純アルミニウム板;アルミニウムを主成分とし微量の異元素を含む合金板;低純度のアルミニウム(例えば、リサイクル材料)に高純度アルミニウムを蒸着させた基板;シリコンウエハー、石英、ガラス等の表面に蒸着、スパッタ等の方法により高純度アルミニウムを被覆させた基板;アルミニウムをラミネートした樹脂基板;等が挙げられる。
[Aluminum substrate]
The aluminum substrate used in the production method of the present invention is not particularly limited, and specific examples thereof include a pure aluminum plate; an alloy plate containing aluminum as a main component and a trace amount of foreign elements; low-purity aluminum (for example, recycled material) ) On which a high-purity aluminum is deposited; a substrate on which the surface of silicon wafer, quartz, glass or the like is coated with high-purity aluminum by a method such as vapor deposition or sputtering; a resin substrate on which aluminum is laminated;

本発明においては、アルミニウム基板のうち、後述する陽極酸化処理工程により陽極酸化膜を設ける表面は、アルミニウム純度が、99.5質量%以上であるのが好ましく、99.9質量%以上であるのがより好ましく、99.99質量%以上であるのが更に好ましい。アルミニウム純度が上記範囲であると、マイクロポア配列の規則性が十分となる。   In the present invention, of the aluminum substrate, the surface on which the anodized film is provided by an anodizing process described later preferably has an aluminum purity of 99.5% by mass or more, and 99.9% by mass or more. Is more preferable, and it is still more preferable that it is 99.99 mass% or more. When the aluminum purity is in the above range, the regularity of the micropore array is sufficient.

また、本発明においては、アルミニウム基板のうち後述する陽極酸化処理工程を施す表面は、あらかじめ脱脂処理および鏡面仕上げ処理が施されるのが好ましい。
ここで、熱処理、脱脂処理および鏡面仕上げ処理については、特許文献1(特開2008−270158号公報)の[0044]〜[0054]段落に記載された各処理と同様の処理を施すことができる。
Moreover, in this invention, it is preferable that the surface which performs the anodic oxidation process mentioned later among aluminum substrates performs a degreasing process and a mirror surface finishing process previously.
Here, about heat processing, a degreasing process, and a mirror surface finishing process, the process similar to each process described in the paragraph [0044]-[0054] of patent document 1 (Unexamined-Japanese-Patent No. 2008-270158) can be performed. .

[陽極酸化処理工程]
上記陽極酸化工程は、上記アルミニウム基板に陽極酸化処理を施すことにより、該アルミニウム基板表面にマイクロポアを有する酸化皮膜を形成する工程である。
本発明の製造方法における陽極酸化処理は、従来公知の方法を用いることができるが、細孔配列の規則性を高くし、平面方向の導電部の絶縁性をより確実に担保する観点から、自己規則化法や定電圧処理を用いるのが好ましい。
ここで、陽極酸化処理の自己規則化法や定電圧処理については、特許文献1(特開2008−270158号公報)の[0056]〜[0108]段落および[図3]に記載された各処理と同様の処理を施すことができる。
[Anodizing process]
The anodic oxidation step is a step of forming an oxide film having micropores on the surface of the aluminum substrate by subjecting the aluminum substrate to an anodic oxidation treatment.
For the anodizing treatment in the production method of the present invention, a conventionally known method can be used. From the viewpoint of increasing the regularity of the pore arrangement and ensuring the insulation of the conductive portion in the planar direction more reliably, It is preferable to use a regularization method or a constant voltage process.
Here, for the self-ordering method and the constant voltage treatment of the anodizing treatment, each treatment described in paragraphs [0056] to [0108] and [FIG. 3] of Patent Document 1 (Japanese Patent Laid-Open No. 2008-270158). The same processing can be performed.

[貫通化処理工程]
上記貫通化処理工程は、上記陽極酸化処理工程の後に、上記陽極酸化により生じた複数の細孔を貫通化して、複数のマイクロポアを有する絶縁性基材を得る工程である。
上記貫通化処理工程としては、具体的には、例えば、上記陽極酸化処理工程の後に、アルミニウム基板を溶解し、陽極酸化膜の底部を除去する方法;上記陽極酸化処理工程の後に、アルミニウム基板およびアルミニウム基板近傍の陽極酸化膜を切断する方法;等が挙げられる。
ここで、貫通化処理工程におけるこれらの方法については、例えば、特許文献1(特開2008−270158号公報)の[0110]〜[0121]段落ならびに[図3]および[図4]に記載された各方法と同様の方法が挙げられる。
[Penetration process]
The penetrating treatment step is a step of obtaining an insulating base material having a plurality of micropores by penetrating a plurality of pores generated by the anodizing after the anodizing treatment step.
Specifically, as the penetration treatment step, for example, after the anodizing treatment step, a method of dissolving the aluminum substrate and removing the bottom of the anodized film; after the anodizing treatment step, the aluminum substrate and And a method of cutting an anodic oxide film in the vicinity of the aluminum substrate.
Here, these methods in the penetration process step are described in, for example, paragraphs [0110] to [0121] and [FIG. 3] and [FIG. 4] of Patent Document 1 (Japanese Patent Laid-Open No. 2008-270158). The method similar to each method mentioned above is mentioned.

この貫通化処理工程により、図3(A)に示すように、厚み方向に貫通する複数のマイクロポア4を有する絶縁性基材2が得られる。このようにして得られた絶縁性基材2は、上述した異方導電性部材において説明したものと同様の構成を有する。   By this penetration process step, as shown in FIG. 3A, an insulating substrate 2 having a plurality of micropores 4 penetrating in the thickness direction is obtained. The insulating base material 2 thus obtained has the same configuration as that described in the anisotropic conductive member described above.

[導通路形成工程]
上記導通路形成工程は、上記貫通化処理工程の後に、得られた上記絶縁性基材における複数のマイクロポアの内部に導電性部材である金属を充填して複数の導通路を形成する工程である。
ここで、充填する金属は、上述した異方導電性部材において説明したものと同様である。
また、上記マイクロポアに金属を充填する方法は、例えば、特許文献1(特開2008−270158号公報)の[0123]〜[0126]段落および[図4]に記載された各方法と同様の方法が挙げられる。
[Conducting path formation process]
The conduction path forming step is a step of forming a plurality of conduction paths by filling a metal which is a conductive member into a plurality of micropores in the obtained insulating base material after the penetration process step. is there.
Here, the metal to be filled is the same as that described in the anisotropic conductive member described above.
The method of filling the micropores with metal is similar to, for example, the methods described in paragraphs [0123] to [0126] and [FIG. 4] of Patent Document 1 (Japanese Patent Laid-Open No. 2008-270158). A method is mentioned.

ここで、上記の貫通化処理工程後に複数のマイクロポアを有する絶縁性基材が得られたが、この複数のマイクロポアの内周面は、絶縁性基材の厚さ方向に対して厳密には平行に延びておらず、例えば、絶縁性基材の一方の面側から他方の面側に向かうほど少し内側に傾斜するなど、僅かに不均一な形状となっている。このため、上記の導通路形成工程により複数のマイクロポアの内部に導通路を形成すると、複数のマイクロポアの内周面と導通路の外周面との間で生じる力が、その位置によって不均一となる。
例えば、複数のマイクロポアの内周面が、絶縁性基材の一方の面側から他方の面側に向かうほど少し内側に傾斜している場合には、図3(B)に示すように、複数のマイクロポアの内周面と導通路の外周面との間に生じる力は、絶縁性基材の一方の面2aから他方の面2bに近くなるほど大きくなる。このため、絶縁性基材の厚さ方向における応力差により残留応力が生じ、この残留応力に応じた歪が絶縁性基材に生じることになる。
本発明では、後述する残留応力緩和工程により、この導通路形成工程で生じた残留応力を緩和するものである。
Here, an insulating base material having a plurality of micropores was obtained after the above-described penetration processing step, but the inner peripheral surface of the plurality of micropores was strictly in the thickness direction of the insulating base material. Does not extend in parallel, and has a slightly non-uniform shape, for example, slightly inwardly inclined from one surface side of the insulating base to the other surface side. For this reason, when a conduction path is formed inside a plurality of micropores by the above-described conduction path forming step, the force generated between the inner peripheral surface of the plurality of micropores and the outer peripheral surface of the conduction path is uneven depending on the position. It becomes.
For example, when the inner peripheral surfaces of the plurality of micropores are slightly inwardly inclined from one surface side of the insulating base to the other surface side, as shown in FIG. The force generated between the inner peripheral surface of the plurality of micropores and the outer peripheral surface of the conduction path increases as the distance from one surface 2a to the other surface 2b of the insulating base material increases. For this reason, residual stress arises by the stress difference in the thickness direction of an insulating base material, and the distortion according to this residual stress arises in an insulating base material.
In the present invention, the residual stress generated in the conduction path forming step is relaxed by a residual stress relaxation step described later.

この導通路形成工程により、導通路3を有する絶縁性基材2が得られる。   By this conduction path forming step, the insulating base material 2 having the conduction path 3 is obtained.

[表面平滑化処理]
本発明の製造方法においては、上記導通路形成工程の後に、化学機械研磨処理などによって表面および裏面を平滑化する表面平滑処理工程を具備するのが好ましい。
化学機械研磨(CMP:Chemical Mechanical Polishing)処理を行うことにより、金属を充填させた後の表面および裏面の平滑化と表面に付着した余分な金属を除去することができる。
CMP処理には、株式会社フジミインコーポレイテッド社製のPNANERLITE−7000、日立化成株式会社製のGPX HSC800、旭硝子(セイミケミカル)株式会社製のCL−1000等のCMPスラリーを用いることができる。
なお、陽極酸化膜を研磨したくないので、層間絶縁膜やバリアメタル用のスラリーを用いるのは好ましくない。
[Surface smoothing]
In the manufacturing method of this invention, it is preferable to comprise the surface smoothing process process which smooth | blunts the surface and back surface by the chemical mechanical polishing process etc. after the said conduction path formation process.
By performing a chemical mechanical polishing (CMP) process, it is possible to smooth the front and back surfaces after metal filling and to remove excess metal attached to the surface.
For the CMP treatment, a CMP slurry such as PNANERLITE-7000 manufactured by Fujimi Incorporated, GPX HSC800 manufactured by Hitachi Chemical Co., Ltd., CL-1000 manufactured by Asahi Glass (Seimi Chemical) Co., Ltd., or the like can be used.
Since it is not desired to polish the anodized film, it is not preferable to use an interlayer insulating film or a slurry for a barrier metal.

[トリミング処理]
本発明の製造方法においては、上記導通路形成工程または上記CMP処理を施した場合は上記表面平滑処理工程の後に、トリミング処理工程を具備するのが好ましい。
上記トリミング処理工程は、上記導通路形成工程または上記CMP処理を施した場合は上記表面平滑処理工程の後に、異方導電性部材表面の絶縁性基材のみを一部除去し、導通路を突出させる工程である。
ここで、トリミング処理は、導通路を構成する金属を溶解しない条件であれば、上述した陽極酸化膜の底部を除去する際に用いられた酸水溶液またはアルカリ水溶液に接触させる、例えば浸せき法およびスプレー法などにより行うことができる。特に、トリミング処理には、溶解速度を管理しやすいリン酸を用いるのが好ましい。
このトリミング工程により、図3(C)に示される複数の導通路3を有する絶縁性基材2が得られる。
[Trimming]
In the manufacturing method of the present invention, it is preferable that a trimming process is provided after the surface smoothing process when the conduction path forming process or the CMP process is performed.
In the trimming process, when the conductive path forming process or the CMP process is performed, after the surface smoothing process, only a part of the insulating base material on the surface of the anisotropic conductive member is removed, and the conductive path protrudes. It is a process to make.
Here, the trimming process is performed under a condition that does not dissolve the metal constituting the conduction path, and is brought into contact with the acid aqueous solution or the alkaline aqueous solution used when the bottom of the anodic oxide film is removed, for example, immersion method and spraying. This can be done by law. In particular, it is preferable to use phosphoric acid that can easily control the dissolution rate for the trimming process.
By this trimming step, an insulating base material 2 having a plurality of conduction paths 3 shown in FIG. 3C is obtained.

[残留応力緩和工程]
上記残留応力緩和工程は、上記導通路形成工程の後に、残留応力を緩和する処理を施して上記異方導電性部材を得る工程である。ここで、残留応力を緩和する処理とは、絶縁性基材の残留応力を200MPa以下まで低下させる処理のことをいう。
残留応力緩和工程としては、複数のマイクロポアの内周面と複数の導通路の外周面との間に生じる力を分散させる処理を施すことにより、残留応力を緩和することが好ましい。
[Residual stress relaxation process]
The said residual stress relaxation process is a process of giving the process which relaxes a residual stress after the said conduction path formation process, and obtaining the said anisotropically conductive member. Here, the process for reducing the residual stress means a process for reducing the residual stress of the insulating base material to 200 MPa or less.
As the residual stress relaxation step, it is preferable to relieve the residual stress by performing a process of dispersing the force generated between the inner peripheral surfaces of the plurality of micropores and the outer peripheral surfaces of the plurality of conduction paths.

例えば、残留応力緩和工程は、複数の導通路を有する絶縁性基材を焼成することにより、複数のマイクロポアの内周面と導通路の外周面との間に生じる力を分散させることができる。
ここで、焼成の温度は、50℃〜600℃で行われるのが好ましく、100℃〜550℃で行われるのがより好ましく、150℃〜400℃で行われるのがさらに好ましい。焼成温度が50℃以上であると、残留応力を低下させることができ、焼成温度が600℃以下であると、過剰な加熱により正常な部分などが大きく変形することを抑制することができる。
For example, the residual stress relaxation step can disperse the force generated between the inner peripheral surface of the plurality of micropores and the outer peripheral surface of the conductive path by firing an insulating base material having a plurality of conductive paths. .
Here, the firing temperature is preferably 50 ° C to 600 ° C, more preferably 100 ° C to 550 ° C, and further preferably 150 ° C to 400 ° C. When the firing temperature is 50 ° C. or higher, the residual stress can be reduced, and when the firing temperature is 600 ° C. or lower, it is possible to suppress the normal portion from being greatly deformed by excessive heating.

また、上記残留応力緩和工程は、絶縁性基材の一方の面および他方の面の少なくとも一方に荷重を加えつつ絶縁性基材を焼成することが好ましい。
ここで、上記荷重は、ハンドリング性、荷重時の絶縁性基材との密着性および絶縁性基材の耐久性の観点から、50g/cm2〜2000g/cm2の圧力で絶縁性基材の一方の面および他方の面の少なくとも一方に加えることが好ましい。また、焼成温度は、上記の焼成温度と同じく、50℃〜600℃で行われるのが好ましく、100℃〜550℃で行われるのがより好ましく、150℃〜400℃で行われるのがさらに好ましい。
このように、絶縁性基材の一方の面および他方の面の少なくとも一方に荷重を加えつつ絶縁性基材を焼成することで、残留応力を180MPa以下まで低下させることが好ましく、165MPa以下まで低下させることがより好ましい。
Moreover, it is preferable that the said residual stress relaxation process bakes an insulating base material, applying a load to at least one of one side and the other side of an insulating base material.
Here, the load is 50 g / cm 2 to 2000 g / cm 2 at a pressure of 50 g / cm 2 to 2000 g / cm 2 from the viewpoints of handling properties, adhesion to the insulating base material at the time of loading, and durability of the insulating base material. It is preferable to add to at least one of the one surface and the other surface. The firing temperature is preferably 50 ° C. to 600 ° C., more preferably 100 ° C. to 550 ° C., and further preferably 150 ° C. to 400 ° C., similarly to the above firing temperature. .
Thus, it is preferable to reduce the residual stress to 180 MPa or less by firing the insulating substrate while applying a load to at least one of the one surface and the other surface of the insulating substrate, and to 165 MPa or less. More preferably.

具体的には、図3(D)に示すように、上記のトリミング工程により得られた複数の導通路3を有する絶縁性基材2の一方の面2aに対して、平板状の加圧部20で荷重を加える。この時、残留応力により生じた絶縁性基材2の歪が完全に戻るまで荷重を加えることが好ましい。   Specifically, as shown in FIG. 3D, a flat plate-like pressurizing portion is applied to one surface 2a of the insulating base material 2 having a plurality of conduction paths 3 obtained by the trimming step. Apply load at 20. At this time, it is preferable to apply a load until the distortion of the insulating base material 2 caused by the residual stress completely returns.

続いて、絶縁性基材2の一方の面2aに荷重を加えた状態で焼成を行う。このように、絶縁性基材2の歪を戻した状態で焼成を行うことにより、複数の導通路3を構成する金属分子が再配列されて複数の導通路3の表面形状に微小な変形が生じる。この複数の導通路4の変形に伴って、上記の導通路形成工程において複数のマイクロポア4の内周面と複数の導通路3の外周面との間に生じた不均一な力が分散されて、その力が絶縁性基材2の厚さ方向に均一化される。この時、残留応力が180MPa以下になるまで上記の処理を行うことが好ましい。これにより、図3(E)に示すように、絶縁性基材2の歪を修正することができる。   Subsequently, firing is performed in a state where a load is applied to one surface 2 a of the insulating base 2. In this way, by firing in a state where the strain of the insulating base material 2 is restored, the metal molecules constituting the plurality of conduction paths 3 are rearranged, and the surface shape of the plurality of conduction paths 3 is minutely deformed. Arise. Along with the deformation of the plurality of conduction paths 4, non-uniform forces generated between the inner peripheral surfaces of the plurality of micropores 4 and the outer peripheral surfaces of the plurality of conduction paths 3 in the above-described conduction path formation step are dispersed. Thus, the force is made uniform in the thickness direction of the insulating substrate 2. At this time, it is preferable to perform the above treatment until the residual stress becomes 180 MPa or less. Thereby, as shown to FIG.3 (E), the distortion of the insulating base material 2 can be corrected.

なお、上記残留応力緩和工程における焼成は、大気中、真空状態下、窒素雰囲気下およびアルゴン雰囲気下などにおいて行うことができ、特に、導通路を構成する金属が酸化して高抵抗化するのを防止する観点から、真空状態下、窒素雰囲気下またはアルゴン雰囲気下において行うことが好ましい。   The firing in the residual stress relaxation step can be performed in the air, in a vacuum state, in a nitrogen atmosphere, or in an argon atmosphere. In particular, the metal constituting the conduction path is oxidized to increase resistance. From the viewpoint of prevention, it is preferable to carry out in a vacuum, a nitrogen atmosphere or an argon atmosphere.

また、上記残留応力緩和工程は、液体に浸しつつ超音波振動を与えることにより、上記複数のマイクロポアの内周面と上記複数の導通路の外周面との間に生じる力を分散させる処理を施すこともできる。
この時、上記トリミング工程により得られた複数の導通路を有する絶縁性基材の全てを液体中に浸漬した状態で超音波振動を与えることが好ましい。また、複数の導通路を有する絶縁性基材を浸す液体としては、たとえば、水、水溶液、液体の有機化合物が用いられ、イソプロピルアルコール(IPA)およびメチルエチルケトン(MEK)のような液体の有機化合物を用いるのが好ましい。
The residual stress relaxation step disperses the force generated between the inner peripheral surfaces of the plurality of micropores and the outer peripheral surfaces of the plurality of conduction paths by applying ultrasonic vibration while being immersed in a liquid. It can also be applied.
At this time, it is preferable to apply ultrasonic vibration in a state where all of the insulating base material having a plurality of conduction paths obtained by the trimming step is immersed in a liquid. In addition, as the liquid that immerses the insulating substrate having a plurality of conduction paths, for example, water, an aqueous solution, or a liquid organic compound is used, and a liquid organic compound such as isopropyl alcohol (IPA) or methyl ethyl ketone (MEK) is used. It is preferable to use it.

また、上記超音波振動は、20kHz〜100kHzで与えるのが好ましい。超音波振動が20kHz以上であると、残留応力を大きく低下させることができ、超音波振動が100kHz以下であると、過剰な振動により正常な部分などが損傷することを抑制することができる。
また、上記超音波振動は、10分以上与えることが好ましく、100分以上であるのがより好ましく、150分以上であるのがさらに好ましい。超音波振動を10分以上与えることにより、残留応力を大きく低下させることができる。
The ultrasonic vibration is preferably applied at 20 kHz to 100 kHz. When the ultrasonic vibration is 20 kHz or more, the residual stress can be greatly reduced, and when the ultrasonic vibration is 100 kHz or less, it is possible to suppress damage of a normal part due to excessive vibration.
The ultrasonic vibration is preferably applied for 10 minutes or more, more preferably 100 minutes or more, and further preferably 150 minutes or more. By applying ultrasonic vibration for 10 minutes or more, the residual stress can be greatly reduced.

この残留応力緩和工程により、残留応力が緩和された異方導電性部材が得られる。この異方導電性部材は、上述した異方導電性部材において説明したものと同様の構成を有する。   By this residual stress relaxation step, an anisotropic conductive member with reduced residual stress is obtained. This anisotropic conductive member has a configuration similar to that described in the anisotropic conductive member described above.

[電着処理]
本発明の製造方法においては、上記トリミング処理工程に代えてまたは上記トリミング処理工程の後に、図3(B)に示される導通路3の表面にのみ、更に同一のまたは異なる導電性金属を析出させる電着処理工程を具備するものであってもよい(図4)。
本発明においては、電着処理は、異種金属の電気陰性度の差異を利用した無電解メッキ処理も含む処理である。
ここで、無電解メッキ処理は、無電解メッキ処理液(例えば、pHが1〜9の貴金属含有処理液に、pHが6〜13の還元剤処理液を適宜混合した液)に浸漬させる工程である。
[Electrodeposition processing]
In the manufacturing method of the present invention, the same or different conductive metal is further deposited only on the surface of the conductive path 3 shown in FIG. 3B instead of the trimming process or after the trimming process. An electrodeposition treatment step may be included (FIG. 4).
In the present invention, the electrodeposition process is a process including an electroless plating process using a difference in electronegativity of different metals.
Here, the electroless plating treatment is a step of immersing in an electroless plating treatment solution (for example, a solution obtained by appropriately mixing a noble metal-containing treatment solution having a pH of 1 to 9 and a reducing agent treatment solution having a pH of 6 to 13). is there.

本発明の製造方法においては、上記トリミング処理および上記電着処理は、異方導電性部材の使用直前に施すのが好ましい。これらの処理を使用直前に施すことにより、バンプ部分を構成する導通路の金属が使用直前まで酸化しないため好ましい。   In the manufacturing method of the present invention, the trimming process and the electrodeposition process are preferably performed immediately before the anisotropic conductive member is used. It is preferable to perform these treatments immediately before use because the metal of the conduction path constituting the bump portion is not oxidized until just before use.

[異方導電性接合パッケージ]
以下に、異方導電性接合パッケージについて詳細に説明する。
本発明の異方導電性接合パッケージの製造方法で製造される異方導電性接合パッケージは、上述した異方導電性部材と、複数の導通路の少なくとも1つに電気的に接続された導電素材からなる接続部とを有するパッケージである。
[Anisotropic conductive bonding package]
Hereinafter, the anisotropic conductive joint package will be described in detail.
An anisotropic conductive joint package manufactured by the method for manufacturing an anisotropic conductive joint package of the present invention includes an anisotropic conductive member and a conductive material electrically connected to at least one of a plurality of conduction paths. And a connecting portion.

図5(A)は、異方導電性接合パッケージ10を用いたマルチチップモジュール11の好適な実施態様の一例を示す模式的な斜視図である。図5(B)は、図5(A)のマルチチップモジュール11から異方導電性接合パッケージ10を抜き出して図示したものである。   FIG. 5A is a schematic perspective view showing an example of a preferred embodiment of the multichip module 11 using the anisotropic conductive joint package 10. FIG. 5B shows the anisotropic conductive joint package 10 extracted from the multichip module 11 of FIG. 5A.

図5(A)のマルチチップモジュール11は、回路基板に取り付けられて電気接続を行うためのものであって、ベース(チップ)基板12と2つのICチップ13と、異方導電性接合パッケージ10に接続されたインターポーザ14とを備えている。
チップ基板12は、プリント配線基板から構成され、プリント配線基板中の図示しない電極がICチップ13と図示しない配線で電気的に接続されている。異方導電性接合パッケージ10は、チップ基板12上に配置され、異方導電部材1の絶縁性基材2の一方の面2aに露出する導通路3の端部が平板状の電極15a(接続部)に接続されると共に、絶縁性基材2の他方の面2bに露出する導通路3の端部が平板状の電極15b(接続部)に接続される。また、電極15aは、インターポーザ14内の内部配線と接続され、電極15bは、チップ基板12の図示しない配線を介してICチップ13と接続されている。
このように、異方導電部材1を介して電極15aと電極15bを厚み方向に容易に接続することができ、インターポーザ14などを積層して配置することができる。
A multichip module 11 in FIG. 5A is attached to a circuit board for electrical connection, and includes a base (chip) board 12, two IC chips 13, and an anisotropic conductive joint package 10. And an interposer 14 connected to.
The chip substrate 12 is composed of a printed wiring board, and an electrode (not shown) in the printed wiring board is electrically connected to the IC chip 13 via a wiring (not shown). The anisotropic conductive joint package 10 is disposed on the chip substrate 12, and the end of the conductive path 3 exposed on one surface 2a of the insulating base 2 of the anisotropic conductive member 1 has a flat electrode 15a (connection). And the end portion of the conduction path 3 exposed to the other surface 2b of the insulating base 2 is connected to the flat electrode 15b (connection portion). The electrode 15a is connected to an internal wiring in the interposer 14, and the electrode 15b is connected to the IC chip 13 through a wiring (not shown) of the chip substrate 12.
Thus, the electrode 15a and the electrode 15b can be easily connected in the thickness direction via the anisotropic conductive member 1, and the interposer 14 and the like can be stacked and arranged.

異方導電性接合パッケージ10は、導電素材からなる接続部と異方導電部材を厚さ方向に交互に積層した多層構造としてもよく、これにより放熱性を上げることができ装置の信頼性を向上させることができる。   The anisotropic conductive joint package 10 may have a multilayer structure in which connecting portions made of conductive materials and anisotropic conductive members are alternately laminated in the thickness direction, thereby improving heat dissipation and improving device reliability. Can be made.

[異方導電性接合パッケージの製造方法]
本発明の異方導電性接合パッケージの製造方法は、上記の製造方法で得られる異方導電性部材に導電性材料を塗布して、複数の導通路の少なくとも1つに接続された接続部を有する異方導電性パッケージを得る接続部形成工程を具備する異方導電性接合パッケージの製造方法である。
導電性材料としては、具体的には、例えば、金(Au)、銀(Ag)、銅(Cu)、アルミニウム(Al)、マグネシウム(Mg)、ニッケル(Ni)、ITO、モリブデン(Mo)、鉄(Fe)、Pd(パラジウム)、ベリリウム(Be)、レニウム(Re)のいずれか1種または2種以上の素材を用いることができる。
[Method of manufacturing anisotropic conductive joint package]
In the method for manufacturing an anisotropic conductive joint package according to the present invention, a conductive material is applied to the anisotropic conductive member obtained by the above manufacturing method, and a connection portion connected to at least one of a plurality of conduction paths is provided. It is a manufacturing method of an anisotropic conductive joint package which comprises a connection part formation process which obtains the anisotropic conductive package which has.
Specific examples of the conductive material include gold (Au), silver (Ag), copper (Cu), aluminum (Al), magnesium (Mg), nickel (Ni), ITO, molybdenum (Mo), Any one or more of iron (Fe), Pd (palladium), beryllium (Be), and rhenium (Re) can be used.

接合方式は、特に制限されないが、接合時の導電信頼性が高い観点から、圧着接合が好ましく、加熱圧着接合がより好ましい。また、超音波接合も好ましい。   The bonding method is not particularly limited, but pressure bonding is preferable and thermocompression bonding is more preferable from the viewpoint of high conductive reliability at the time of bonding. Ultrasonic bonding is also preferable.

[接続部の具体例]
接続部の具体例は、例えば電極であり、電極はどのような部材に形成されるものでもよいが、上述した異方導電部材の、一方の表面と他方の表面に接合され、さらにこの電極が、インターポーザ内の内部配線と接続された電極であるのが好ましい。
インターポーザは変換基板、再配線基板とも呼ばれ、基板内の内部配線によってその表面に接続される外部電極の配置に応じて電極の配置を任意に設計できる。電極以外のインターポーザの部材は、シリコンウエハ、GaN基板等の無機化合物、ガラス繊維含浸・エポキシ樹脂、ポリイミド樹脂等の各種プラスチックで製造できる。
インターポーザは上述した異方導電性接合パッケージの一方の面に接合されていてもよいが、異方導電性接合パッケージを中間層として上下2層に接合されるのが好ましい。
[Specific example of connection part]
A specific example of the connection portion is, for example, an electrode, and the electrode may be formed on any member, but is bonded to one surface and the other surface of the anisotropic conductive member described above, and this electrode The electrode is preferably connected to the internal wiring in the interposer.
The interposer is also called a conversion board or a rewiring board, and the arrangement of electrodes can be arbitrarily designed according to the arrangement of external electrodes connected to the surface by internal wiring in the board. The interposer members other than the electrodes can be manufactured from various plastics such as silicon wafers, inorganic compounds such as GaN substrates, glass fiber impregnation / epoxy resins, polyimide resins and the like.
The interposer may be bonded to one surface of the anisotropic conductive bonding package described above, but is preferably bonded to the upper and lower layers using the anisotropic conductive bonding package as an intermediate layer.

以下に実施例を示して本発明を具体的に説明する。ただし、本発明はこれらに限定されない。   The present invention will be specifically described below with reference to examples. However, the present invention is not limited to these.

(実施例1)
(A)鏡面仕上げ処理(電解研磨処理)
高純度アルミニウム基板(住友軽金属株式会社製、純度99.99質量%、厚さ0.4mm)を10cm四方の面積で陽極酸化処理できるようカットし、以下組成の電解研磨液を用い、電圧25V、液温度65℃、液流速3.0m/minの条件で電解研磨処理を施した。
陰極はカーボン電極とし、電源は、GP0110−30R(株式会社高砂製作所社製)を用いた。また、電解液の流速は渦式フローモニターFLM22−10PCW(アズワン株式会社製)を用いて計測した。
Example 1
(A) Mirror finish (electropolishing)
A high-purity aluminum substrate (manufactured by Sumitomo Light Metal Co., Ltd., purity 99.99% by mass, thickness 0.4 mm) was cut so that it could be anodized in an area of 10 cm square, using an electrolytic polishing liquid having the following composition, a voltage of 25 V, Electropolishing was performed under conditions of a liquid temperature of 65 ° C. and a liquid flow rate of 3.0 m / min.
The cathode was a carbon electrode, and GP0110-30R (manufactured by Takasago Seisakusho Co., Ltd.) was used as the power source. Further, the flow rate of the electrolyte was measured using a vortex flow monitor FLM22-10PCW (manufactured by ASONE Corporation).

(電解研磨液組成)
・85質量%リン酸(和光純薬工業株式会社製試薬) 660mL
・純水 160mL
・硫酸 150mL
・エチレングリコール 30mL
(Electrolytic polishing liquid composition)
・ 85% by mass phosphoric acid (reagent manufactured by Wako Pure Chemical Industries, Ltd.) 660 mL
・ Pure water 160mL
・ Sulfuric acid 150mL
・ Ethylene glycol 30mL

(B)陽極酸化処理工程
次いで、電解研磨処理後のアルミニウム基板に、特開2007−204802号公報に記載の手順にしたがって自己規則化法による陽極酸化処理を施した。
電解研磨処理後のアルミニウム基板に、0.50mol/Lシュウ酸の電解液で、電圧40V、液温度15℃、液流速3.0m/minの条件で、5時間のプレ陽極酸化処理を施した。
その後、プレ陽極酸化処理後のアルミニウム基板を、0.2mol/L無水クロム酸、0.6mol/Lリン酸の混合水溶液(液温:50℃)に12時間浸漬させる脱膜処理を施した。
その後、0.50mol/Lシュウ酸の電解液で、電圧40V、液温度15℃、液流速3.0m/minの条件で、10時間の再陽極酸化処理を施し、膜厚80μmの酸化皮膜を得た。
なお、プレ陽極酸化処理および再陽極酸化処理は、いずれも陰極はステンレス電極とし、電源はGP0110−30R(株式会社高砂製作所製)を用いた。また、冷却装置にはNeoCool BD36(ヤマト科学株式会社製)、かくはん加温装置にはペアスターラー PS−100(EYELA東京理化器械株式会社製)を用いた。更に、電解液の流速は渦式フローモニターFLM22−10PCW(アズワン株式会社製)を用いて計測した。
(B) Anodizing treatment step Next, the aluminum substrate after the electrolytic polishing treatment was subjected to anodizing treatment by a self-ordering method according to the procedure described in JP-A-2007-204802.
The aluminum substrate after the electropolishing treatment was subjected to a pre-anodization treatment for 5 hours with an electrolytic solution of 0.50 mol / L oxalic acid at a voltage of 40 V, a liquid temperature of 15 ° C., and a liquid flow rate of 3.0 m / min. .
Thereafter, a film removal treatment was performed in which the aluminum substrate after the pre-anodizing treatment was immersed in a mixed aqueous solution (liquid temperature: 50 ° C.) of 0.2 mol / L chromic anhydride and 0.6 mol / L phosphoric acid for 12 hours.
Then, re-anodizing treatment was performed for 10 hours with an electrolyte solution of 0.50 mol / L oxalic acid at a voltage of 40 V, a liquid temperature of 15 ° C., and a liquid flow rate of 3.0 m / min to form an oxide film with a film thickness of 80 μm. Obtained.
In both the pre-anodizing treatment and the re-anodizing treatment, the cathode was a stainless electrode, and the power supply was GP0110-30R (manufactured by Takasago Seisakusho Co., Ltd.). Further, NeoCool BD36 (manufactured by Yamato Scientific Co., Ltd.) was used as the cooling device, and Pair Stirrer PS-100 (manufactured by EYELA Tokyo Rika Kikai Co., Ltd.) was used as the stirring and heating device. Furthermore, the flow rate of the electrolytic solution was measured using a vortex type flow monitor FLM22-10PCW (manufactured by ASONE CORPORATION).

(C)貫通化処理工程
次いで、20質量%塩化水銀水溶液(昇汞)に20℃、3時間浸漬させることによりアルミニウム基板を溶解し、更に、5質量%リン酸に30℃、30分間浸漬させることにより陽極酸化膜の底部を除去し、マイクロポアを有する陽極酸化膜からなる構造体(絶縁性基材)を作製した。
(C) Penetration treatment step Next, the aluminum substrate is dissolved by immersing in a 20% by mass mercury chloride aqueous solution (raised) at 20 ° C. for 3 hours, and further immersed in 5% by mass phosphoric acid at 30 ° C. for 30 minutes. By removing the bottom of the anodized film, a structure (insulating base material) made of an anodized film having micropores was produced.

(D)加熱処理
次いで、上記で得られた構造体に、温度400℃で1時間の加熱処理を施した。
(D) Heat treatment Next, the structure obtained above was subjected to a heat treatment at a temperature of 400 ° C for 1 hour.

(E)電極膜形成処理
次いで、上記加熱処理後の酸化皮膜の一方の表面に電極膜を形成する処理を施した。
すなわち、0.7g/L塩化金酸水溶液を、一方の表面に塗布し、140℃/1分で乾燥させ、更に500℃/1時間で焼成処理し、金のめっき核を作成した。
その後、無電解めっき液としてプレシャスファブACG2000基本液/還元液(日本エレクトロプレイティング・エンジニヤース(株)製)を用いて、50℃/1時間浸漬処理し、空隙のない電極膜を形成した。
(E) Electrode film formation process Next, the process which forms an electrode film in one surface of the oxide film after the said heat processing was performed.
That is, a 0.7 g / L chloroauric acid aqueous solution was applied to one surface, dried at 140 ° C./1 minute, and further baked at 500 ° C./1 hour to create a gold plating nucleus.
Thereafter, a precious fab ACG2000 basic solution / reducing solution (manufactured by Nippon Electroplating Engineers Co., Ltd.) was used as an electroless plating solution, and an immersion treatment was performed at 50 ° C./1 hour to form an electrode film without voids.

(F)導通路形成工程
次いで、上記電極膜を形成した面に銅電極を密着させ、銅電極を陰極にし、白金を正極にして電解めっき処理を施した。
硫酸銅/硫酸/塩酸=200/50/15(g/L)の混合溶液を25℃に保った状態で電解液として使用し、定電圧パルス電解を実施することにより、マイクロポアに銅が充填された構造体(異方導電性部材)を作成した。
ここで、定電圧パルス電解は、株式会社山本鍍金試験器社製のメッキ装置を用い、北斗電工株式会社製の電源(HZ−3000)を用い、めっき液中でサイクリックボルタンメトリを行なって析出電位を確認した後、皮膜側の電位を−2Vに設定して行った。また、定電圧パルス電解のパルス波形は矩形波であった。具体的には、電解の総処理時間が300秒になるように、1回の電解時間が60秒の電解処理を、各電解処理の間に40秒の休止時間を設けて5回施した。
(F) Conducting path forming step Next, a copper electrode was brought into close contact with the surface on which the electrode film was formed, and an electrolytic plating process was performed using the copper electrode as a cathode and platinum as a positive electrode.
Using a mixed solution of copper sulfate / sulfuric acid / hydrochloric acid = 200/50/15 (g / L) as an electrolyte while maintaining the temperature at 25 ° C., and performing constant voltage pulse electrolysis, the micropores are filled with copper. A structured body (anisotropic conductive member) was prepared.
Here, the constant voltage pulse electrolysis is carried out by performing cyclic voltammetry in a plating solution using a power supply (HZ-3000) manufactured by Hokuto Denko Co., Ltd. using a plating apparatus manufactured by Yamamoto Metal Testing Co., Ltd. After confirming the deposition potential, the coating side potential was set to -2V. The pulse waveform of constant voltage pulse electrolysis was a rectangular wave. Specifically, the electrolysis treatment of one electrolysis time of 60 seconds was performed five times with a 40-second rest period between each electrolysis treatment so that the total electrolysis treatment time was 300 seconds.

(G)表面平滑化処理工程
次いで、金属が充填された構造体の表面および裏面に、CMP処理を施し、膜厚80μmの構造体に対し、両面から15μmずつ研磨することにより、酸化皮膜上に形成した電極膜を除去し、かつ、酸化皮膜の表面および裏面を平滑化して膜厚50μmの構造体を得た。
CMPスラリーとしては、株式会社フジミインコーポレイテッド社製のPNANERLITE−7000を用いた。
CMP処理後、構造体の表面をFE−SEMで観察すると、酸化皮膜の表面から充填金属が一部あふれるような形になっていた。
(G) Surface smoothing treatment step Next, the surface and back surface of the structure filled with metal are subjected to CMP treatment, and the structure having a film thickness of 80 μm is polished by 15 μm from both sides to thereby form an oxide film. The formed electrode film was removed, and the front and back surfaces of the oxide film were smoothed to obtain a structure having a thickness of 50 μm.
As a CMP slurry, PNANERLITE-7000 manufactured by Fujimi Incorporated was used.
When the surface of the structure was observed with FE-SEM after the CMP treatment, it was in a form that the filled metal partially overflowed from the surface of the oxide film.

(H)トリミング処理
次いで、CMP処理後の構造体をリン酸溶液に浸漬し、陽極酸化膜を選択的に溶解することで、マイクロポアに充填された充填金属の円柱を突出させて構造体を得た。リン酸溶液は、上記貫通化処理と同じ液を使い、処理時間を5分とした。
(H) Trimming treatment Next, the structure after the CMP treatment is immersed in a phosphoric acid solution, and the anodic oxide film is selectively dissolved, thereby projecting the filled metal cylinder filled in the micropores to form the structure. Obtained. As the phosphoric acid solution, the same solution as that used for the penetration treatment was used, and the treatment time was set to 5 minutes.

(I)残留応力緩和工程
次いで、トリミング処理後の構造体を大気環境下で50g/cm2の荷重を加えつつ210℃の温度で45分間の焼成を行い、異方導電性部材が得られた。
(I) Residual Stress Mitigation Step Next, the trimmed structure was baked at a temperature of 210 ° C. for 45 minutes while applying a load of 50 g / cm 2 in an atmospheric environment to obtain an anisotropic conductive member. .

(H)パッケージ工程
次いで、残留応力緩和工程後の異方導電性部材を熱圧着装置(北川精機株式会社製、HVHC-PRESS、シリンダー面積201cm2)を使って熱圧着試験をおこなった。導電素材には銅を用い、圧着温度が240℃、電極単位面積当たりの圧着圧力が50MPa以下、圧着時間が1分の条件で熱圧着することにより異方導電性接合パッケージを作製した。
(H) Package process Subsequently, the anisotropic conductive member after the residual stress relaxation process was subjected to a thermocompression test using a thermocompression bonding apparatus (manufactured by Kitagawa Seiki Co., Ltd., HVHC-PRESS, cylinder area 201 cm 2 ). Copper was used as the conductive material, and an anisotropic conductive joint package was produced by thermocompression bonding under the conditions of a pressure bonding temperature of 240 ° C., a pressure bonding pressure per electrode unit area of 50 MPa or less, and a pressure bonding time of 1 minute.

(実施例2〜16)
焼成温度と焼成雰囲気を第1表に従って変更した以外は、実施例1と同様の方法により異方導電性部材および異方導電性接合パッケージを作製した。
(Examples 2 to 16)
An anisotropic conductive member and an anisotropic conductive junction package were produced in the same manner as in Example 1 except that the firing temperature and firing atmosphere were changed according to Table 1.

(実施例17)
導通路形成工程を以下に示す方法で行った以外は、実施例1と同様の方法により、異方導電性部材を作製した。また、パッケージ工程において導電性素材をニッケルとした以外は、実施例1と同様の方法により、異方導電性接合パッケージを作製した。
[導通路形成工程]
電極膜を形成した面にニッケル電極を密着させ、ニッケル電極を陰極にし、白金を正極にして電界めっき処理を施した。そして、硫酸ニッケル/塩化ニッケル/ホウ酸=300/60/40(g/L)の混合溶液を50℃に保った状態で電解液として使用し、定電流電解(5A/dm2)を行うことにより金属充填を行った。
(Example 17)
An anisotropic conductive member was produced by the same method as in Example 1 except that the conduction path forming step was performed by the method described below. Further, an anisotropic conductive joint package was produced in the same manner as in Example 1 except that nickel was used as the conductive material in the packaging process.
[Conducting path formation process]
A nickel electrode was brought into close contact with the surface on which the electrode film was formed, and electroplating was performed using the nickel electrode as a cathode and platinum as a positive electrode. Then, using a mixed solution of nickel sulfate / nickel chloride / boric acid = 300/60/40 (g / L) as an electrolytic solution in a state kept at 50 ° C., constant current electrolysis (5 A / dm 2 ) is performed. Was filled with metal.

(実施例18〜24)
焼成温度と焼成雰囲気を第1表に従って変更した以外は、実施例17と同様の方法により異方導電性部材および異方導電性接合パッケージを作製した。
(Examples 18 to 24)
An anisotropic conductive member and an anisotropic conductive joint package were produced by the same method as in Example 17 except that the firing temperature and firing atmosphere were changed according to Table 1.

(実施例25〜27)
残留応力緩和工程を以下に示す方法で行った以外は、実施例1と同様の方法により、異方導電性部材を作製した。
[残留応力緩和工程]
トリミング処理後、イソプロピルアルコール(IPA)溶液中で20〜100kHz程度の超音波振動をそれぞれ150分間、100分間および10分間与えることにより、異方導電性部材および異方導電性接合パッケージを作製した。
(Examples 25-27)
An anisotropic conductive member was produced by the same method as in Example 1 except that the residual stress relaxation step was performed by the method described below.
[Residual stress relaxation process]
After the trimming treatment, an anisotropic conductive member and an anisotropic conductive joint package were produced by applying ultrasonic vibration of about 20 to 100 kHz in an isopropyl alcohol (IPA) solution for 150 minutes, 100 minutes, and 10 minutes, respectively.

(実施例28〜30)
残留応力緩和工程を以下に示す方法で行った以外は、実施例17と同様の方法により、異方導電性部材および異方導電性接合パッケージを作製した。
[残留応力緩和工程]
トリミング処理後、イソプロピルアルコール(IPA)溶液中で20〜100kHz程度の超音波振動をそれぞれ150分間、100分間および10分間与えることにより、異方導電性部材を作製した。
(Examples 28 to 30)
An anisotropic conductive member and an anisotropic conductive joint package were produced by the same method as in Example 17 except that the residual stress relaxation step was performed by the method described below.
[Residual stress relaxation process]
After the trimming treatment, an anisotropic conductive member was produced by applying ultrasonic vibrations of about 20 to 100 kHz in an isopropyl alcohol (IPA) solution for 150 minutes, 100 minutes, and 10 minutes, respectively.

(実施例31)
残留応力緩和工程において、荷重を加えずに焼成を行った以外は、実施例13と同様の方法により、異方導電性部材および異方導電性接合パッケージを作製した。
(Example 31)
An anisotropic conductive member and an anisotropic conductive joint package were produced in the same manner as in Example 13 except that firing was performed without applying a load in the residual stress relaxation step.

(実施例32)
残留応力緩和工程において、荷重を加えずに焼成を行った以外は、実施例16と同様の方法により、異方導電性部材および異方導電性接合パッケージを作製した。
(Example 32)
An anisotropic conductive member and an anisotropic conductive joint package were produced in the same manner as in Example 16 except that firing was performed without applying a load in the residual stress relaxation step.

(実施例33)
残留応力緩和工程において、荷重を加えずに焼成を行った以外は、実施例21と同様の方法により、異方導電性部材および異方導電性接合パッケージを作製した。
(Example 33)
An anisotropic conductive member and an anisotropic conductive joint package were produced in the same manner as in Example 21 except that firing was performed without applying a load in the residual stress relaxation step.

(実施例34)
残留応力緩和工程において、荷重を加えずに焼成を行った以外は、実施例24と同様の方法により、異方導電性部材および異方導電性接合パッケージを作製した。
(Example 34)
An anisotropic conductive member and an anisotropic conductive joint package were produced in the same manner as in Example 24 except that firing was performed without applying a load in the residual stress relaxation step.

(比較例1)
残留応力緩和工程を除いた以外は、実施例1と同様の方法により、異方導電性部材および異方導電性接合パッケージを作製した。
(Comparative Example 1)
An anisotropic conductive member and an anisotropic conductive joint package were produced in the same manner as in Example 1 except that the residual stress relaxation step was omitted.

(比較例2)
残留応力緩和工程を除いた以外は、実施例17と同様の方法により、異方導電性部材および異方導電性接合パッケージを作製した。
(Comparative Example 2)
An anisotropic conductive member and an anisotropic conductive joint package were produced in the same manner as in Example 17 except that the residual stress relaxation step was omitted.

(評価方法)
残留応力は、X線回折装置(XRD、ブルカー・バイオスピン株式会社製、D8 Discover with GADDS)を用いて、2θ・sin2ψ法により、残留応力を算出した。電圧/電流は45kV/110mAで、X線波長はCrKα線、X線照射径は500μm、評価結晶面はCu(311)面またはNi(311)面で測定を行った。この結果を下記第1表に示す。
(Evaluation method)
The residual stress was calculated by the 2θ · sin 2 ψ method using an X-ray diffractometer (XRD, manufactured by Bruker BioSpin Corporation, D8 Discover with GADDS). The voltage / current was 45 kV / 110 mA, the X-ray wavelength was CrKα ray, the X-ray irradiation diameter was 500 μm, and the evaluation crystal plane was measured on the Cu (311) plane or Ni (311) plane. The results are shown in Table 1 below.

クラック数は、異方導電性接合パッケージを10サンプル作成し、マイクロフォーカスX線CT(株式会社島津製作所製、SMX−160CTS)を用いて、異方導電性接合パッケージの内部構造を観察することで、それぞれのサンプルについてクラック数を求め、クラック数の平均値を算出した。この結果を下記第1表に示す。   The number of cracks was determined by preparing 10 samples of anisotropic conductive bonding packages and observing the internal structure of the anisotropic conductive bonding packages using microfocus X-ray CT (manufactured by Shimadzu Corporation, SMX-160CTS). The number of cracks was determined for each sample, and the average number of cracks was calculated. The results are shown in Table 1 below.

配線抵抗値のばらつきは、異方導電性接合パッケージを10サンプル作成し、配線抵抗を1サンプルあたり30回測定して、得られた抵抗値(Ω)の標準偏差を算出した。標準偏差が小さいほど、配線時の故障がなく、異方導電性接合パッケージの得率が良いことになる。配線抵抗値の測定は、異方導電膜の断面を研磨することにより1つの導通路について電気的に接続していることを確認し、その電気的な接続が確認できた異方導電性接合パッケージを用いて直流電圧と電流とを測定し、抵抗値を算出した。この結果を下記第1表に示す。   For the variation in wiring resistance value, 10 samples of anisotropic conductive joint packages were prepared, the wiring resistance was measured 30 times per sample, and the standard deviation of the obtained resistance value (Ω) was calculated. The smaller the standard deviation, the better the yield of the anisotropic conductive joint package without any failure during wiring. The measurement of the wiring resistance value confirms that one conductive path is electrically connected by polishing the cross section of the anisotropic conductive film, and the anisotropic conductive junction package in which the electrical connection can be confirmed. The direct current voltage and current were measured using and the resistance value was calculated. The results are shown in Table 1 below.

第1表に示す結果から、残留応力緩和工程を行った実施例1〜34は、比較例1および2と比較して残留応力およびクラック数が低下し、絶縁性基材の破損を抑制できることがわかった。   From the results shown in Table 1, Examples 1-34 in which the residual stress relaxation process was performed can reduce the residual stress and the number of cracks compared to Comparative Examples 1 and 2, and can suppress the damage of the insulating base material. all right.

特に、残留応力緩和工程において荷重を加えつつ焼成した実施例1〜24は、荷重を加えずに焼成した実施例31〜34と比較して、残留応力が大きく低下しており、荷重を加えつつ焼成することが残留応力の低下に大きく寄与することがわかった。
また、残留応力緩和工程において超音波振動を与えた実施例25〜30は、超音波を与えていない比較例1および2と比較して、残留応力が大きく低下しており、超音波を与えることが残留応力の低下に大きく寄与することがわかった。
In particular, in Examples 1 to 24 fired while applying a load in the residual stress relaxation step, the residual stress is greatly reduced as compared with Examples 31 to 34 fired without applying a load. It was found that firing greatly contributes to the reduction of residual stress.
Further, in Examples 25 to 30 to which ultrasonic vibration was applied in the residual stress relaxation step, the residual stress was greatly reduced as compared with Comparative Examples 1 and 2 in which ultrasonic waves were not applied, and ultrasonic waves were applied. It was found that greatly contributes to the reduction of residual stress.

また、残留応力緩和工程において荷重を加えつつ焼成を行った実施例1〜24は、焼成雰囲気、導通路の金属種および荷重の条件が同じもので比較したときに、焼成温度が高温であるほど残留応力が低下しており、焼成温度が残留応力の低下に大きく寄与することがわかった。
また、残留応力緩和工程において超音波振動を与えた実施例25〜30は、焼成雰囲気および導通路の金属種の条件が同じもので比較したときに、超音波振動を与えた時間が長時間であるほど残留応力が低下しており、超音波振動を与えた時間が残留応力の低下に大きく寄与することがわかった。
Moreover, Examples 1-24 which performed baking, adding a load in a residual stress relaxation process, when a baking atmosphere, the metal seed | species of a conduction path, and the conditions of a load are the same, and a baking temperature is so high that it is high. It was found that the residual stress was reduced, and the firing temperature greatly contributed to the reduction of the residual stress.
Further, in Examples 25 to 30 in which ultrasonic vibration was applied in the residual stress relaxation process, the time for which ultrasonic vibration was applied was long when compared with the same conditions of the firing atmosphere and the metal species of the conduction path. It was found that the residual stress decreased, and the time when the ultrasonic vibration was applied greatly contributed to the decrease of the residual stress.

また、残留応力緩和工程において焼成を行う実施例1〜24は、焼成雰囲気の違いによらず残留応力が180MPa以下まで低下しており、大気、窒素、アルゴン、真空のいずれの焼成雰囲気でも残留応力の緩和を妨げないことがわかった。
また、実施例1〜30は、導通路の金属種の違いによらず残留応力が180MPa以下まで低下しており、銅およびニッケルのいずれの金属を導通路に使用しても残留応力の緩和を妨げないことがわかった。
In Examples 1 to 24 where firing is performed in the residual stress relaxation step, the residual stress is reduced to 180 MPa or less regardless of the firing atmosphere, and the residual stress can be obtained in any firing atmosphere of air, nitrogen, argon, or vacuum. It was found that it does not prevent relaxation.
In Examples 1 to 30, the residual stress is lowered to 180 MPa or less regardless of the difference in the metal type of the conduction path. Even if any metal of copper and nickel is used for the conduction path, the residual stress is reduced. It turns out that it does not interfere.

1 異方導電性部材、2 絶縁性基材、2a 絶縁性基材の一方の面、2b 絶縁性基材の他方の面、3 導通路、4 マイクロポア、4a,4b 突出部、5 基材内導通部
6 絶縁性基材の厚み、7 導通路間の幅、8 導通路の直径、9 導通路の中心間距離(ピッチ)、10 異方導電性接合パッケージ、11 マルチチップモジュール、12 チップ基板、13 ICチップ、14 インターポーザ、15a,15b 電極、101、102、104、105、107、108 マイクロポア、103、106、109 円。
DESCRIPTION OF SYMBOLS 1 Anisotropic conductive member, 2 Insulating base material, 2a One surface of insulating base material, 2b The other surface of insulating base material, 3 Conducting path, 4 Micropore, 4a, 4b Protruding part, 5 base material Inner conductive portion 6 Insulating base material thickness, 7 Width between conductive paths, 8 Diameter of conductive paths, 9 Distance between centers of conductive paths (pitch), 10 Anisotropic conductive joint package, 11 Multichip module, 12 chips Substrate, 13 IC chip, 14 interposer, 15a, 15b electrode, 101, 102, 104, 105, 107, 108 micropore, 103, 106, 109 yen.

Claims (3)

陽極酸化膜からなる絶縁性基材の複数のマイクロポアに導電性部材が充填された複数の導通路を有する異方導電性部材を作製した後に、
残留応力を緩和する処理を施した異方導電性部材を得る残留応力緩和工程を具備し、
前記残留応力緩和工程は、液体に浸しつつ超音波振動を与える工程である異方導電性部材の製造方法。
After producing an anisotropic conductive member having a plurality of conduction paths in which a plurality of micropores of an insulating base material made of an anodized film is filled with a conductive member,
Comprising a residual stress relaxation step for obtaining an anisotropic conductive member subjected to a treatment for relaxing residual stress;
The method for manufacturing an anisotropic conductive member, wherein the residual stress relaxation step is a step of applying ultrasonic vibration while being immersed in a liquid.
前記残留応力緩和工程は、前記超音波振動を20kHz〜100kHzで与える工程である請求項1に記載の異方導電性部材の製造方法。   The method for manufacturing an anisotropic conductive member according to claim 1, wherein the residual stress relaxation step is a step of applying the ultrasonic vibration at 20 kHz to 100 kHz. 前記残留応力緩和工程は、前記超音波振動を10分以上与える工程である請求項1または2に記載の異方導電性部材の製造方法。   The method for manufacturing an anisotropic conductive member according to claim 1, wherein the residual stress relaxation step is a step of applying the ultrasonic vibration for 10 minutes or more.
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