JP2013545303A - Bjt電流利得を改善するための低温インプラント - Google Patents
Bjt電流利得を改善するための低温インプラント Download PDFInfo
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- 239000007943 implant Substances 0.000 title claims description 56
- 239000000758 substrate Substances 0.000 claims abstract description 64
- 238000000034 method Methods 0.000 claims abstract description 36
- 238000001816 cooling Methods 0.000 claims abstract description 15
- 239000002019 doping agent Substances 0.000 claims abstract description 14
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 7
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 7
- 239000004065 semiconductor Substances 0.000 claims abstract description 7
- 238000005468 ion implantation Methods 0.000 claims description 23
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 18
- 229910052710 silicon Inorganic materials 0.000 claims description 18
- 239000010703 silicon Substances 0.000 claims description 18
- 229910052785 arsenic Inorganic materials 0.000 claims description 14
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 14
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052733 gallium Inorganic materials 0.000 claims description 8
- 229910052738 indium Inorganic materials 0.000 claims description 8
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 7
- 229910052787 antimony Inorganic materials 0.000 claims description 7
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims description 7
- 229910052796 boron Inorganic materials 0.000 claims description 7
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical group [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims description 6
- 239000011574 phosphorus Substances 0.000 claims description 6
- 229910052732 germanium Inorganic materials 0.000 claims description 4
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 4
- 239000000377 silicon dioxide Substances 0.000 claims description 4
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 238000005280 amorphization Methods 0.000 claims 2
- 239000002210 silicon-based material Substances 0.000 claims 2
- 230000007547 defect Effects 0.000 description 10
- 150000002500 ions Chemical class 0.000 description 4
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical group CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 3
- 239000002826 coolant Substances 0.000 description 2
- 239000012809 cooling fluid Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- HAYXDMNJJFVXCI-UHFFFAOYSA-N arsenic(5+) Chemical compound [As+5] HAYXDMNJJFVXCI-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26593—Bombardment with radiation with high-energy radiation producing ion implantation at a temperature lower than room temperature
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
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- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Ceramic Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Amplifiers (AREA)
Abstract
Description
Chiller)冷却温度」として記載する基板温度の関数として、NPN BJTにおけるhfeの改善を示す。平均データポイント2000は、図1を参照して説明したようにエミッタインプラントで形成されるNPN BJTのセットのhfeの平均値を示す。範囲バー2002は、各基板温度値でのhfe値の+/−3の標準偏差の限界を示す。補間によりhfe値を推定するガイドとして傾向ライン2004が提供される。
Claims (9)
- NPNバイポーラ接合トランジスタ(BJT)及びNチャネル金属酸化物半導体(NMOS)トランジスタを含む集積回路を形成するプロセスであって、
前記NPN BJTのエミッタ領域と前記NMOSトランジスタのソース及びドレイン領域の上で、前記集積回路の基板のシリコン頂部領域の上面の上にインプラントスクリーン誘電体層を形成すること、
前記エミッタ領域と前記ソース及びドレイン領域を露出させるように前記インプラントスクリーン誘電体層の上にインプラントマスクを形成すること、
前記集積回路の前記基板を基板チャックに接触させること、
前記集積回路の前記基板が5℃又はそれより低温の温度まで冷却されるように前記基板チャックを冷却すること、及び
前記基板が5℃又はそれより低温まで冷却される一方で、N型ドーパントを前記エミッタ領域と前記ソース及びドレイン領域とに同時にイオン注入すること、
を含むプロセスであって、
前記N型ドーパント、及び前記N型ドーパントのドーズ量が、
少なくとも8×1014原子/cm2のドーズ量のリン、
少なくとも6×1013原子/cm2のドーズ量のヒ素、
少なくとも6×1013原子/cm2のドーズ量のアンチモン、及び
これらの任意の組み合わせ、
から成る群から選択される、
プロセス。 - 請求項1のプロセスであって、前記N型ドーパントが、少なくとも4×1014原子/cm2のドーズ量のヒ素を含む、プロセス。
- 請求項1のプロセスであって、前記N型ドーパントが、少なくとも1×1015原子/cm2のドーズ量のヒ素を含む、プロセス。
- 請求項1のプロセスであって、前記インプラントスクリーン誘電体層が、少なくとも80パーセントの二酸化シリコンを含む、プロセス。
- 請求項1のプロセスであって、前記N型ドーパントをイオン注入する前記工程が、シリコン材料を、前記エミッタ領域と前記ソース及びドレイン領域における前記シリコン頂部領域の前記上面において少なくとも15ナノメートルの深さまで非晶化する、プロセス。
- PNP BJT及びPチャネル金属酸化物半導体(PMOS)トランジスタを含む集積回路を形成するプロセスであって、
前記NPN BJTのエミッタ領域と前記NMOSトランジスタのソース及びドレイン領域の上で、前記集積回路の基板のシリコン頂部領域の上面の上にインプラントスクリーン誘電体層を形成すること、
前記エミッタ領域と前記ソース及びドレイン領域を露出させるように前記インプラントスクリーン誘電体層の上にインプラントマスクを形成すること、
前記集積回路の前記基板を基板チャックに接触させること、
前記集積回路の前記基板が5℃又はそれより低温の温度まで冷却されるように前記基板チャックを冷却すること、及び
前記基板が5℃又はそれより低温まで冷却される一方で、P型ドーパントを前記エミッタ領域と前記ソース及びドレイン領域とに同時にイオン注入すること、
を含むプロセスであって、
前記P型ドーパント、及び前記P型ドーパントのドーズ量が、
少なくとも1×1016原子/cm2のドーズ量のボロン、
少なくとも7×1013原子/cm2のドーズ量のガリウム、
少なくとも6×1013原子/cm2のドーズ量のインジウム、及び
これらの任意の組み合わせ、
から成る群から選択される、
プロセス。 - 請求項6のプロセスであって、前記インプラントスクリーン誘電体層が、少なくとも80パーセントの二酸化シリコンを含む、プロセス。
- 請求項6のプロセスであって、前記P型ドーパントをイオン注入する前記工程が、シリコン材料を、前記エミッタ領域と前記ソース及びドレイン領域における前記シリコン頂部領域の前記上面において少なくとも15ナノメートルの深さまで非晶化する、プロセス。
- インプラント領域を含む集積回路を形成するプロセスであって、
前記インプラント領域の上で、前記集積回路の基板のシリコン頂部領域の上面の上にインプラントスクリーン誘電体層を形成すること、
前記インプラント領域を露出させるように前記インプラントスクリーン誘電体層の上にインプラントマスクを形成すること、
前記集積回路の前記基板を基板チャックに接触させること、
前記集積回路の前記基板が5℃又はそれより低温の温度まで冷却されるように前記基板チャックを冷却すること、及び
前記基板が5℃又はそれより低温まで冷却される一方で、前記インプラント領域に原子をイオン注入すること、
を含むプロセスであって、
前記原子、及び前記原子のドーズ量が、
少なくとも1×1016原子/cm2のドーズ量のボロン、
少なくとも8×1014原子/cm2のドーズ量のリン、
少なくとも7×1013原子/cm2のドーズ量のガリウム、
少なくとも6×1013原子/cm2のドーズ量のゲルマニウム、
少なくとも6×1013原子/cm2のドーズ量のヒ素、
少なくとも6×1013原子/cm2のドーズ量のインジウム、
少なくとも6×1013原子/cm2のドーズ量のアンチモン、及び
それらの任意の組み合わせ、
から成る群から選択される、
プロセス。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US40636410P | 2010-10-25 | 2010-10-25 | |
US61/406,364 | 2010-10-25 | ||
US13/246,362 US8772103B2 (en) | 2010-10-25 | 2011-09-27 | Low temperature implant scheme to improve BJT current gain |
US13/246,362 | 2011-09-27 | ||
PCT/US2011/057679 WO2012061130A2 (en) | 2010-10-25 | 2011-10-25 | Low temperature implant to improve bjt current gain |
Publications (2)
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JP2013545303A true JP2013545303A (ja) | 2013-12-19 |
JP2013545303A5 JP2013545303A5 (ja) | 2014-12-11 |
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JP2013536721A Pending JP2013545303A (ja) | 2010-10-25 | 2011-10-25 | Bjt電流利得を改善するための低温インプラント |
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US (1) | US8772103B2 (ja) |
JP (1) | JP2013545303A (ja) |
CN (1) | CN103180934A (ja) |
WO (1) | WO2012061130A2 (ja) |
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US9299698B2 (en) * | 2012-06-27 | 2016-03-29 | Mie Fujitsu Semiconductor Limited | Semiconductor structure with multiple transistors having various threshold voltages |
US10128113B2 (en) * | 2016-01-12 | 2018-11-13 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and manufacturing method thereof |
US9923083B1 (en) * | 2016-09-09 | 2018-03-20 | International Business Machines Corporation | Embedded endpoint fin reveal |
US10243048B2 (en) * | 2017-04-27 | 2019-03-26 | Texas Instruments Incorporated | High dose antimony implant through screen layer for n-type buried layer integration |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH027422A (ja) * | 1988-06-24 | 1990-01-11 | Ricoh Co Ltd | レーザによる高温熱処理方法 |
JPH10261593A (ja) * | 1997-01-20 | 1998-09-29 | Toshiba Corp | 半導体装置の製造方法、半導体製造装置、および半導体装置 |
JP2001068427A (ja) * | 1999-08-26 | 2001-03-16 | Ulvac Japan Ltd | 基板冷却装置 |
JP2001210735A (ja) * | 2000-01-27 | 2001-08-03 | Mitsumi Electric Co Ltd | Cmosデバイス及びcmosデバイスの製造方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5244820A (en) * | 1990-03-09 | 1993-09-14 | Tadashi Kamata | Semiconductor integrated circuit device, method for producing the same, and ion implanter for use in the method |
JPH1032274A (ja) | 1996-04-12 | 1998-02-03 | Texas Instr Inc <Ti> | Cmosプロセスによるバイポーラートランジスタ作製方法 |
US7993698B2 (en) * | 2006-09-23 | 2011-08-09 | Varian Semiconductor Equipment Associates, Inc. | Techniques for temperature controlled ion implantation |
CN101903996B (zh) * | 2007-12-21 | 2013-04-03 | 应用材料公司 | 用于控制衬底温度的方法和设备 |
KR20100074625A (ko) | 2008-12-24 | 2010-07-02 | 주식회사 하이닉스반도체 | 반도체 소자의 채널 정션 형성 방법 |
-
2011
- 2011-09-27 US US13/246,362 patent/US8772103B2/en active Active
- 2011-10-25 WO PCT/US2011/057679 patent/WO2012061130A2/en active Application Filing
- 2011-10-25 CN CN2011800512790A patent/CN103180934A/zh active Pending
- 2011-10-25 JP JP2013536721A patent/JP2013545303A/ja active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH027422A (ja) * | 1988-06-24 | 1990-01-11 | Ricoh Co Ltd | レーザによる高温熱処理方法 |
JPH10261593A (ja) * | 1997-01-20 | 1998-09-29 | Toshiba Corp | 半導体装置の製造方法、半導体製造装置、および半導体装置 |
JP2001068427A (ja) * | 1999-08-26 | 2001-03-16 | Ulvac Japan Ltd | 基板冷却装置 |
JP2001210735A (ja) * | 2000-01-27 | 2001-08-03 | Mitsumi Electric Co Ltd | Cmosデバイス及びcmosデバイスの製造方法 |
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CN103180934A (zh) | 2013-06-26 |
WO2012061130A3 (en) | 2012-06-28 |
WO2012061130A2 (en) | 2012-05-10 |
US20120100680A1 (en) | 2012-04-26 |
US8772103B2 (en) | 2014-07-08 |
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