JP2013236398A - 直列接続された半導体デバイスの構成内のクロック信号同期の方法 - Google Patents
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/10—Distribution of clock signals, e.g. skew
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
- H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
- H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
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Abstract
【解決手段】システム制御装置と、直列接続された半導体デバイスを含む。前記デバイスは、前のデバイスから発信されたクロック信号を受信し、後続のデバイス宛の同期クロック信号を供給する。このデバイスは、受信したクロック信号及び同期クロック信号の以前のバージョンを処理して、同期クロック信号を生成するクロック同期装置をさらに含む。このデバイスは、同期クロック信号の以前のバージョンを処理する際にクロック同期装置に使用されるパラメータを調整するデバイス制御装置をさらに含む。
【選択図】図2B
Description
本出願は、2007年3月12日出願の先の米国仮特許出願第60/894,246号の利益を主張する。同出願の開示の全体が、参照により明示的に組み込まれる。
-2005年9月30日出願の第60/722,368号明細書
-2005年12月30日出願の第11/324,023号明細書
-2006年7月31日出願の第11/496,278号明細書
-2006年9月15日出願の第11/521,734号明細書
-2006年11月29日出願の第11/606,407号明細書
-2007年6月29日出願の第11/771,023号明細書
-2007年6月29日出願の第11/771,241号明細書
-2006年3月28日出願の米国仮特許出願第60/787,710号明細書
-2006年5月23日出願の米国仮特許出願第60/802,645号明細書
-2006年12月6日出願の米国仮特許出願第60/868,773号明細書
-2005年9月30日出願の第60/722,368号明細書
-2005年12月30日出願の第11/324,023号明細書
-2006年7月31日出願の第11/496,278号明細書
-2006年9月15日出願の第11/521,734号明細書
-2006年11月29日出願の第11/606,407号明細書
-2007年6月29日出願の第11/771,023号明細書
-2007年6月29日出願の第11/771,241号明細書
104-0〜N-1 半導体デバイス
104-j 半導体デバイス、スレーブデバイス
106 スレーブ制御装置
108 メモリアレイ
110 クロック同期装置
120-1、120-2、120-3、120-4 入力バッファ
122-1、122-2、122-3、122-4 出力バッファ
124-1、124-2、124-3 D型フリップフロップ
126-1、126-2、126-3 D型フリップフロップ
130 移相器
134 バッファ素子
202 調整可能な遅延ユニット
204 位相検出器および遅延線制御装置(PD-DLC)
206 外部調整可能なフィードバック遅延ユニット(EA-FDU)
210 バッファ
220 外部調整可能なフィードバック遅延(EA-FD)レジスタ
502 システム
504 相互接続負荷
506 位相周波数検出器(PFD)
1010 入力バッファ
1020 出力駆動強度(ODSR)レジスタ
1022-1、1022-2、1022-3、1022-4 可変強度出力ドライバ
1306 外部調整可能なフィードバック周波数ユニット(EA-FFU)
1402 位相周波数検出器(PFD)
1404 電荷ポンプ
1406 ループフィルタおよびバイアス発生器
1408 電圧制御発振器(VCO)
1410 クロック同期装置
Claims (7)
- 直列接続された半導体デバイスの構成を同期させるための方法であって、
前記システムを初期化するステップと、
直列接続された半導体デバイスの構成内の第1のデバイスへ第1のクロック信号を提供するステップと、
前記構成内の第2のデバイスから第2のクロック信号を受信するステップであって、前記第2のクロック信号は、前記構成内の前記デバイスのうちの少なくとも1つの中のクロック同期装置による処理を受けたバージョンの前記第1のクロック信号に一致する、ステップと、
前記第1および第2のクロック信号間の位相差を検出するために、前記第1および第2のクロック信号を処理するステップと、
前記位相差に基づいて、前記構成内の前記デバイスのうちの少なくとも1つの中の前記クロック同期装置に調整を指令するステップと
を含む方法。 - 直列接続された半導体デバイスの構成を同期させるための方法であって、
前記初期化ステップは、固定成分tFを用いて、各スレーブデバイスの対応するEA−FDU206を初期ロックするステップをさらに含み、前記固定成分tFは、前記スレーブデバイス中の伝播遅延の推定値に一致させることができる請求項1に記載の方法。 - 直列接続された半導体デバイスの構成を同期させるための方法であって、
前記処理するステップは、マスタ入力クロック信号とマスタ出力クロック信号との間の前記位相差を取得するステップをさらに含む請求項1に記載の方法。 - 直列接続された半導体デバイスの構成を同期させるための方法であって、
前記処理するステップでは、前記マスタ入力クロック信号と前記マスタ出力クロック信号との間の位相差を事前設定された許容値と比較し、前記位相差が許容される場合、前記処理を終了する請求項3に記載の方法。 - 直列接続された半導体デバイスの構成を同期させるための方法であって、
許容されない位相シフトが180度より大きいか、または小さいかを判定するステップをさらに含む請求項4に記載の方法。 - 直列接続された半導体デバイスの構成を同期させるための方法であって、
前記指令するステップでは、前記位相シフトが180度よりも小さい場合、遅延を増加させ、前記位相シフトが180度よりも大きい場合、遅延を低減させる請求項5に記載の方法。 - 直列接続された半導体デバイスの構成を同期させるための方法であって、
前記指令するステップは、Write EA−FDUコマンドを発行するステップを含む請求項6に記載の方法。
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US89424607P | 2007-03-12 | 2007-03-12 | |
US60/894,246 | 2007-03-12 | ||
US11/959,996 | 2007-12-19 | ||
US11/959,996 US7865756B2 (en) | 2007-03-12 | 2007-12-19 | Methods and apparatus for clock signal synchronization in a configuration of series-connected semiconductor devices |
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JP2009552980A Division JP5334869B2 (ja) | 2007-03-12 | 2008-02-05 | 直列接続された半導体デバイスの構成内のクロック信号同期の方法および装置 |
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JP2013236398A true JP2013236398A (ja) | 2013-11-21 |
JP5680151B2 JP5680151B2 (ja) | 2015-03-04 |
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JP2013155351A Expired - Fee Related JP5680151B2 (ja) | 2007-03-12 | 2013-07-26 | 直列接続された半導体デバイスの構成内のクロック信号同期の方法 |
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EP (2) | EP2118902B1 (ja) |
JP (2) | JP5334869B2 (ja) |
KR (1) | KR101454945B1 (ja) |
TW (1) | TWI472213B (ja) |
WO (1) | WO2008109981A1 (ja) |
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- 2008-02-05 KR KR1020097021268A patent/KR101454945B1/ko not_active IP Right Cessation
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EP2118902A1 (en) | 2009-11-18 |
TWI472213B (zh) | 2015-02-01 |
US8713344B2 (en) | 2014-04-29 |
KR20100015511A (ko) | 2010-02-12 |
TW200904110A (en) | 2009-01-16 |
US20110060934A1 (en) | 2011-03-10 |
EP2118902A4 (en) | 2010-11-24 |
JP2010524277A (ja) | 2010-07-15 |
EP2118902B1 (en) | 2012-07-18 |
EP2428960A1 (en) | 2012-03-14 |
EP2428960B1 (en) | 2013-10-09 |
US7865756B2 (en) | 2011-01-04 |
US20080226004A1 (en) | 2008-09-18 |
JP5334869B2 (ja) | 2013-11-06 |
JP5680151B2 (ja) | 2015-03-04 |
WO2008109981A1 (en) | 2008-09-18 |
KR101454945B1 (ko) | 2014-10-27 |
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