JP2013034028A - 電子デバイス - Google Patents
電子デバイス Download PDFInfo
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- JP2013034028A JP2013034028A JP2012251693A JP2012251693A JP2013034028A JP 2013034028 A JP2013034028 A JP 2013034028A JP 2012251693 A JP2012251693 A JP 2012251693A JP 2012251693 A JP2012251693 A JP 2012251693A JP 2013034028 A JP2013034028 A JP 2013034028A
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0688—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions characterised by the particular shape of a junction between semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66977—Quantum effect devices, e.g. using quantum reflection, diffraction or interference effects, i.e. Bragg- or Aharonov-Bohm effects
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/20—Organic diodes
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- H—ELECTRICITY
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/20—Organic diodes
- H10K10/23—Schottky diodes
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
- H10K10/40—Organic transistors
- H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
- H10K71/221—Changing the shape of the active layer in the devices, e.g. patterning by lift-off techniques
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
- H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
- H10K71/233—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers by photolithographic etching
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
- H10K77/10—Substrates, e.g. flexible substrates
- H10K77/111—Flexible substrates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
- H10K85/10—Organic polymers or oligomers
- H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
- H10K85/113—Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
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- Chemical & Material Sciences (AREA)
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Composite Materials (AREA)
- Materials Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Junction Field-Effect Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
【解決手段】電子デバイスは、移動電荷キャリアを支持する基板と、該基板面上に形成されてその両側に第1および第2の基板領域を定義し、該第1および第2の基板領域は該絶縁体によって定義される細長いチャネルによって接続され、該チャネルは該第1の領域から該第2の領域への基板内の電荷キャリア流路を提供し、該第1および該第2の基板領域間の伝導度は、この2つの領域間の電位差に依存する。該基板は有機材料とすることができる。移動電荷キャリアは、0.01cm2/Vs〜100cm2/Vsの範囲の移動度を有することができ、該電子デバイスはRFデバイスであってもよい。
【選択図】図1
Description
(i)該2DEG層に対して通常の方向に、単一の、明確に定義された、局在するモード(電子の量子波長の半分)を共有し、
(ii)該層の二次元領域内を自由に移動できる。
移動電荷キャリアが、電子に対抗して正孔の形を取るように、2DHG(二次元正孔ガス)も存在する。
Claims (21)
- 移動電荷キャリアを支持する基板と、
前記基板面上に形成されてその両側に第1および第2の基板領域を定義し、前記第1および第2の基板領域は絶縁体によって定義される細長いチャネルによって接続され、前記チャネルは前記第1の領域から第2の領域への基板内の電荷キャリア流路を提供し、前記第1および前記第2の基板領域間の伝導度は、この2つの領域間の電位差に依存する絶縁体と、を備え、
前記基板は有機材料を含むことを特徴とする電子デバイス。 - 移動電荷キャリアを支持する基板と、
前記基板面上に形成されてその両側に第1および第2の基板領域を定義し、前記第1および第2の基板領域は該絶縁体によって定義される細長いチャネルによって接続され、前記チャネルは前記第1の領域から第2の領域への基板内の電荷キャリア流路を提供し、前記第1および前記第2の基板領域間の伝導度は、この2つの領域間の電位差に依存する絶縁体と、を備え、
前記移動電荷キャリアは、0.01cm2/Vs〜100cm2/Vsの範囲の移動度を有することを特徴とする電子デバイス。 - 前記移動電荷キャリアは、少なくとも0.1cm2/Vsの移動度を有することを特徴とする請求項2に記載のデバイス。
- 前記の細長いチャネルは所定の幅であり、こうすることによって、前記細長いチャネルを通して前記移動電荷キャリアの流れを起こすために、前記第1および第2の基板領域間に電圧差を印加すると、前記第2の基板領域の電圧は、前記絶縁体を通して、前記細長いチャネル内に存在する空乏領域の大きさに影響を与え、このために、前記チャネルの伝導度特性は、前記電圧差に依存することを特徴とする請求項2または3に記載のデバイス。
- 前記デバイスは、例えば、0.5MHz〜1GHzの範囲のRF信号整流用のダイオードを備えることを特徴とする請求項2乃至4のいずれかに記載のデバイス。
- 前記移動電荷キャリアは、電子であることを特徴とする請求項1乃至請求項5のいずれかに記載のデバイス。
- 前記移動電荷キャリアは、正孔であることを特徴とする請求項1乃至請求項6のいずれかに記載のデバイス。
- 前記基板は、その厚みが20nmより大きいことを特徴とする請求項1乃至請求項7のいずれかに記載のデバイス。
- 前記デバイスは、ダイオードとして機能することを特徴とする請求項1乃至請求項8のいずれかに記載のデバイス。
- 前記絶縁体は、前記チャネルの伝導度を制御する電圧を印加するために、前記細長いチャネルに隣接して、さらに第3の基板領域を定義することを特徴とする請求項1乃至請求項9のいずれかに記載のデバイス。
- 前記絶縁体は、前記チャネルの伝導度を制御する電圧を印加するために、前記チャネルを挟んで前記第3の基板領域と反対側に、前記細長いチャネルに隣接して、さらに第4の基板領域を定義することを特徴とする請求項10に記載のデバイス。
- 前記デバイスは、トランジスタとして機能することを特徴とする請求項10または請求項11に記載のデバイス。
- 前記デバイスは、前記基板を単層内に配置したプレーナデバイスであることを特徴とする請求項1乃至請求項12のいずれかに記載のデバイス。
- 前記単層は、積層構造内の他材料からなる2つの追加層の間にサンドイッチされていないことを特徴とする請求項13に記載のデバイス。
- 前記単層は、前記デバイスの外表面を定義することを特徴とする請求項13または請求項14に記載のデバイス。
- 前記基板は、絶縁基板上に設けられた薄層として形成されることを特徴とする請求項1乃至請求項15のいずれかに記載のデバイス。
- 前記基板は、半導体ポリマ、ポリ(3−ヘキシル)チオフェン(P3HT)、有機低分子材料、ペンタセン、および、溶液処理された半導体ナノ粒子およびまたは量子点材料のうちの少なくとも1つを含み、
前記絶縁基板は、柔軟紙、ポエチレンテレフタレート(PET)、および、ポリエチレンナフタレート(PEN)材料のうちの少なくとも1つを含むことを特徴とする請求項1乃至請求項16のいずれかに記載のデバイス。 - さらに、電圧印加用電気端末を各領域にそれぞれ備えることを特徴とする請求項1乃至請求項17のいずれかに記載のデバイス。
- 請求項1乃至請求項18で請求された電子デバイスを少なくとも1つ含むことを特徴とする電子回路。
- 所望のインピーダンスを提供するために、前記第1および前記第2の基板領域間に、前記複数の電子デバイスを並列に配置することを特徴とする請求項19に記載の電子回路。
- RFIDタグを含むことを特徴とする請求項19または請求項20に記載の電子回路。
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