JP2010251731A - 半導体装置およびその作製方法 - Google Patents
半導体装置およびその作製方法 Download PDFInfo
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- JP2010251731A JP2010251731A JP2010068605A JP2010068605A JP2010251731A JP 2010251731 A JP2010251731 A JP 2010251731A JP 2010068605 A JP2010068605 A JP 2010068605A JP 2010068605 A JP2010068605 A JP 2010068605A JP 2010251731 A JP2010251731 A JP 2010251731A
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- oxide semiconductor
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- film transistor
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Abstract
【解決手段】絶縁表面上にゲート電極と、酸化シリコンを含む酸化物半導体層と、ゲート電極と酸化物半導体層の間に絶縁層と、酸化シリコンを含む酸化物半導体層とソース電極層またはドレイン電極層との間にソース領域またはドレイン領域とを有し、ソース領域またはドレイン領域は、縮退した酸化物半導体材料または酸窒化物材料を用いる。
【選択図】図1
Description
本実施の形態では、酸化シリコンを含む酸化物半導体層を用いた薄膜トランジスタの一例について図1(A)、(B)、(C)に説明する。
本実施の形態では、ゲート電極の幅が実施の形態1とは異なる薄膜トランジスタの一例について図2(A)及び図2(B)に説明する。
本実施の形態では、マスク数を低減するため、高階調マスクを用いた露光を行う例を示す。
本実施の形態では、チャネルストップ型の薄膜トランジスタ430の一例について図13(A)及び図13(B)に説明する。また、図13(B)は薄膜トランジスタの上面図の一例であり、図中Z1―Z2の鎖線で切断した断面図が図13(A)に相当する。また、薄膜トランジスタ430の酸化物半導体層にインジウムを含まない酸化物半導体材料を用いる例を示す。
本実施の形態では、2つのnチャネル型の薄膜トランジスタ760、761を用いてインバータ回路を構成する例を、図14を用いて説明する。また、薄膜トランジスタ760、761の酸化物半導体層にガリウムを含まない酸化物半導体材料を用いる例を示す。
本実施の形態では、トップゲート型の薄膜トランジスタ330の一例について図15(A)及び図15(B)に説明する。また、図15(B)は薄膜トランジスタの上面図の一例であり、図中P1―P2の鎖線で切断した断面図が図15(A)に相当する。
本実施の形態では、トップゲート型の薄膜トランジスタ630の一例について図16(A)及び図16(B)に説明する。また、図16(B)は薄膜トランジスタの上面図の一例であり、図中R1―R2の鎖線で切断した断面図が図16(A)に相当する。
図31(A)は、上下を2つのゲート電極に挟まれた酸化物半導体層を用いた薄膜トランジスタの断面図の一例である。本実施の形態では、絶縁表面を有する基板上に、画素部及び駆動回路に用いる薄膜トランジスタを設ける作製方法の一例を示す。
図32(A)は、上下を2つのゲート電極に挟まれた酸化物半導体層を用いた薄膜トランジスタの断面図の一例である。本実施の形態では、絶縁表面を有する基板上に、画素部及び駆動回路に用いる薄膜トランジスタを設ける作製方法の一例を示す。
図33(A)は、上下を2つのゲート電極に挟まれた酸化物半導体層を用いた薄膜トランジスタの断面図の一例である。本実施の形態では、絶縁表面を有する基板上に、画素部及び駆動回路に用いる薄膜トランジスタを設ける作製方法の一例を示す。
図34(A)は、上下を2つのゲート電極層に挟まれた酸化物半導体層を用いた薄膜トランジスタの断面図の一例である。本実施の形態では、絶縁表面を有する基板上に、画素部及び駆動回路に用いる薄膜トランジスタの一例を示す。
図35(A)は、上下を2つのゲート電極層に挟まれた酸化物半導体層を用いた薄膜トランジスタの断面図の一例である。本実施の形態では、絶縁表面を有する基板上に、画素部及び駆動回路に用いる薄膜トランジスタの一例を示す。
図36(A)は、上下を2つのゲート電極層に挟まれた酸化物半導体層を用いた薄膜トランジスタの断面図の一例である。本実施の形態では、絶縁表面を有する基板上に、画素部及び駆動回路に用いる薄膜トランジスタの一例を示す。
半導体装置の一例である表示装置において、同一基板上に少なくとも駆動回路の一部と、画素部に配置する薄膜トランジスタを作製する例について以下に説明する。
本実施の形態では、半導体装置として発光表示装置の一例を示す。表示装置の有する表示素子としては、ここではエレクトロルミネッセンスを利用する発光素子を用いて示す。エレクトロルミネッセンスを利用する発光素子は、発光材料が有機化合物であるか、無機化合物であるかによって区別され、前者は有機EL素子、後者は無機EL素子と呼ばれている。
酸化シリコン(SiOx)を含む酸化物半導体層をチャネル形成領域に用い、ソース領域またはドレイン領域として窒素を添加した酸化物半導体を用いた薄膜トランジスタを作製し、該薄膜トランジスタを駆動回路、さらには画素部に用いて表示機能を有する液晶表示装置を作製することができる。また、薄膜トランジスタを用いた駆動回路の一部または全体を、画素部と同じ基板上に一体形成し、システムオンパネルを形成することができる。
本実施の形態では、半導体装置として電子ペーパーの一例を示す。
酸化シリコン(SiOx)を含む酸化物半導体層をチャネル形成領域に用い、ソース領域またはドレイン領域として窒素を添加した酸化物半導体を用いた薄膜トランジスタを含む半導体装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用などのモニタ、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機などの大型ゲーム機などが挙げられる。
11 ゲート電極層
12 下地絶縁層
13 ゲート絶縁層
14a ソース領域またはドレイン領域
14b ソース領域またはドレイン領域
15a ソース電極層またはドレイン電極層
15b ソース電極層またはドレイン電極層
16 酸化物半導体層
17 樹脂層
18 保護絶縁層
19 ゲート電極層
20 薄膜トランジスタ
21 薄膜トランジスタ
22 薄膜トランジスタ
23 薄膜トランジスタ
24a ソース領域またはドレイン領域
24b ソース領域またはドレイン領域
25a ソース電極層またはドレイン電極層
25b ソース電極層またはドレイン電極層
26 酸化物半導体層
27a ソース領域またはドレイン領域
27b ソース領域またはドレイン領域
28a ソース電極層またはドレイン電極層
28b ソース電極層またはドレイン電極層
29 薄膜トランジスタ
30 薄膜トランジスタ
31 薄膜トランジスタ
32 薄膜トランジスタ
33 薄膜トランジスタ
34 薄膜トランジスタ
35 薄膜トランジスタ
36 薄膜トランジスタ
37 薄膜トランジスタ
38 薄膜トランジスタ
39 薄膜トランジスタ
40 薄膜トランジスタ
41 チャネル保護層
42 チャネル保護層
43 チャネル保護層
44 酸化物半導体層
100 基板
101 ゲート電極層
102 ゲート絶縁層
103 酸化物半導体層
104a ソース領域またはドレイン領域
104b ソース領域またはドレイン領域
105a ソース電極層またはドレイン電極層
105b ソース電極層またはドレイン電極層
106 保護絶縁層
107 絶縁膜
108 容量配線
110 画素電極層
120 接続電極
121 端子
122 端子
128 透明導電膜
129 透明導電膜
150 端子
151 端子
152 ゲート絶縁層
153 接続電極
154 保護絶縁膜
155 透明導電膜
156 電極
160 薄膜トランジスタ
170 薄膜トランジスタ
300 基板
301 ゲート電極
303 ゲート絶縁層
305 酸化物半導体層
304a 酸窒化物層
304b 酸窒化物層
309 配線
310 配線
330 薄膜トランジスタ
350 基板
351 ゲート電極層
352 ゲート絶縁層
353 酸化物半導体層
354a ソース領域またはドレイン領域
354b ソース領域またはドレイン領域
355a ソース電極層またはドレイン電極層
355b ソース電極層またはドレイン電極層
357 絶縁膜
35a ソース領域またはドレイン領域
35b ソース領域またはドレイン領域
360 薄膜トランジスタ
36a ソース電極層またはドレイン電極層
36b ソース電極層またはドレイン電極層
380 酸化物半導体膜
381 酸窒化物膜
383 導電膜
384 マスク
385 酸窒化物層
387 導電層
388 マスク
390 酸化物半導体層
400 基板
401 ゲート電極
402 ゲート絶縁層
403 酸化物半導体層
406a ソース領域またはドレイン領域
406b ソース領域またはドレイン領域
409 配線
410 配線
418 チャネル保護層
430 薄膜トランジスタ
580 基板
581 薄膜トランジスタ
585 絶縁層
587 電極層
588 電極層
589 球形粒子
590a 黒色領域
590b 白色領域
594 キャビティ
595 充填材
596 基板
600 基板
601 ゲート電極
603 ゲート絶縁層
605 酸化物半導体層
606a ソース領域又はドレイン領域
606b ソース領域又はドレイン領域
609 配線
610 配線
630 薄膜トランジスタ
740 基板
741 ゲート電極
742 ゲート電極
743 ゲート絶縁層
744 コンタクトホール
745 酸化物半導体層
747 酸化物半導体層
749 配線
750 配線
751 配線
755a ソース領域又はドレイン領域
755b ソース領域又はドレイン領域
756a ソース領域又はドレイン領域
756b ソース領域又はドレイン領域
760 薄膜トランジスタ
761 薄膜トランジスタ
1000 携帯電話機
1001 筐体
1002 表示部
1003 操作ボタン
1004 外部接続ポート
1005 スピーカ
1006 マイク
2600 素子基板
2601 対向基板
2602 シール材
2603 素子層
2604 液晶層
2606 偏光板
2607 偏光板
2608 配線回路部
2609 フレキシブル配線基板
2611 反射板
2612 回路基板
2613 光学シート
2700 電子書籍
2701 筐体
2703 筐体
2705 表示部
2707 表示部
2711 軸部
2721 電源
2723 操作キー
2725 スピーカ
2912 LED制御回路
4001 基板
4002 画素部
4003 信号線駆動回路
4003a 信号線駆動回路
4003b 信号線駆動回路
4004 走査線駆動回路
4005 シール材
4006 基板
4008 液晶層
4010 薄膜トランジスタ
4011 薄膜トランジスタ
4012 遮光層
4013 液晶素子
4015 接続端子電極
4016 端子電極
4018 FPC
4019 異方性導電膜
4020 絶縁層
4021 絶縁層
4030 画素電極層
4031 共通電極層
4032 偏光板
4033 偏光版
4034 遮光層
4501 基板
4502 画素部
4503a 信号線駆動回路
4503b 信号線駆動回路
4504a 走査線駆動回路
4504b 走査線駆動回路
4505 シール材
4506 基板
4507 充填材
4509 薄膜トランジスタ
4510 薄膜トランジスタ
4511 発光素子
4512 電界発光層
4513 電極層
4515 接続端子電極
4516 端子電極
4517 電極層
4518a FPC
4518b FPC
4519 異方性導電膜
4520 隔壁
5300 基板
5301 画素部
5302 走査線駆動回路
5303 信号線駆動回路
5400 基板
5401 画素部
5402 走査線駆動回路
5403 信号線駆動回路
5404 走査線駆動回路
5501 配線
5502 配線
5503 配線
5504 配線
5505 配線
5506 配線
5543 ノード
5544 ノード
5571 薄膜トランジスタ
5572 薄膜トランジスタ
5573 薄膜トランジスタ
5574 薄膜トランジスタ
5575 薄膜トランジスタ
5576 薄膜トランジスタ
5577 薄膜トランジスタ
5578 薄膜トランジスタ
5601 ドライバIC
5602 スイッチ群
5603a 薄膜トランジスタ
5603b 薄膜トランジスタ
5603c 薄膜トランジスタ
5611 配線
5612 配線
5613 配線
5621 配線
5701 フリップフロップ
5703a タイミング
5703b タイミング
5703c タイミング
5711 配線
5712 配線
5713 配線
5714 配線
5715 配線
5716 配線
5717 配線
5721 信号
5803a タイミング
5803b タイミング
5803c タイミング
5821 信号
6400 画素
6401 スイッチング用トランジスタ
6402 駆動用トランジスタ
6403 容量素子
6404 発光素子
6405 信号線
6406 走査線
6407 電源線
6408 共通電極
7001 TFT
7002 発光素子
7003 陰極
7004 発光層
7005 陽極
7011 TFT
7012 発光素子
7013 陰極
7014 発光層
7015 陽極
7016 遮蔽膜
7017 導電膜
7021 TFT
7022 発光素子
7023 陰極
7024 発光層
7025 陽極
7027 導電膜
9400 通信装置
9401 筐体
9402 操作ボタン
9403 外部入力端子
9404 マイク
9405 スピーカ
9406 発光部
9410 表示装置
9411 筐体
9412 表示部
9413 操作ボタン
9600 テレビジョン装置
9601 筐体
9603 表示部
9607 表示部
9609 操作キー
9610 リモコン操作機
9881 筐体
9882 表示部
9883 表示部
9884 スピーカ部
9885 操作キー
9886 記録媒体挿入部
9887 接続端子
9888 センサ
9889 マイクロフォン
9890 LEDランプ
9891 筐体
9893 連結部
2910B 発光ダイオード
2910G 発光ダイオード
2910R 発光ダイオード
Claims (7)
- 絶縁表面上にゲート電極と、
酸化シリコンを含む酸化物半導体層と、
前記ゲート電極と前記酸化物半導体層の間に絶縁層と、
前記酸化シリコンを含む酸化物半導体層とソース電極層またはドレイン電極層との間にソース領域またはドレイン領域とを有し、
前記ソース領域またはドレイン領域は、縮退した酸化物半導体材料または酸窒化物材料である半導体装置。 - 請求項1において、前記縮退した酸化物半導体材料は、透光性を有することを特徴とする半導体装置。
- 請求項1または請求項2において、前記酸化シリコンを含む酸化物半導体層は亜鉛を含むことを特徴とする半導体装置。
- 請求項1乃至3のいずれか一において、前記酸化シリコンを含む酸化物半導体層は、酸化シリコンを2.5重量%以上20重量%以下含む酸化物半導体ターゲットを用いたスパッタ法で形成されることを特徴とする半導体装置。
- 絶縁表面上にゲート電極を形成し、
前記ゲート電極上に絶縁層を形成し、
前記絶縁層上に酸化シリコンを2.5重量%以上20重量%以下含む第1の酸化物半導体ターゲットを用いたスパッタ法で酸化シリコンを含む酸化物半導体層を成膜し、
前記酸化シリコンを含む酸化物半導体層上に窒素を含む雰囲気下で第2の酸化物半導体ターゲットを用いたスパッタ法で酸窒化物層を形成する半導体装置の作製方法。 - 請求項5において、前記酸窒化物層の形成後、さらに前記ゲート電極と重なる前記酸窒化物層の一部を除去して、前記酸化シリコンを含む酸化物半導体層の一部を露呈させることを特徴とする半導体装置の作製方法。
- 絶縁表面上に酸化シリコンを2.5重量%以上20重量%以下含む第1の酸化物半導体ターゲットを用いたスパッタ法で酸化物半導体層を成膜し、
前記酸化シリコンを含む酸化物半導体層上に窒素を含む雰囲気下で第2の酸化物半導体ターゲットを用いたスパッタ法で酸窒化物層を形成し、
前記酸窒化物層を覆う絶縁層を形成し、
前記絶縁層上にゲート電極を形成することを特徴とする半導体装置の作製方法。
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JP2012114426A (ja) * | 2010-11-05 | 2012-06-14 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
KR20120100753A (ko) * | 2011-03-04 | 2012-09-12 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 제작 방법 |
JP2012216795A (ja) * | 2011-03-25 | 2012-11-08 | Semiconductor Energy Lab Co Ltd | 半導体装置および該半導体装置の作製方法 |
JP2013012610A (ja) * | 2011-06-29 | 2013-01-17 | Dainippon Printing Co Ltd | 薄膜トランジスタおよびその製造方法 |
JP2016171282A (ja) * | 2015-03-16 | 2016-09-23 | 日本放送協会 | 薄膜トランジスタおよびその製造方法 |
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Also Published As
Publication number | Publication date |
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KR101695149B1 (ko) | 2017-01-23 |
JP5539764B2 (ja) | 2014-07-02 |
US8450144B2 (en) | 2013-05-28 |
US20100244020A1 (en) | 2010-09-30 |
CN101847661B (zh) | 2015-02-25 |
KR20100108245A (ko) | 2010-10-06 |
CN101847661A (zh) | 2010-09-29 |
TW201044585A (en) | 2010-12-16 |
TWI501395B (zh) | 2015-09-21 |
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