JP2010004028A - 配線基板及びその製造方法、及び半導体装置 - Google Patents
配線基板及びその製造方法、及び半導体装置 Download PDFInfo
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- JP2010004028A JP2010004028A JP2009121425A JP2009121425A JP2010004028A JP 2010004028 A JP2010004028 A JP 2010004028A JP 2009121425 A JP2009121425 A JP 2009121425A JP 2009121425 A JP2009121425 A JP 2009121425A JP 2010004028 A JP2010004028 A JP 2010004028A
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- wiring pattern
- wiring
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
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Abstract
【解決手段】所定の方向Aに対して、グラウンド用配線パターン25と電源用配線パターン26とが交互になるように、複数のキャパシタ28,29の電極28A,29Aが接続されるグラウンド用配線パターン25、及び半導体チップ12がフリップチップ接続されると共に、複数のキャパシタ28,29の電極28B,29Bが接続される電源用配線パターン26を配置し、グラウンド用配線パターン25及び電源用配線パターン26に対して複数のキャパシタ28,29を並列に接続した。
【選択図】図2
Description
11 配線基板
12 半導体チップ
13−1 信号用外部接続端子
13−2 グラウンド用外部接続端子
13−3 電源用外部接続端子
21 補強部材
21A,21B,22A,22B,36A,55A,62A,91A,103A,103B,105A 面
22 絶縁部材
24 信号用パッド
24A,25A,26A チップ接続面
24B,25B,26B 接続面
25 グラウンド用配線パターン
26 電源用配線パターン
28,29 キャパシタ
28A,28B,29A,29B 電極
31〜33,64〜66 ビア
36,72 ソルダーレジスト層
38 多層配線構造体
41 貫通部
42,44,45 貫通孔
47〜49,72A,72B,72C,75〜77,81〜83 開口部
51〜53 配線
55,62 絶縁層
57〜59 配線パターン
68,69,71 外部接続用パッド
85 信号用電極パッド
86 グラウンド用電極パッド
87 電源用電極パッド
89 バンプ
91 はんだ
101 支持体
103 支持体本体
105 金属箔
106 接着剤
110 構造体
A 所定の方向
C 切断位置
Claims (10)
- 一対の電極を有する複数のキャパシタと、
半導体チップがフリップチップ接続される第1のチップ接続面と、前記第1のチップ接続面の反対側に位置すると共に、前記キャパシタの一方の電極と接続される第1の接続面とを有するグラウンド用配線パターンと、
前記半導体チップがフリップチップ接続される第2のチップ接続面と、前記第2のチップ接続面の反対側に位置すると共に、前記キャパシタの他方の電極と接続される第2の接続面とを有する電源用配線パターンと、を備え、
所定の方向に対して、前記グラウンド用配線パターンと前記電源用配線パターンとが交互になるように、前記グラウンド用配線パターン及び前記電源用配線パターンを配置すると共に、前記グラウンド用配線パターン及び前記電源用配線パターンに対して、前記複数のキャパシタを並列に接続したことを特徴とする配線基板。 - 前記複数のキャパシタは、それぞれ容量が異なることを特徴とする請求項1記載の配線基板。
- 前記電源用配線及び前記グラウンド用配線のうち、一方の配線がm本(m≧1)であり、他方の配線が(m+1)本(m≧1)であることを特徴とする請求項1又は2記載の配線基板。
- 前記第1のチップ接続面を露出する開口部と、前記第2のチップ接続面を露出する開口部とを備えたソルダーレジスト層を設け、
前記ソルダーレジスト層に、絶縁性を有すると共に、前記複数のキャパシタを収容する貫通部を備えた補強部材を設け、前記貫通部に前記複数のキャパシタを封止する絶縁部材を設けたことを特徴とする請求項1ないし3のうち、いずれか1項記載の配線基板。 - 前記補強部材は、ガラスエポキシ基板であることを特徴とする請求項4記載の配線基板。
- 前記ソルダーレジスト層と接触する前記補強部材の第1の面とは反対側に位置する前記補強部材の第2の面、及び前記ソルダーレジスト層と接触する前記絶縁部材の第1の面とは反対側に位置する前記絶縁部材の第2の面を平坦な面にすると共に、前記補強部材の第2の面と前記絶縁部材の第2の面とを略面一にしたことを特徴とする請求項4または5記載の配線基板。
- 前記補強部材の第2の面及び前記絶縁部材の第2の面に、前記複数のキャパシタと電気的に接続された多層配線構造体を設けたことを特徴とする請求項6記載の配線基板。
- 請求項1ないし7のうち、いずれか1項記載の配線基板と、
前記配線基板と電気的に接続される前記半導体チップと、を備えたことを特徴とする半導体装置。 - 一対の電極を有する複数のキャパシタと、
半導体チップがフリップチップ接続される第1のチップ接続面と、前記第1のチップ接続面の反対側に位置すると共に、前記キャパシタの一方の電極と接続される第1の接続面とを有するグラウンド用配線パターンと、
前記半導体チップがフリップチップ接続される第2のチップ接続面と、前記第2のチップ接続面の反対側に位置すると共に、前記キャパシタの他方の電極と接続される第2の接続面とを有する電源用配線パターンと、を備えた配線基板の製造方法であって、
支持体上に、前記第1のチップ接続面を露出する開口部と、前記第2のチップ接続面を露出する開口部とを有する樹脂層を形成する樹脂層形成工程と、
前記樹脂層上に、所定の方向に対して、前記グラウンド用配線パターンと前記電源用配線パターンとが交互になるように、前記電源用配線パターン及び前記グラウンド用配線パターンを形成する配線パターン形成工程と、
前記電源用配線パターン及び前記グラウンド用配線パターンに、前記複数のキャパシタを並列に接続するキャパシタ接続工程と、
前記キャパシタ接続工程後、前記樹脂層上に、絶縁性を有すると共に、前記複数のキャパシタを収容する貫通部を備えた補強部材を形成する補強部材形成工程と、
前記支持体を除去する支持体除去工程と、を含むことを特徴とする配線基板の製造方法。 - 前記補強部材形成工程と前記支持体除去工程との間に、前記貫通部を樹脂で充填して、前記複数のキャパシタを封止する絶縁部材を形成する絶縁部材形成工程と、
前記絶縁部材形成工程後、前記樹脂層と接触する面とは反対側に位置する前記補強部材の面、及び前記樹脂層と接触する面とは反対側に位置する前記絶縁部材の面に、前記キャパシタと電気的に接続される多層配線構造体を形成する多層配線構造体形成工程と、をさらに設けたことを特徴とする請求項9記載の配線基板の製造方法。
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