JP2007074291A5 - - Google Patents
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- JP2007074291A5 JP2007074291A5 JP2005258330A JP2005258330A JP2007074291A5 JP 2007074291 A5 JP2007074291 A5 JP 2007074291A5 JP 2005258330 A JP2005258330 A JP 2005258330A JP 2005258330 A JP2005258330 A JP 2005258330A JP 2007074291 A5 JP2007074291 A5 JP 2007074291A5
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前記周波数信号を電圧制御発振部の設定周波数に応じて1/N(Nは整数)に分周する分周手段と、
前記電圧制御発振部の出力周波数の1/Nに相当する周波数の正弦波信号を基準クロック信号に基づいてサンプリングしてそのサンプリング値をディジタル信号として出力するアナログ/ディジタル変換部と、
このアナログ/ディジタル変換部からの出力信号に対応する周波数信号に対して、周波数がω0/2πの正弦波信号のディジタル信号による直交検波を行い、当該周波数信号の周波数とω0/2πとの周波数差に相当する周波数で回転する回転ベクトルを複素表示したときの実数部分及び虚数部分を取り出す回転ベクトル取り出し手段と、
前記電圧制御発振部の出力周波数が設定値になったときの前記回転ベクトルの周波数を計算し、この計算された周波数を、粗い周波数刻みで設定した粗調整のための周波数と細かい周波数刻みで設定した微調整のための周波数との合計として求めるパラメータ出力部と、
前記パラメータ出力部にて計算された前記粗調整のための周波数で前記回転ベクトルに対して逆回転する逆回転ベクトルを前記回転ベクトルにて乗算して、前記回転ベクトルと前記逆回転ベクトルとの差分周波数で回転する微速回転ベクトルを得る手段と、
この手段で求められた微速回転ベクトルの周波数と、前記微調整のための周波数で回転する回転ベクトルの周波数との差分に対応する値を積分する手段と、
この手段で求められた積分値に相当する電圧信号を前記電圧制御発振部に帰還する手段と、を備え、
電圧制御発振部、回転ベクトル取り出し手段、及び前記電圧信号を電圧制御発振部に帰還する手段によりPLLが形成され、PLLがロックされたときに電圧制御発振部の出力周波数が設定周波数に調整されることを特徴とする周波数シンセサイザ。 A voltage-controlled oscillator that oscillates a frequency signal having a frequency corresponding to the supplied voltage;
Frequency dividing means for dividing the frequency signal into 1 / N (N is an integer) according to the set frequency of the voltage controlled oscillation unit;
An analog / digital converter that samples a sine wave signal having a frequency corresponding to 1 / N of the output frequency of the voltage-controlled oscillator based on a reference clock signal and outputs the sampled value as a digital signal;
The frequency signal corresponding to the output signal from the analog / digital conversion unit is subjected to quadrature detection using a digital signal of a sine wave signal having a frequency of ω0 / 2π, and the frequency difference between the frequency of the frequency signal and ω0 / 2π is detected. Rotation vector extraction means for extracting a real part and an imaginary part when a rotation vector rotating at a frequency corresponding to
Calculate the frequency of the rotation vector when the output frequency of the voltage controlled oscillation unit reaches a set value, and set the calculated frequency at the coarse adjustment frequency and fine frequency increment. A parameter output unit obtained as a sum of the frequency for fine adjustment ,
A difference between the rotation vector and the reverse rotation vector is obtained by multiplying the rotation vector by a reverse rotation vector that rotates reversely with respect to the rotation vector at the frequency for the coarse adjustment calculated by the parameter output unit. Means for obtaining a slow rotation vector rotating at a frequency;
Means for integrating a value corresponding to the difference between the frequency of the slow rotation vector determined by this means and the frequency of the rotation vector rotating at the frequency for fine adjustment;
Means for feeding back a voltage signal corresponding to the integral value obtained by this means to the voltage-controlled oscillator,
A PLL is formed by the voltage controlled oscillation unit, the rotation vector extracting means, and the means for feeding back the voltage signal to the voltage controlled oscillation unit, and the output frequency of the voltage controlled oscillation unit is adjusted to the set frequency when the PLL is locked. This is a frequency synthesizer.
前記周波数信号を電圧制御発振部の設定周波数に応じて1/N(Nは整数)に分周する分周手段と、
前記電圧制御発振部の出力周波数の1/Nに相当する周波数の正弦波信号を基準クロック信号に基づいてサンプリングしてそのサンプリング値をディジタル信号として出力するアナログ/ディジタル変換部と、
このアナログ/ディジタル変換部からの出力信号に対応する周波数信号に対して、周波数がω0/2πの正弦波信号のディジタル信号による直交検波を行い、当該周波数信号の周波数とω0/2πとの周波数差に相当する周波数で回転する回転ベクトルを複素表示したときの実数部分及び虚数部分を取り出す回転ベクトル取り出し手段と、
前記電圧制御発振部の出力周波数が設定値になったときの前記回転ベクトルの周波数を計算するパラメータ出力部と、
前記回転ベクトルの周波数と前記パラメータ出力部にて計算された周波数との差分を取り出す周波数差取り出し手段と、
この周波数差取り出し手段により取り出された周波数差に相当する信号を積分して前記電圧制御発振部に帰還する手段と、を備え、
前記パラメータ出力部は、粗調整のための周波数刻みfaの整数倍の周波数のうち、電圧制御発振部の出力周波数が設定値になったときの前記回転ベクトルの周波数に最も近い周波数n・fa(nは整数)と、前記周波数刻みfaよりも小さい微調整のための周波数刻みfbの整数倍のうち、電圧制御発振部の出力周波数が設定値になったときの前記回転ベクトルの周波数と前記周波数n・faとの差に最も近い周波数m・fb(mは整数)と、を計算し、
前記周波数差取り出し手段は、前記回転ベクトル取り出し手段により得られた前記回転ベクトルに、周波数n・faで逆回転する逆回転ベクトルを乗算して、前記回転ベクトルの周波数から逆回転ベクトルの周波数を差し引いた周波数の微速回転ベクトルを取り出す手段と、前記微速回転ベクトルの周波数を、当該微速回転ベクトルの各サンプリング時の実数部分及び虚数部分の値から求める微速回転ベクトルの微速検出手段と、この微速検出手段で検出された微速回転ベクトルの周波数と周波数m・fbとの差に相当する信号を出力する手段と、を備え、
電圧制御発振部、回転ベクトル取り出し手段、及び前記電圧信号を電圧制御発振部に帰還する手段によりPLLが形成され、PLLがロックされたときに電圧制御発振部の出力周波数が設定周波数に調整されることを特徴とする周波数シンセサイザ。 A voltage-controlled oscillator that oscillates a frequency signal having a frequency corresponding to the supplied voltage;
Frequency dividing means for dividing the frequency signal into 1 / N (N is an integer) according to the set frequency of the voltage controlled oscillation unit;
An analog / digital converter that samples a sine wave signal having a frequency corresponding to 1 / N of the output frequency of the voltage-controlled oscillator based on a reference clock signal and outputs the sampled value as a digital signal;
The frequency signal corresponding to the output signal from the analog / digital conversion unit is subjected to quadrature detection using a digital signal of a sine wave signal having a frequency of ω0 / 2π, and the frequency difference between the frequency of the frequency signal and ω0 / 2π is detected. Rotation vector extraction means for extracting a real part and an imaginary part when a rotation vector rotating at a frequency corresponding to
A parameter output unit for calculating the frequency of the rotation vector when the output frequency of the voltage controlled oscillation unit reaches a set value;
A frequency difference extracting means for extracting a difference between the frequency of the rotation vector and the frequency calculated by the parameter output unit;
Means for integrating a signal corresponding to the frequency difference extracted by the frequency difference extracting means and feeding back to the voltage controlled oscillation unit,
The parameter output unit has a frequency n · fa () that is closest to the frequency of the rotation vector when the output frequency of the voltage-controlled oscillation unit reaches a set value among frequencies that are integral multiples of the frequency increment fa for coarse adjustment. n is an integer) and an integer multiple of the frequency increment fb for fine adjustment smaller than the frequency increment fa, and the frequency of the rotation vector and the frequency when the output frequency of the voltage controlled oscillation unit becomes a set value. a frequency m · fb (m is an integer) closest to the difference from n · fa;
The frequency difference extraction unit multiplies the rotation vector obtained by the rotation vector extraction unit by a reverse rotation vector that rotates in reverse at a frequency of n · fa, and subtracts the frequency of the reverse rotation vector from the frequency of the rotation vector. Means for taking out the slow rotation vector of the determined frequency, the slow speed detection means for the slow speed rotation vector for obtaining the frequency of the slow speed rotation vector from the values of the real part and the imaginary part at the time of each sampling of the slow speed rotation vector, and this slow speed detection means And a means for outputting a signal corresponding to the difference between the frequency of the slow rotation vector detected in step 1 and the frequency m · fb,
A PLL is formed by the voltage controlled oscillation unit, the rotation vector extracting means, and the means for feeding back the voltage signal to the voltage controlled oscillation unit, and the output frequency of the voltage controlled oscillation unit is adjusted to the set frequency when the PLL is locked. This is a frequency synthesizer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2005258330A JP4397363B2 (en) | 2005-09-06 | 2005-09-06 | Frequency synthesizer |
Applications Claiming Priority (1)
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JP2005258330A JP4397363B2 (en) | 2005-09-06 | 2005-09-06 | Frequency synthesizer |
Publications (3)
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JP2007074291A JP2007074291A (en) | 2007-03-22 |
JP2007074291A5 true JP2007074291A5 (en) | 2009-07-23 |
JP4397363B2 JP4397363B2 (en) | 2010-01-13 |
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JP2005258330A Active JP4397363B2 (en) | 2005-09-06 | 2005-09-06 | Frequency synthesizer |
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Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP4843704B2 (en) | 2009-09-30 | 2011-12-21 | 日本電波工業株式会社 | Frequency synthesizer |
US8395429B2 (en) | 2011-03-31 | 2013-03-12 | Nihon Dempa Kogyo Co., Ltd. | Signal generating device and frequency synthesizer |
US8653860B2 (en) | 2011-05-20 | 2014-02-18 | Nihon Dempa Kogyo Co., Ltd. | Frequency synthesizer |
JP7261077B2 (en) * | 2019-04-23 | 2023-04-19 | 日本電波工業株式会社 | PLL device |
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