JP2006502561A - パッド下の集積半導体構造 - Google Patents
パッド下の集積半導体構造 Download PDFInfo
- Publication number
- JP2006502561A JP2006502561A JP2004516476A JP2004516476A JP2006502561A JP 2006502561 A JP2006502561 A JP 2006502561A JP 2004516476 A JP2004516476 A JP 2004516476A JP 2004516476 A JP2004516476 A JP 2004516476A JP 2006502561 A JP2006502561 A JP 2006502561A
- Authority
- JP
- Japan
- Prior art keywords
- metal
- semiconductor structure
- integrated semiconductor
- structure according
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
- H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
- H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
- H01L2224/02165—Reinforcing structures
- H01L2224/02166—Collar structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05085—Plural internal layers being stacked with additional elements, e.g. vias arrays, interposed between the stacked layers
- H01L2224/05089—Disposition of the additional element
- H01L2224/05093—Disposition of the additional element of a plurality of vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05684—Tungsten [W] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0101—Neon [Ne]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01032—Germanium [Ge]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01039—Yttrium [Y]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01042—Molybdenum [Mo]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (20)
- 基板(1)と、
該基板(1)上に位置する少なくとも1つの半導体素子(2)と、
面(F)を有するパッド金属(3)と、
該パッド金属(3)と該基板(1)との間に位置する複数の金属層(4.x)と、
該複数の金属層(4.x)を互いに分離する複数の絶縁層(5.y)とを備え、ここで、該パッド金属(3)は、該少なくとも1つの半導体素子(2)の一部の上方において拡がる、集積半導体構造において、
該パッド金属(3)の該面(F)の下方において、少なくとも最上位の2つ金属層(4.x,4.x−1)は、各々、少なくとも2つの隣接する導体路(4.x.z,4.x−1.z)を含む構造を有することを特徴とする、集積半導体構造。 - 1つの金属層(4.x)の前記導体路(4.x.z)の前記数zは、前記パッド金属(3)の前記面(F)の下方において、2と6との間にあることを特徴とする、請求項1に記載の集積半導体構造。
- 1つの金属層(4.x)内において、前記導体路(4.x.z)は、互いに電気的に絶縁されていることを特徴とする、請求項1または2に記載の集積半導体構造。
- 1つの金属層(4.x)内において、前記導体路(4.x.z)は、互いに電気的に接続されていることを特徴とする、請求項1〜3のいずれか一項に記載の集積半導体構造。
- 1つの金属層(4.x)内において、前記導体路(4.x.z)は、幅(B)および互いの間隔(A)を有し、ここで、該幅(B)と該間隔(A)との比率は、3と20との間にあることを特徴とする、請求項1〜4のいずれか一項に記載の集積半導体構造。
- 前記幅(B)と前記間隔(A)との比率は、10であることを特徴とする、請求項5に記載の集積半導体構造。
- 少なくとも前記パッド金属(3)の前記面(F)の下方において、前記最上位の金属層(4.x)の前記導体路(4.x.z)と前記その下に位置する金属層(4.x−1)の前記導体路(4.x−1.z)とを電気的に接続する複数のビア(6)が存在し、ここで、該複数のビア(6)は前記絶縁層(5.y−1)を貫通することを特徴とする、請求項1〜6のいずれか一項に記載の集積半導体構造。
- 少なくとも前記パッド金属(3)の前記面(F)の下方において、前記最上位の2つの金属層(4.x,4.x−1)の前記導体路(4.x.z,4.x−1.z)は、複数の開口部(7.x,7.x−1)を有することを特徴とする、請求項1〜7のいずれか一項に記載の集積半導体構造。
- 少なくとも前記パッド金属(3)の前記面(F)の下方において、前記開口部(7.x,7.x−1)は、前記導体路(4.x.z,4.x−1.z)の総面積の5%と30%との間の総面積を有することを特徴とする、請求項8に記載の集積半導体構造。
- 前記開口部(7.x,7.x−1)は、前記導体路(4.x.z,4.x−1.z)の総面積の20%の総面積を有することを特徴とする、請求項9に記載の集積半導体構造。
- 前記最上位の2つの金属層(4.x,4.x−1)の前記導体路(4.x.z,4.x−1.z)は、前記最上位の導体路(4.x.z)の前記開口部(7.x)が前記その下に位置する導体路(4.x−1.z)の前記開口部(7.x−1)に対してオフセットするように、互いに配置されることを特徴とする、請求項8〜10のいずれか一項に記載の集積半導体構造。
- 前記最上位の金属層(4.x)の前記導体路(4.x.z)は、前記その下に位置する金属層(4.x−1)の前記導体路(4.x−1.z)の上方において、ほぼ同一形状にて位置することを特徴とする、請求項8〜11のいずれか一項に記載の集積半導体構造。
- 前記最上位の金属層(4.x)の前記導体路(4.x.z)は、前記その下に位置する金属層(4.x−1)の前記導体路(4.x−1.z)に対してオフセットして位置することを特徴とする、請求項8〜12のいずれか一項に記載の集積半導体構造。
- 前記金属層(4.x)は、少なくともその大部分において、十分硬い金属からなることを特徴とする、請求項1〜13のいずれか一項に記載の集積半導体構造。
- 前記金属は、アルミニウム、銅、タングステン、モリブデン、銀、金、白金、あるいはそれらの合金を含むことを特徴とする、請求項14に記載の集積半導体構造。
- 前記パッド金属(3)の前記面(F)は、1つの金属層(4.x)内において少なくとも50%金属からなる領域を覆うことを特徴とする、請求項1〜15のいずれか一項に記載の集積半導体構造。
- 前記金属は、前記パッド金属(3)の前記面(F)の下方において、均一に分散されていることを特徴とする、請求項16に記載の集積半導体構造。
- 前記パッド金属(3)と前記最上位の金属層(4.x)との間に位置する、最上位の絶縁層(5.y)が提供され、ここで、該最上位の絶縁層(5.y)は第1の厚さ(D1)を有し、前記最上位の金属層(4.x)は第2の厚さ(D2)を有し、かつ該2つの厚さ(D1,D2)の比率は、1と5との間にあることを特徴とする、請求項1〜17のいずれか一項に記載の集積半導体構造。
- 前記パッド金属(3)と前記最上位の金属層(4.x)との間に位置する、最上位の絶縁層(5.y)が提供され、ここで、該最上位の絶縁層(5.y)は第1の厚さ(D1)を有し、前記パッド金属(3)はさらなる厚さ(D3)を有し、かつ該2つの厚さ(D1,D3)の比率は、0.5と3との間にあることを特徴とする、請求項1〜18のいずれか一項に記載の集積半導体構造。
- 前記金属層(4.x)の前記数xは、3と11との間にあることを特徴とする、請求項1〜19のいずれか一項に記載の集積半導体構造。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10229493A DE10229493B4 (de) | 2002-07-01 | 2002-07-01 | Integrierte Halbleiterstruktur |
PCT/DE2003/001955 WO2004004002A1 (de) | 2002-07-01 | 2003-06-12 | Unter ein pad integrierte halbleiterstruktur |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006502561A true JP2006502561A (ja) | 2006-01-19 |
JP4065876B2 JP4065876B2 (ja) | 2008-03-26 |
Family
ID=29796063
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004516476A Expired - Fee Related JP4065876B2 (ja) | 2002-07-01 | 2003-06-12 | パッド下の集積半導体構造 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7190077B2 (ja) |
EP (1) | EP1518272B1 (ja) |
JP (1) | JP4065876B2 (ja) |
CN (1) | CN100440497C (ja) |
DE (2) | DE10229493B4 (ja) |
TW (1) | TWI237890B (ja) |
WO (1) | WO2004004002A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8330190B2 (en) | 2009-03-06 | 2012-12-11 | Fujitsu Semiconductor Limited | Semiconductor device |
US9416953B2 (en) | 2011-04-21 | 2016-08-16 | Lg Innotek Co., Ltd. | LED lighting apparatus |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006108329A (ja) * | 2004-10-04 | 2006-04-20 | Fujitsu Ltd | 半導体装置 |
CN100413066C (zh) * | 2005-11-30 | 2008-08-20 | 中芯国际集成电路制造(上海)有限公司 | 低k介电材料的接合焊盘和用于制造半导体器件的方法 |
US20130154099A1 (en) * | 2011-12-16 | 2013-06-20 | Semiconductor Components Industries, Llc | Pad over interconnect pad structure design |
CN102571135B (zh) * | 2012-02-15 | 2014-05-14 | 京信通信***(中国)有限公司 | 射频半集成应用装置 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2598328B2 (ja) * | 1989-10-17 | 1997-04-09 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
EP0637840A1 (en) * | 1993-08-05 | 1995-02-08 | AT&T Corp. | Integrated circuit with active devices under bond pads |
KR100267105B1 (ko) * | 1997-12-09 | 2000-11-01 | 윤종용 | 다층패드를구비한반도체소자및그제조방법 |
US5986343A (en) * | 1998-05-04 | 1999-11-16 | Lucent Technologies Inc. | Bond pad design for integrated circuits |
US6232662B1 (en) * | 1998-07-14 | 2001-05-15 | Texas Instruments Incorporated | System and method for bonding over active integrated circuits |
US6087732A (en) * | 1998-09-28 | 2000-07-11 | Lucent Technologies, Inc. | Bond pad for a flip-chip package |
JP2000183104A (ja) * | 1998-12-15 | 2000-06-30 | Texas Instr Inc <Ti> | 集積回路上でボンディングするためのシステム及び方法 |
TW430935B (en) * | 1999-03-19 | 2001-04-21 | Ind Tech Res Inst | Frame type bonding pad structure having a low parasitic capacitance |
JP3727220B2 (ja) * | 2000-04-03 | 2005-12-14 | Necエレクトロニクス株式会社 | 半導体装置 |
US7201784B2 (en) * | 2003-06-30 | 2007-04-10 | Intel Corporation | Surfactant slurry additives to improve erosion, dishing, and defects during chemical mechanical polishing of copper damascene with low k dielectrics |
-
2002
- 2002-07-01 DE DE10229493A patent/DE10229493B4/de not_active Expired - Fee Related
-
2003
- 2003-05-23 TW TW092114098A patent/TWI237890B/zh not_active IP Right Cessation
- 2003-06-12 DE DE50311482T patent/DE50311482D1/de not_active Expired - Lifetime
- 2003-06-12 US US10/519,860 patent/US7190077B2/en not_active Expired - Lifetime
- 2003-06-12 EP EP03761414A patent/EP1518272B1/de not_active Expired - Fee Related
- 2003-06-12 CN CNB038157144A patent/CN100440497C/zh not_active Expired - Fee Related
- 2003-06-12 JP JP2004516476A patent/JP4065876B2/ja not_active Expired - Fee Related
- 2003-06-12 WO PCT/DE2003/001955 patent/WO2004004002A1/de active Application Filing
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8330190B2 (en) | 2009-03-06 | 2012-12-11 | Fujitsu Semiconductor Limited | Semiconductor device |
US9416953B2 (en) | 2011-04-21 | 2016-08-16 | Lg Innotek Co., Ltd. | LED lighting apparatus |
Also Published As
Publication number | Publication date |
---|---|
EP1518272A1 (de) | 2005-03-30 |
CN100440497C (zh) | 2008-12-03 |
CN1666336A (zh) | 2005-09-07 |
US20050242374A1 (en) | 2005-11-03 |
WO2004004002A1 (de) | 2004-01-08 |
TW200402863A (en) | 2004-02-16 |
US7190077B2 (en) | 2007-03-13 |
EP1518272B1 (de) | 2009-04-29 |
DE50311482D1 (ja) | 2009-06-10 |
DE10229493B4 (de) | 2007-03-29 |
JP4065876B2 (ja) | 2008-03-26 |
TWI237890B (en) | 2005-08-11 |
DE10229493A1 (de) | 2004-01-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4449824B2 (ja) | 半導体装置およびその実装構造 | |
US7629689B2 (en) | Semiconductor integrated circuit having connection pads over active elements | |
US6803302B2 (en) | Method for forming a semiconductor device having a mechanically robust pad interface | |
US6100589A (en) | Semiconductor device and a method for making the same that provide arrangement of a connecting region for an external connecting terminal | |
JP2916326B2 (ja) | 半導体装置のパッド構造 | |
JP2005520342A (ja) | ワイヤボンドパッドを有する半導体装置とその製作方法 | |
JP4938983B2 (ja) | 半導体集積回路 | |
US20110215481A1 (en) | Semiconductor device | |
US7226814B2 (en) | Semiconductor package device and method for fabricating the same | |
TW200405516A (en) | Semiconductor integrated circuit device | |
JP4065876B2 (ja) | パッド下の集積半導体構造 | |
JP2003318177A (ja) | 半導体集積回路装置 | |
JP4165460B2 (ja) | 半導体装置 | |
JP4350321B2 (ja) | 半導体素子のボンディングパッド構造体及びその製造方法 | |
US6762499B2 (en) | Semiconductor integrated device | |
JP2016152328A (ja) | 半導体装置およびその製造方法 | |
JP2007059867A (ja) | 半導体装置 | |
JP2006318989A (ja) | 半導体装置 | |
US20050263894A1 (en) | Semiconductor chip with metallization levels, and a method for fomation of interconnect structrures | |
JP2006179916A (ja) | パッシベーション層を有する半導体素子 | |
JP3666495B2 (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
JPH0476927A (ja) | 半導体集積回路 | |
JP4038691B2 (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
JP4038692B2 (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
JP4240226B2 (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070815 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070817 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20071116 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20071210 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20080107 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110111 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110111 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120111 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130111 Year of fee payment: 5 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |