JP2006324567A - 部品内蔵基板とその製造方法 - Google Patents
部品内蔵基板とその製造方法 Download PDFInfo
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- JP2006324567A JP2006324567A JP2005147864A JP2005147864A JP2006324567A JP 2006324567 A JP2006324567 A JP 2006324567A JP 2005147864 A JP2005147864 A JP 2005147864A JP 2005147864 A JP2005147864 A JP 2005147864A JP 2006324567 A JP2006324567 A JP 2006324567A
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- resin
- component
- circuit board
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- embedded
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49146—Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
【解決手段】電子部品105,106に対応した位置に前記電子部品105,106を覆うように形成された樹脂流動埋設部108aと、この樹脂流動埋設部108aを囲うとともに、回路基板101上面と平行に配設された基材109aと、少なくとも基材109aと前記回路基板101との間に設けられた接着樹脂110cとを有し、前記樹脂流動埋設部108aは前記接着樹脂110と同一の樹脂で充満されたものである。これにより、部品内蔵基板を圧着するときの加圧によって基材109aが樹脂110を圧縮し、樹脂110が回路基板101と平行な方向へ流れ易くなる。従って、樹脂110が樹脂流動埋設部108aに隙間なく充填されて、空気等が残ることはない。
【選択図】図1
Description
以下、本発明の実施の形態1について、図面を用いて説明する。図1は、本発明の実施の形態1における部品内蔵基板の断面図であり、図2は、同部品内蔵基板の製造方法のフローチャートであり、図3から図12は、本実施の形態1における部品内蔵基板の製造方法の各工程の詳細図である。なお、図1から図12において、従来と同じものは同じ番号とし、その説明は簡略化してある。
105 半導体素子
106 抵抗
108 部品内蔵層
108a 樹脂流動埋設部
109a 基材
110 樹脂
145 銅箔
Claims (10)
- 回路基板と、この回路基板の上面に装着された電子部品と、この電子部品を覆うとともに、前記回路基板の前記電子部品装着面側に設けられた部品内蔵層と、この部品内蔵層の上に設けられた導体パターンとを備え、前記回路基板と部品内蔵層と導体パターンとが圧着されて形成された部品内蔵基板において、前記部品内蔵層には、前記電子部品に対応した位置に前記電子部品を覆うように形成された樹脂流動埋設部と、この樹脂流動埋設部を囲うとともに、前記回路基板上面と平行に配設された樹脂流速加速体と、この樹脂流速加速体と前記回路基板との間に設けられた接着樹脂とを有し、前記樹脂流動埋設部は前記接着樹脂と同一の樹脂で充満された部品内蔵基板。
- 樹脂流速加速体は、板状とした請求項1に記載の部品内蔵基板。
- 樹脂部には複数の樹脂流速加速体が配設されるとともに、これらの樹脂流速加速体の間に樹脂層が形成された請求項2に記載の部品内蔵基板。
- 樹脂流速加速体には、織布あるいは不織布を用いた請求項1に記載の部品内蔵基板。
- 複数個の電子部品が埋設された部品内蔵基板の製造方法であって、前記部品内蔵基板の製造方法は、樹脂製のシートと樹脂流速加速体とに孔を加工する孔加工工程と、回路基板の上面に電子部品を装着する装着工程と、この後で前記孔が前記電子部品の外周を囲むように前記シートを積層する積層工程と、この積層工程の後で、前記シートと前記回路基板とを加熱圧着して一体化する一体化工程とを有し、前記積層工程では樹脂流速加速体を前記シートの上に積層するとともに、前記加熱圧着工程では、前記回路基板と前記シートと前記樹脂流速加速体との積層体を圧縮し、前記樹脂を前記孔側へ流動させて、前記樹脂を前記孔に充填する部品内蔵基板の製造方法。
- シートと樹脂流速加速体とは、予め一体となって形成された請求項5に記載の部品内蔵基板の製造方法。
- シートは、樹脂流速加速体の上側にも設けられた請求項5に記載の部品内蔵基板の製造方法。
- 積層工程では、樹脂流速加速体とシートとが複数枚交互に積層した請求項5に記載の部品内蔵基板の製造方法。
- 一体化工程では、樹脂流速加速体間に樹脂層を形成するように圧縮した請求項8に記載の部品内蔵基板の製造方法。
- 一体化工程では、回路基板と樹脂流速加速体間に樹脂層を形成するように圧縮した請求項5に記載の部品内蔵基板の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005147864A JP2006324567A (ja) | 2005-05-20 | 2005-05-20 | 部品内蔵基板とその製造方法 |
US11/434,763 US7694415B2 (en) | 2005-05-20 | 2006-05-17 | Method of manufacturing component-embedded printed wiring board |
CNB2006100809100A CN100525580C (zh) | 2005-05-20 | 2006-05-22 | 部件内置基板和部件内置基板的制造方法 |
US12/709,573 US20100147569A1 (en) | 2005-05-20 | 2010-02-22 | Component-embedded printed wiring board |
US12/709,575 US20100146779A1 (en) | 2005-05-20 | 2010-02-22 | Method of manufacturing component-embedded printed wiring board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005147864A JP2006324567A (ja) | 2005-05-20 | 2005-05-20 | 部品内蔵基板とその製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005260123A Division JP2006324621A (ja) | 2005-09-08 | 2005-09-08 | 部品内蔵基板とその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2006324567A true JP2006324567A (ja) | 2006-11-30 |
Family
ID=37426056
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005147864A Pending JP2006324567A (ja) | 2005-05-20 | 2005-05-20 | 部品内蔵基板とその製造方法 |
Country Status (3)
Country | Link |
---|---|
US (3) | US7694415B2 (ja) |
JP (1) | JP2006324567A (ja) |
CN (1) | CN100525580C (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020262965A1 (ko) * | 2019-06-24 | 2020-12-30 | 삼성전자 주식회사 | 플렉서블 디스플레이를 포함하는 전자 장치 |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102007024189A1 (de) * | 2007-05-24 | 2008-11-27 | Robert Bosch Gmbh | Verfahren zur Herstellung einer elektronischen Baugruppe |
US8246867B2 (en) * | 2009-10-16 | 2012-08-21 | Corning Incorporated | Method for assembling an optoelectronic device |
JP5586313B2 (ja) * | 2010-04-23 | 2014-09-10 | 京セラケミカル株式会社 | 接着剤層の形成方法、及び接着剤組成物 |
KR101713640B1 (ko) * | 2010-09-10 | 2017-03-08 | 메이코 일렉트로닉스 컴파니 리미티드 | 부품 내장 기판 |
CN102249723B (zh) * | 2011-05-06 | 2013-01-16 | 安徽华东光电技术研究所 | 一种复合材料的高效率钎焊方法 |
WO2012157426A1 (ja) * | 2011-05-13 | 2012-11-22 | イビデン株式会社 | 配線板及びその製造方法 |
US10784221B2 (en) * | 2011-12-06 | 2020-09-22 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of processing solder bump by vacuum annealing |
JP2013211519A (ja) | 2012-02-29 | 2013-10-10 | Ngk Spark Plug Co Ltd | 多層配線基板の製造方法 |
JP6649770B2 (ja) * | 2014-02-21 | 2020-02-19 | 三井金属鉱業株式会社 | 内蔵キャパシタ層形成用銅張積層板、多層プリント配線板及び多層プリント配線板の製造方法 |
DE102014109779A1 (de) * | 2014-06-13 | 2015-12-17 | Osram Opto Semiconductors Gmbh | Verfahren zum Herstellen einer Anordnung mit einem Bauteil |
KR102139755B1 (ko) * | 2015-01-22 | 2020-07-31 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
WO2016194434A1 (ja) * | 2015-05-29 | 2016-12-08 | 株式会社村田製作所 | 接合用部材および接合方法 |
TWI782939B (zh) * | 2016-12-29 | 2022-11-11 | 美商英帆薩斯邦德科技有限公司 | 具有整合式被動構件的接合結構 |
US11901281B2 (en) | 2019-03-11 | 2024-02-13 | Adeia Semiconductor Bonding Technologies Inc. | Bonded structures with integrated passive component |
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JP2002093957A (ja) * | 2000-09-11 | 2002-03-29 | Sony Corp | 電子回路装置およびその製造方法 |
JP2002270712A (ja) * | 2001-03-14 | 2002-09-20 | Sony Corp | 半導体素子内蔵多層配線基板と半導体素子内蔵装置、およびそれらの製造方法 |
JP2003174141A (ja) * | 2001-09-27 | 2003-06-20 | Dt Circuit Technology Co Ltd | 半導体装置及びその製造方法 |
JP2004087957A (ja) * | 2002-08-28 | 2004-03-18 | Fujitsu Ltd | 部品内蔵プリント配線板、およびその部品内蔵プリント配線板の製造方法 |
JP2004311736A (ja) * | 2003-04-08 | 2004-11-04 | Nec Toppan Circuit Solutions Inc | チップ部品内蔵ビルドアップ多層配線板の製造方法 |
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TW569424B (en) * | 2000-03-17 | 2004-01-01 | Matsushita Electric Ind Co Ltd | Module with embedded electric elements and the manufacturing method thereof |
KR100488412B1 (ko) * | 2001-06-13 | 2005-05-11 | 가부시키가이샤 덴소 | 내장된 전기소자를 갖는 인쇄 배선 기판 및 그 제조 방법 |
JP3867593B2 (ja) | 2001-06-13 | 2007-01-10 | 株式会社デンソー | プリント基板の製造方法およびその製造方法によって形成されるプリント基板 |
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2005
- 2005-05-20 JP JP2005147864A patent/JP2006324567A/ja active Pending
-
2006
- 2006-05-17 US US11/434,763 patent/US7694415B2/en not_active Expired - Fee Related
- 2006-05-22 CN CNB2006100809100A patent/CN100525580C/zh not_active Expired - Fee Related
-
2010
- 2010-02-22 US US12/709,573 patent/US20100147569A1/en not_active Abandoned
- 2010-02-22 US US12/709,575 patent/US20100146779A1/en not_active Abandoned
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2002093957A (ja) * | 2000-09-11 | 2002-03-29 | Sony Corp | 電子回路装置およびその製造方法 |
JP2002270712A (ja) * | 2001-03-14 | 2002-09-20 | Sony Corp | 半導体素子内蔵多層配線基板と半導体素子内蔵装置、およびそれらの製造方法 |
JP2003174141A (ja) * | 2001-09-27 | 2003-06-20 | Dt Circuit Technology Co Ltd | 半導体装置及びその製造方法 |
JP2004087957A (ja) * | 2002-08-28 | 2004-03-18 | Fujitsu Ltd | 部品内蔵プリント配線板、およびその部品内蔵プリント配線板の製造方法 |
JP2004311736A (ja) * | 2003-04-08 | 2004-11-04 | Nec Toppan Circuit Solutions Inc | チップ部品内蔵ビルドアップ多層配線板の製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2020262965A1 (ko) * | 2019-06-24 | 2020-12-30 | 삼성전자 주식회사 | 플렉서블 디스플레이를 포함하는 전자 장치 |
US11997225B2 (en) | 2019-06-24 | 2024-05-28 | Samsung Electronics Co., Ltd. | Electronic device comprising flexible display |
Also Published As
Publication number | Publication date |
---|---|
CN1867224A (zh) | 2006-11-22 |
US20100146779A1 (en) | 2010-06-17 |
US20060260122A1 (en) | 2006-11-23 |
CN100525580C (zh) | 2009-08-05 |
US7694415B2 (en) | 2010-04-13 |
US20100147569A1 (en) | 2010-06-17 |
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