JP2006237499A - Susceptor - Google Patents

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JP2006237499A
JP2006237499A JP2005053486A JP2005053486A JP2006237499A JP 2006237499 A JP2006237499 A JP 2006237499A JP 2005053486 A JP2005053486 A JP 2005053486A JP 2005053486 A JP2005053486 A JP 2005053486A JP 2006237499 A JP2006237499 A JP 2006237499A
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susceptor
nitride
counterbore
sic
gallium
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JP4739777B2 (en
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Akira Nogami
暁 野上
Kiyohide Sasaki
清秀 佐々木
Kazuto Mita
一登 三田
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Toyo Tanso Co Ltd
Furukawa Co Ltd
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Toyo Tanso Co Ltd
Furukawa Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a susceptor for epitaxial growth of an alminum nitride gallium, a gallium nitride indium, and an alminum nitride, which lowers the number of vapor etchings by reducing the growth rate of a deposited film on the susceptor by providing an appropriate surface roughness on the susceptor. <P>SOLUTION: The susceptor comprising a CVD-SiC-coated graphite base material having at least one counterbore is used for at least one kind of epitaxial growth selected from a gallium nitride, an aluminum nitride gallium, a gallium nitride indium, and an aluminum nitride. An arithmetic average roughness Ra of the surface other than the counterbore surface is 0.1 to 1 μm. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、半導体製造に用いるサセプタに関し、特に、窒化ガリウム(GaN)、窒化アルニミウムガリウム(AlGaN)、窒化インジウムガリウム(InGaN)、窒化アルミニウム(AlN)を気相成長させる際に用いるサセプタに関するものである。   The present invention relates to a susceptor used for semiconductor manufacturing, and more particularly to a susceptor used for vapor phase growth of gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum nitride (AlN). It is.

表面粗さRmax(最大高さRy)が0.5μm以下であるサセプタが、例えば、下記特許文献1に開示されている。この特許文献1のものは、黒鉛基材からなる円板状のサセプタ本体の片面に半導体ウエーハを収容する円形の多数のウエーハ収容凹部を設けてなる気相成長用縦型サセプタにおいて、前記ウエーハ収容凹部以外のサセプタ本体の片面の表面粗さをRmax0.5μm以下としたことを特徴とする気相成長用縦型サセプタである。
特開平10−195660号公報
For example, Patent Document 1 below discloses a susceptor having a surface roughness Rmax (maximum height Ry) of 0.5 μm or less. This patent document 1 discloses a vertical susceptor for vapor phase growth in which a large number of circular wafer housing recesses for housing a semiconductor wafer are provided on one side of a disc-shaped susceptor body made of a graphite substrate. A vertical susceptor for vapor phase growth characterized in that the surface roughness of one side of the susceptor body other than the recesses is set to Rmax 0.5 μm or less.
JP-A-10-195660

特許文献1のような従来の気相成長用サセプタに半導体ウェハをセットして、エピタキシャル成長を行うと、半導体ウェハだけでなく、半導体ウェハの載置部分以外のサセプタ表面にも堆積した膜(以下、堆積膜とする)が形成される。その後、半導体ウェハを取り替えて、新たにエピタキシャル成長を行うという作業を繰り返すと、半導体ウェハの載置部分以外のサセプタ表面には、さらに膜が堆積形成され、結晶欠陥、パーティクルを発生させてしまう。したがって、定期的な気相エッチングにより、サセプタ表面上の堆積した膜を除去する作業が必要であった。   When a semiconductor wafer is set on a conventional vapor phase susceptor such as Patent Document 1 and epitaxial growth is performed, not only the semiconductor wafer but also a film deposited on the surface of the susceptor other than the mounting portion of the semiconductor wafer (hereinafter, referred to as a semiconductor wafer) A deposited film) is formed. Thereafter, when the operation of replacing the semiconductor wafer and newly performing epitaxial growth is repeated, a film is further deposited on the surface of the susceptor other than the mounting portion of the semiconductor wafer, and crystal defects and particles are generated. Therefore, it is necessary to remove the deposited film on the susceptor surface by periodic vapor-phase etching.

そこで、本発明の目的は、サセプタ上の表面粗さを適正化することにより、サセプタ上の堆積膜の成長速度を減少させ、気相エッチング回数を低減させ得るサセプタを提供することである。   Accordingly, an object of the present invention is to provide a susceptor capable of reducing the growth rate of a deposited film on a susceptor and reducing the number of times of vapor phase etching by optimizing the surface roughness on the susceptor.

本発明のサセプタは、少なくとも1つのザグリを有するCVD−SiC被覆黒鉛基材からなり、窒化ガリウム、窒化アルミニウムガリウム、窒化ガリウムインジウム、窒化アルミニウムの内から選ばれる少なくとも1種以上のエピタキシャル成長に使用されるサセプタであって、ザグリ面以外の表面におけるJIS B 0601に基づく算術平均粗さ(高さ)Raが0.1〜1μmのサセプタである。なお、ザグリ面以外の表面の算術平均粗さRaは、0.1〜0.5μmであることがさらに好ましい。ここで、「ザグリ面以外の表面」とは、上記引用文献1に開示される「ウエーハ収容凹部以外のサセプタ本体の片面」と同様のものである。   The susceptor of the present invention comprises a CVD-SiC-coated graphite substrate having at least one counterbore, and is used for at least one epitaxial growth selected from gallium nitride, aluminum gallium nitride, gallium indium nitride, and aluminum nitride. A susceptor having an arithmetic average roughness (height) Ra of 0.1 to 1 μm based on JIS B 0601 on a surface other than the counterbore surface. The arithmetic average roughness Ra of the surface other than the counterbore surface is more preferably 0.1 to 0.5 μm. Here, the “surface other than the counterbore surface” is the same as “one side of the susceptor body other than the wafer housing recess” disclosed in the above cited reference 1.

なお、上述の最大高さRy(表面粗さRmax)とは、粗さ曲線から、その平均線の方向に標準長さlだけ抜き取り、この抜き取り部分の平均線から最も高い山頂までの高さYpと最も低い谷底までの深さYvとの和のことである。一箇所でも際立って高い山や深い谷があると、大きな値になってしまい測定値のバラツキが大きくなる特徴がある。
また、算術平均粗さRaとは、粗さ曲線から、その平均線の方向に標準長さlだけ抜き取り、この抜き取り部分の平均線から測定曲線までの偏差の絶対値を合計し、平均した値のことである。一つの傷が測定値に及ぼす影響が非常に小さくなり、安定した結果が得られる特徴がある。
また、本願は、ウエハ収容凹部以外の全表面にわたって平均的に滑らかで、堆積膜の付着量を少なくするサセプタを提供することが最大の目的であり、表面の一部に大きな傷があったとしても、堆積膜の付着量に大きな影響を与えることがないサセプタを提供することをも目的としている。
以上の事項から、本願の目的とするサセプタの評価には、算術平均粗さRaでなければならないと判断する。
The above-mentioned maximum height Ry (surface roughness Rmax) is the height Yp from the average line of the extracted portion to the highest peak, extracted from the roughness curve by the standard length l in the direction of the average line. And the depth Yv to the lowest valley bottom. If there is a conspicuously high mountain or deep valley even in one place, it becomes a large value and there is a feature that the variation of the measured value becomes large.
In addition, the arithmetic average roughness Ra is a value obtained by extracting the standard length l from the roughness curve in the direction of the average line, and summing and averaging the absolute values of deviations from the average line of the extracted portion to the measurement curve. That is. There is a feature that the influence of one scratch on the measured value becomes very small and a stable result can be obtained.
In addition, the main purpose of the present application is to provide a susceptor that is smooth on average over the entire surface other than the wafer-accommodating recess and reduces the amount of deposited film deposited. Another object of the present invention is to provide a susceptor that does not greatly affect the adhesion amount of the deposited film.
From the above matters, it is determined that the arithmetic average roughness Ra must be used for the evaluation of the susceptor targeted by the present application.

本発明によれば、サセプタ上の堆積膜の成長速度を減少させ、結晶欠陥、パーティクルの発生を堆積膜の一定膜厚まで抑制することができるので、気相エッチング回数を低減できる。   According to the present invention, the growth rate of the deposited film on the susceptor can be reduced, and generation of crystal defects and particles can be suppressed to a certain thickness of the deposited film, so that the number of vapor phase etchings can be reduced.

本発明の実施形態に係るサセプタは、CVD−SiC被覆黒鉛からなる窒化ガリウム、窒化アルミニウムガリウム、窒化ガリウムインジウム、窒化アルミニウムの内から選ばれる少なくとも1種以上のエピタキシャル成長に使用されるサセプタであって、ザグリ面以外の表面の算術平均粗さRaが0.1〜1μmのものである。本サセプタは、少なくとも1つのザグリを有すればよく、枚葉式、バレル式、パンケーキ式、いずれの型のものでもよい。   A susceptor according to an embodiment of the present invention is a susceptor used for epitaxial growth of at least one selected from gallium nitride, aluminum gallium nitride, gallium indium nitride, and aluminum nitride made of CVD-SiC-coated graphite, The arithmetic average roughness Ra of the surface other than the counterbore surface is 0.1 to 1 μm. The susceptor only needs to have at least one counterbore, and may be of a single wafer type, a barrel type, or a pancake type.

CVD法において、ガスの種類の選択や温度等の調整を行うことで、ザグリ面以外の表面の算術平均粗さRaが0.1〜1μmのサセプタを容易に製造することができる。   In the CVD method, a susceptor having an arithmetic average roughness Ra of 0.1 to 1 μm on the surface other than the counterbore can be easily manufactured by selecting the type of gas and adjusting the temperature.

また、CVD法でSiC膜を炭素基材表面に形成した後、SiC膜表面を研磨して、ザグリ面以外の表面の算術平均粗さRaが0.1〜1μmとなるように調整してもよい。この研磨方法としては、例えば、Ra1〜5μmのCVD−SiC膜を被覆した治具によって行うSiC共材研磨が挙げられる。また、他の方法として、研磨剤を用いて、乾式又は湿式研磨を行ってもよい。このとき、Ra0.1〜1μmを実現するために、#350以上、好ましくは#600以上のSiC若しくはダイヤモンドの研磨剤を使用する。また、砥石で直接研磨することとしてもよい。
算術平均粗さRa0.1μm以下のSiC膜の表面でも本発明と同様な効果が得られるが、研磨コストが高くさらに生産性も低いので、ザグリ面以外の表面の算術平均粗さRaは0.1〜1μmとすることが好ましく、0.1〜0.5μmとすることがさらに好ましい。
In addition, after forming the SiC film on the carbon substrate surface by the CVD method, the SiC film surface is polished and adjusted so that the arithmetic average roughness Ra of the surface other than the counterbore surface is 0.1 to 1 μm. Good. As this polishing method, for example, SiC co-material polishing performed with a jig coated with a CVD-SiC film of Ra 1 to 5 μm can be mentioned. As another method, dry or wet polishing may be performed using an abrasive. At this time, in order to realize Ra 0.1 to 1 μm, a SiC or diamond abrasive of # 350 or more, preferably # 600 or more is used. Moreover, it is good also as grind | polishing directly with a grindstone.
The same effect as that of the present invention can be obtained even on the surface of an SiC film having an arithmetic average roughness Ra of 0.1 μm or less, but since the polishing cost is high and the productivity is low, the arithmetic average roughness Ra of the surface other than the counterbore surface is 0. The thickness is preferably 1 to 1 μm, and more preferably 0.1 to 0.5 μm.

本実施形態によれば、容易に製造でき、かつ、コストを抑制し、さらに堆積膜の膜厚を一定以上厚くできるサセプタを提供できる。また、本実施形態に係るサセプタは、パーティクルの発生を堆積膜の一定膜厚まで抑制することができるので、エッチング回数を低減できるものである。   According to the present embodiment, it is possible to provide a susceptor that can be easily manufactured, that can reduce costs, and that can further increase the thickness of the deposited film. Moreover, since the susceptor according to the present embodiment can suppress the generation of particles to a certain thickness of the deposited film, the number of etchings can be reduced.

(実施例1)
CVD装置内において、1250℃、SiCl4/C38/H2ガスを用い、黒鉛基材に100μmのSiC被覆を行った。サセプタの算術平均粗さRaは0.8μm(Ry6μm)であった。このサセプタ上に窒化ガリウム(GaN)を堆積させたところ、GaN膜の厚さが1150μmになったところでパーティクルが発生した。
Example 1
In a CVD apparatus, a SiC substrate of 100 μm was coated on a graphite substrate using SiCl 4 / C 3 H 8 / H 2 gas at 1250 ° C. The arithmetic average roughness Ra of the susceptor was 0.8 μm (Ry6 μm). When gallium nitride (GaN) was deposited on the susceptor, particles were generated when the thickness of the GaN film reached 1150 μm.

(実施例2)
CVD装置内において、1400℃、SiCl4/C38/H2ガスを用い、黒鉛基材に100μmのSiC被覆を行った。SiC製砥石と純水とを用いて、ザグリ以外の面を約10μm湿式研磨し、サセプタの算術平均粗さRaを0.3μm(Ry2.5μm)に調整した。このサセプタ上にGaNを堆積させたところ、GaN膜の厚さが1200μmになったところでパーティクルが発生した。
(Example 2)
In a CVD apparatus, a SiC substrate of 100 μm was coated on a graphite substrate using SiCl 4 / C 3 H 8 / H 2 gas at 1400 ° C. A surface other than the counterbore was wet-polished by about 10 μm using a SiC grindstone and pure water, and the arithmetic average roughness Ra of the susceptor was adjusted to 0.3 μm (Ry 2.5 μm). When GaN was deposited on this susceptor, particles were generated when the thickness of the GaN film reached 1200 μm.

(比較例1)
CVD装置内において、1400℃、SiCl4/C38/H2ガスを用い、黒鉛基材に100μmのSiC被覆を行った。サセプタの算術平均粗さRaは5μm(Ry27μm)であった。このサセプタ上にGaNを堆積させたところ、GaN膜の厚さが300μmになったところでパーティクルが発生した。
(Comparative Example 1)
In a CVD apparatus, a SiC substrate of 100 μm was coated on a graphite substrate using SiCl 4 / C 3 H 8 / H 2 gas at 1400 ° C. The arithmetic average roughness Ra of the susceptor was 5 μm (Ry 27 μm). When GaN was deposited on this susceptor, particles were generated when the thickness of the GaN film reached 300 μm.

(比較例2)
CVD装置内において、1400℃、SiCl4/C38/H2ガスを用い、黒鉛基材に100μmのSiC被覆を行った。ザグリ以外の面を約3μm乾式研磨し、サセプタの算術平均粗さRaを2μm(Ry11μm)に調整した。このサセプタ上にGaNを堆積させたところ、GaN膜の厚さが500μmになったところでパーティクルが発生した。
(Comparative Example 2)
In a CVD apparatus, a SiC substrate of 100 μm was coated on a graphite substrate using SiCl 4 / C 3 H 8 / H 2 gas at 1400 ° C. The surface other than the counterbore was dry-polished by about 3 μm, and the arithmetic average roughness Ra of the susceptor was adjusted to 2 μm (Ry11 μm). When GaN was deposited on this susceptor, particles were generated when the thickness of the GaN film reached 500 μm.

(比較例3)
CVD装置内において、1400℃、SiCl4/C38/H2ガスを用い、黒鉛基材に100μmのSiC被覆を行った。回転式研磨装置を用いて、ダイヤモンド砥粒と純水を用いてザグリ面以外の面を約20μm湿式研磨し、サセプタの算術平均粗さRaを0.05μm(Ry0.8μm)に調整した。このサセプタ上にGaNを堆積させたところ、GaN膜の厚さが1230μmになったところでパーティクルが発生した。
(Comparative Example 3)
In a CVD apparatus, a SiC substrate of 100 μm was coated on a graphite substrate using SiCl 4 / C 3 H 8 / H 2 gas at 1400 ° C. Using a rotary polishing apparatus, a surface other than the counterbore surface was wet-polished using diamond abrasive grains and pure water by about 20 μm, and the arithmetic average roughness Ra of the susceptor was adjusted to 0.05 μm (Ry 0.8 μm). When GaN was deposited on the susceptor, particles were generated when the thickness of the GaN film reached 1230 μm.

これらの結果をまとめて図1のグラフに示す。実施例1では、GaN膜が1150μmに達するまで,実施例2ではGaN膜が1200μmに達するまでパーティクルが発生しなかったのに対し、比較例1では300μm,比較例2では500μmになったところでパーティクルが発生した。これらの結果により、本発明に係る実施例1、2によれば、比較例1、2に比べ、パーティクルの発生をGaN膜の一定膜厚まで抑制することができるので、エッチング回数を低減できるサセプタを容易に製造することができることがわかる。また、比較例3では,GaN膜が1230μmに達するまでパーティクルの発生はなかったが、回転式研磨装置を用いなければならず研磨コストが高額になった。さらに,複雑な形状のサセプタには応用できないデメリットもあることがわかった。   These results are summarized in the graph of FIG. In Example 1, particles were not generated until the GaN film reached 1150 μm and in Example 2 until the GaN film reached 1200 μm, whereas in Comparative Example 1 the particles reached 300 μm and in Comparative Example 2 reached 500 μm. There has occurred. From these results, according to Examples 1 and 2 according to the present invention, generation of particles can be suppressed to a certain thickness of the GaN film as compared with Comparative Examples 1 and 2, and thus the susceptor capable of reducing the number of etchings. It can be seen that can be easily manufactured. In Comparative Example 3, particles were not generated until the GaN film reached 1230 μm. However, a rotary polishing apparatus had to be used, and the polishing cost was high. Furthermore, it was found that there are some disadvantages that cannot be applied to complex shaped susceptors.

図2に本発明にかかる実施例及び比較例のサセプタのザグリ以外の表面の算術平均粗さRaと最大高さRyの関係を示す。最大高さRy(表面粗さRmax)を0.5μm以下にするためには,算術平均粗さRaを少なくとも0.03μm以下にする必要があることが分かる。   FIG. 2 shows the relationship between the arithmetic average roughness Ra and the maximum height Ry of the surface of the susceptor other than the counterbore in the examples and comparative examples according to the present invention. It can be seen that in order to make the maximum height Ry (surface roughness Rmax) 0.5 μm or less, the arithmetic average roughness Ra needs to be at least 0.03 μm or less.

なお、本発明は、特許請求の範囲を逸脱しない範囲で設計変更できるものであり、上記実施形態や実施例に限定されるものではない。   The present invention can be changed in design without departing from the scope of the claims, and is not limited to the above-described embodiments and examples.

本発明にかかる実施例及び比較例のSiC算術表面粗さRaとパーティクル発生時のEPI−GaN膜厚との関係を示すグラフ。The graph which shows the relationship between the SiC arithmetic surface roughness Ra of the Example concerning this invention, and the EPI-GaN film thickness at the time of particle generation. 本発明にかかわる実施例及び比較例のSiC算術表面粗さRaとSiC最大高さRyの関係を示すグラフ。The graph which shows the relationship between the SiC arithmetic surface roughness Ra of the Example and comparative example which concern on this invention, and SiC maximum height Ry.

Claims (1)

少なくとも1つのザグリを有するCVD−SiC被覆黒鉛基材からなり、窒化ガリウム、窒化アルミニウムガリウム、窒化ガリウムインジウム、窒化アルミニウムの内から選ばれる少なくとも1種以上のエピタキシャル成長に使用されるサセプタであって、ザグリ面以外の表面におけるJIS B 0601に基づく算術平均粗さRaが0.1〜1μmのサセプタ。


A susceptor comprising a CVD-SiC-coated graphite substrate having at least one counterbore and used for at least one epitaxial growth selected from gallium nitride, aluminum gallium nitride, gallium indium nitride, and aluminum nitride, A susceptor having an arithmetic average roughness Ra of 0.1 to 1 μm based on JIS B 0601 on a surface other than a surface.


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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021180295A (en) * 2020-05-15 2021-11-18 株式会社豊田中央研究所 Susceptor, manufacturing method of nitride semiconductor device, and nitride semiconductor device

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JPH10195660A (en) * 1997-01-06 1998-07-28 Tokuyama Toshiba Ceramics Kk Vertical type susceptor for vapor growth
JP2002043397A (en) * 2000-07-26 2002-02-08 Hitachi Chem Co Ltd Susceptor
JP2002047570A (en) * 2000-05-22 2002-02-15 Toyo Tanso Kk CVD-SiC EXCELLENT IN NH3 RESISTANCE, CVD-SiC COATED MATERIAL EXCELLENT IN NH3 RESISTANCE, AND TOOL FOR CVD OR MBE SYSTEM
JP2005311290A (en) * 2004-03-23 2005-11-04 Toshiba Ceramics Co Ltd Susceptor

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Publication number Priority date Publication date Assignee Title
JPH10195660A (en) * 1997-01-06 1998-07-28 Tokuyama Toshiba Ceramics Kk Vertical type susceptor for vapor growth
JP2002047570A (en) * 2000-05-22 2002-02-15 Toyo Tanso Kk CVD-SiC EXCELLENT IN NH3 RESISTANCE, CVD-SiC COATED MATERIAL EXCELLENT IN NH3 RESISTANCE, AND TOOL FOR CVD OR MBE SYSTEM
JP2002043397A (en) * 2000-07-26 2002-02-08 Hitachi Chem Co Ltd Susceptor
JP2005311290A (en) * 2004-03-23 2005-11-04 Toshiba Ceramics Co Ltd Susceptor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021180295A (en) * 2020-05-15 2021-11-18 株式会社豊田中央研究所 Susceptor, manufacturing method of nitride semiconductor device, and nitride semiconductor device
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