JP2004087927A - Ceramic substrate - Google Patents

Ceramic substrate Download PDF

Info

Publication number
JP2004087927A
JP2004087927A JP2002248711A JP2002248711A JP2004087927A JP 2004087927 A JP2004087927 A JP 2004087927A JP 2002248711 A JP2002248711 A JP 2002248711A JP 2002248711 A JP2002248711 A JP 2002248711A JP 2004087927 A JP2004087927 A JP 2004087927A
Authority
JP
Japan
Prior art keywords
circuit board
ceramic
metal
ceramic substrate
insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002248711A
Other languages
Japanese (ja)
Inventor
Takayuki Miyao
宮尾 貴幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2002248711A priority Critical patent/JP2004087927A/en
Publication of JP2004087927A publication Critical patent/JP2004087927A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Abstract

<P>PROBLEM TO BE SOLVED: To provide a ceramic substrate, wherein heat from a semiconductor element is dissipated effectively, warpage is restrained and miniaturization is enabled, and a semiconductor module using the ceramic circuit substrate. <P>SOLUTION: In the ceramic substrate 1, a plurality of metal circuit boards 3 are fixed on an upper surface of the ceramic substrate 2, and a metal plate 5 is fixed to the lower surface of the substrate 2. Outer periphery of each metal circuit board 3 is surrounded by insulator 4, whose coefficient of thermal expansion is equal to or higher than that of the ceramic substrate 2. Parts between the metal circuit boards 3 are filed with the insulator 4. The heat generated from the semiconductor element 7 can spread in the transverse direction via the insulator 4 existing on the outer periphery of each metal circuit board 3 or between the boards 3, so that efficient dissipation of the heat from the semiconductor element 7 is enabled. The coefficient of thermal expansion of the insulator 4 is equal to or higher than that of the ceramic substrate 2, and the stiffness of the ceramic substrate 1 is increased, so as to give the effect to restrain warpage of the ceramic substrate 2. <P>COPYRIGHT: (C)2004,JPO

Description

【0001】
【発明の属する技術分野】
本発明は、セラミック基板に金属回路板を取着して成るセラミック回路基板に関するものである。
【0002】
【従来の技術】
近年、パワーモジュール用基板やスイッチングモジュール用基板等の回路基板として、セラミック基板上に活性金属ロウ材を介して銅等から成る金属回路板を直接接合して取着させたセラミック回路基板が用いられている。
【0003】
図3に従来のセラミック回路基板を用いた半導体モジュールの例を断面図で、図4に平面図でそれぞれ示す。これらの図において、11はセラミック回路基板を示し、このセラミック回路基板11は、セラミック基板12と、その上面に取着された複数の金属回路板13と、セラミック基板12の下面に取着された金属板15とから構成されている。そして、このようなセラミック回路基板11は、金属回路板13上に半導体素子17等の電子部品が搭載され、金属板15との間に半田16を介在させて放熱部材18上に実装されることにより、半導体モジュールとして使用される。
【0004】
このようなセラミック回路基板11は、酸化アルミニウム質焼結体から成るセラミック基板12を用いる場合には、具体的には以下の方法によって製作される。
【0005】
まず、銀−銅合金にチタン・ジルコニウム・ハフニウムおよびこれらの水素化物の少なくとも1種を添加した活性金属粉末に有機溶剤・溶媒を添加混合してロウ材ペーストを調製する。
【0006】
次に、酸化アルミニウム・酸化珪素・酸化マグネシウム・酸化カルシウム等の原料粉末に適当な有機バインダ・可塑剤・溶剤等を添加混合して泥漿状と成すとともにこれから従来周知のドクターブレード法やカレンダーロール法等のテープ成形技術を採用して複数のセラミックグリーンシートを得た後、所定寸法に形成し、次に、セラミックグリーンシートを必要に応じて上下に積層するとともに還元雰囲気中にて約1600℃の温度で焼成し、セラミックグリーンシートを焼結一体化させて酸化アルミニウム質焼結体から成るセラミック基板12を形成する。
【0007】
次に、セラミック基板12上にロウ材ペーストを間に挟んで銅等から成る複数の金属回路板13を載置し、一方、これに対向するセラミック基板12の下面には同様にロウ材ペーストを間に挟んで銅等から成る金属板15を配置する。
【0008】
また、セラミック基板12と金属回路板13との間およびセラミック基板12と金属板15との間に配されているロウ材ペーストを非酸化性雰囲気中にて約900℃の温度に加熱して溶融させ、このロウ材でセラミック基板12と金属回路板13とを、およびセラミック基板12と金属板15とを接合することによって製作される。
【0009】
このようにして製作されたセラミック回路基板11は、IGBT(Insulated Gate Bipolar Transistor)やMOS−FET(Metal Oxide Semiconductor − Field Effect Transistor)等の半導体素子17等の電子部品を半田16等の接着剤を介して接合した後、例えば、アルミニウム等の放熱部材18に半田16で接合されることにより、半導体素子17の動作時の発熱を良好に放熱させる半導体モジュールとなる。
【0010】
【発明が解決しようとする課題】
しかし、上記従来の半導体モジュールでは、半導体素子17の動作時の発熱を良好に放熱させるために、半導体素子17が搭載される複数の金属回路板13の面積は、熱が横方向に拡散するように大きくする必要があった。そのため、半導体モジュールの小型化が困難であるという問題点があった。
【0011】
また、複数の金属回路板13と一面ベタ形状の金属板15は接合面積が異なるため、セラミック基板12と金属回路板13との接合部およびセラミック基板12と金属板15との接合部に生じる熱応力は、セラミック回路基板11のサイズが大きいほど接合面積の違いにより不均衡になりやすい。その結果、セラミック回路基板11は、金属回路板13が上になるような凸方向の反りが生じる。この凸方向の反りが大きくなると、放熱部材18上に半田16を用いて実装する際に気泡を巻き込むこととなり、半田16中の気泡は半導体素子17からの熱を遮るため、半導体モジュールの熱抵抗を増大させるという問題点があった。
【0012】
本発明は以上のような従来の技術の問題点に鑑み完成されたもので、その目的は、半導体素子からの熱を有効に放散し、かつ反りを抑制し小型化できるセラミック回路基板を提供することにある。
【0013】
【課題を解決するための手段】
本発明のセラミック回路基板は、セラミック基板の上面に複数の金属回路板を、下面に金属板を取着して成るセラミック回路基板であって、前記金属回路板の各々の外周が熱膨張係数が前記セラミック基板と同等以上の絶縁体で囲まれているとともに、前記金属回路板の間が前記絶縁体で埋められていることを特徴とするものである。
【0014】
本発明のセラミック回路基板によれば、セラミック基板の上面に取着された複数の金属回路板の各々の外周が熱膨張係数がセラミック基板と同等以上の絶縁体で囲まれているとともに、金属回路板の間がその絶縁体で埋められていることから、半導体素子が金属回路板の端に搭載された場合においても、半導体素子からの熱が金属回路板の各々の外周、あるいは金属回路板の間にある絶縁体を経由して横方向に拡散することが可能となることにより、セラミック回路基板の熱抵抗が小さくなる。その結果、半導体素子の温度が上昇し、熱破壊することを効果的に抑制することが可能となる。
【0015】
また、半導体素子が搭載される複数の金属回路板の面積は、絶縁体を経由して横方向に熱が拡散することが可能となることにより、それぞれ小さくすることができ、セラミック回路基板の小型化を図ることができる。その結果、セラミック回路基板の反りを効果的に抑制することが可能となる。
【0016】
また、金属回路板の各々の外周が熱膨張係数がセラミック基板と同等以上の絶縁体で囲まれているとともに、金属回路板の間が絶縁体で埋められていることから、金属回路間板間のセラミック基板が絶縁体で埋められた分セラミック基板の板厚みが厚くなることとなり機械的強度が増すこととなるので、絶縁体がない場合と比較してセラミック基板と金属板との接合時に生じる熱応力を緩和することが可能となる。さらには、複数の金属回路板により構成される回路間の隙間が一体化されるため、セラミック回路基板の剛性が高まり、それによりセラミック回路基板の反りを効果的に抑制することが可能となる。その結果、金属板と放熱部材間の半田中に生じる気泡が閉じ込められることを効果的に抑制することが可能となることにより、半導体素子からの熱を効率よく放散させることが可能となり、放熱性を改善したセラミック回路基板を提供することができる。
【0017】
従って、本発明のセラミック回路基板によれば、セラミック回路基板の反りを効果的に抑制することが可能となるためセラミック回路基板を損傷することがなく、放熱特性が良好であり、半導体素子等の電子部品の実装密度を高めることが可能となり、搭載された半導体素子を長期にわたり安定して作動させることが可能なセラミック回路基板を得ることができる。
【0018】
【発明の実施の形態】
次に、本発明のセラミック回路基板を添付図面に基づき詳細に説明する。
【0019】
図1は本発明のセラミック回路基板およびそれを用いた半導体モジュールについて実施の形態の一例を示す断面図であり、図2はその平面図である。これらの図において、1はセラミック回路基板、2はセラミック基板、3は金属回路板、4は絶縁体、5は金属板、6は半田、7は電子部品としての半導体素子、8は放熱部材である。
【0020】
セラミック基板2は、金属回路板3および金属板5を支持する支持部材として機能し、酸化アルミニウム(Al)質焼結体・ムライト(3Al・2SiO)質焼結体・炭化珪素(SiC)質焼結体・窒化アルミニウム(AlN)質焼結体・窒化珪素(Si)質焼結体等のセラミック材料で形成されている。
【0021】
セラミック基板2は、例えば、窒化珪素質焼結体で形成されている場合であれば、まず窒化珪素粉末に希土類酸化物粉末や酸化アルミニウム粉末等の焼結助剤を添加・混合して窒化珪素焼結体原料粉末を調整する。次いで、窒化珪素焼結体原料粉末に有機バインダおよび分散媒を添加・混合してペースト化し、このペーストをドクターブレード法やカレンダーロール法等の通常の成形法でシート状に成形して窒化珪素グリーンシートを作製する。このような窒化珪素グリーンシートを必要枚数積層し、プレス加工等を施して圧着(加圧接着)して窒化珪素成形体を作製する。この後、窒化珪素成形体を空気中もしくは窒素雰囲気等の非酸化性雰囲気中で脱脂処理した後、窒素雰囲気等の非酸化性雰囲気中で焼成して、目的とするセラミック基板2を得る。
【0022】
セラミック基板2は、機械的強度が強く、高靭性な窒化珪素質焼結体、あるいは窒化アルミニウム質焼結体、炭化珪素質焼結体等の熱伝導率が60W/mK以上を有するセラミック材料であることが好ましく、それによって半導体素子7が多量の熱を発生した際にその熱をセラミック基板2で効果的に放散することができるため、半導体素子7を安定して、かつ正常に作動させることが可能となる。
【0023】
また、セラミック基板2は、その厚みを0.2〜1.0mmとすることが好ましい。厚みが0.2mm未満では、セラミック基板2と金属回路板3および金属板5とを接合したときに発生する応力により、セラミック基板2に割れ等が発生しやすくなる傾向がある。他方、1.0mmを超えると、半導体素子7から発生する熱が放熱部材8へ伝導する距離が長くなるため、良好に拡散させることが困難となる傾向がある。
【0024】
本発明のセラミック回路基板1は、上記のように製造したセラミック基板2の上面および下面に、直接接合法や活性金属法を用いて導電性を有する銅やアルミニウム等の金属材料から成る金属回路板3および金属板5をそれぞれ一体に接合して製造される。
【0025】
例えば、活性金属法を用いる場合であれば、銀−銅合金粉末等から成る銀ロウ粉末や、アルミニウム−シリコン合金粉末等から成るアルミニウムロウ粉末に、チタン・ジルコニウム・ハフニウム等の活性金属やその水素化物の少なくとも1種からなる活性金属粉末を2〜5重量%添加した活性金属ロウ材に、適当な有機溶剤・溶媒を添加混合して得た活性金属ロウ材ペーストを、セラミック基板2の上下面に従来周知のスクリーン印刷技術を用いて金属回路板3および金属板5に対応させた所定パターンに印刷する。
【0026】
その後、金属回路板3および金属板5を活性金属ロウ材ペーストのパターン上に載置し、これを真空中または中性もしくは還元雰囲気中で、所定温度(銀ロウの場合は約900℃、アルミニウムロウ材の場合は約600℃)で加熱処理し、活性金属ロウ材を溶融させて、セラミック基板2の上下面と金属回路板3および金属板5とを接合させる。これにより、セラミック基板2の上下面に金属回路板3および金属板5が取着されることとなる。
【0027】
銅やアルミニウム等から成る金属回路板3および金属板5は、銅やアルミニウム等のインゴット(塊)に圧延加工法や抜き打ち加工法等従来周知の金属加工法を施すことによって回路パターンの形状に対応する所定のパターン形状に製作される。金属回路板3および金属板5の厚さは、0.1〜1.0mmであることが好ましい。厚みが0.1mm未満では、金属回路板3の電気抵抗が大きくなるため半導体素子7からの高電流信号を伝播しにくくなる傾向がある。他方、1.0mmを超えると、セラミック基板2と金属回路板3および金属板5とを接合したときに発生する応力が大きくなることから、セラミック基板2に割れ等が発生しやすくなる傾向がある。
【0028】
金属回路板3および金属板5は、銅から成る場合であれば、これを無酸素銅で形成しておくと、無酸素銅はロウ付けの際に銅の表面が銅中に存在する酸素により酸化されることなくロウ材との濡れ性が良好となるので、セラミック基板2とのロウ材を介しての接合が強固になる。従って、金属回路板3および金属板5は、これを無酸素銅で形成しておくことが好ましい。
【0029】
金属回路板3および金属板5の厚みは、活性金属ロウ付け時や半導体素子7等の電子部品搭載のための半田リフロー時の加熱による反りを抑制するために、金属板5の厚みを金属回路板3の厚みに対して薄くすることが好ましい。金属回路板3および金属板5の材質は、活性金属ロウ付け時や半導体素子7等の電子部品搭載のための半田リフロー時の加熱による反りを効果的に抑えることが可能となることにより、熱膨張係数が等しい同材料であることが好ましい。
【0030】
また、金属回路板3は、その表面にニッケルから成る良導電性で、かつ耐蝕性が良く、またロウ材との濡れ性が良好な金属をメッキ法により被着させておくと、金属回路板3と外部電気回路との電気的接続を良好とすることができるとともに、金属回路板3に半導体素子7等の電子部品を半田を介して強固に接着させることができる。従って、金属回路板3は、その表面にニッケルから成る良導電性で、かつ耐蝕性が良く、またロウ材との濡れ性が良好な金属をメッキ法により被着させておくことが好ましい。
【0031】
絶縁体4は、複数の金属回路板3の各々の外周に位置し、金属回路板3の間を埋めるようにセラミック基板2の上面に積層される。金属回路板3の間を埋める絶縁体4の幅は、0.2〜3.0mm程度であることが好ましい。幅が0.2mm未満では、金属回路板3間の電気的絶縁性が低下することにより金属回路板3間に放電が発生してしまう危険性がある。他方、3.0mmを超えると、半導体素子7から発生した熱を隣接する金属回路板3へ横方向に有効に放散することが困難となる。また、絶縁体4の厚みは、金属回路板3間の放電を効果的に抑制し、電気的に短絡することを防止することを可能とするため、金属回路板3の厚みに対して0〜1.0mm厚くすることが好ましい。
【0032】
これに対し、絶縁体4の厚みが金属回路板3よりも薄いと、半導体素子7から発生した熱を隣接する金属回路板3へ横方向に良好に放散することが困難となる。また、絶縁体4の厚みが金属回路板3の厚みに対して1.0mmよりも厚いと、金属回路板3間を接続するワイヤボンディング形成に対し障害となる傾向がある。
【0033】
また、絶縁体4の熱膨脹係数は、セラミック基板2の熱膨張係数と同等以上とすることが重要で、かつ金属回路板3の熱膨張係数以下であることが好ましい。ただし、絶縁体4の熱膨張係数がセラミック基板2より小さい場合においても、金属回路板3の回路間の隙間が一体化されるため、セラミック回路基板1の剛性が高くなることから、セラミック回路基板1の反りを抑制することが可能となる。
【0034】
さらに、金属回路板3の間に絶縁体4が埋められていることが重要である。絶縁体4の熱膨脹係数がセラミック基板2の熱膨張係数より小さい場合は、セラミック基板2と金属板5との接合による熱応力に対して不均衡となり、セラミック回路基板1に金属回路板3が上になるような凸方向の反りが生じやすい傾向がある。
【0035】
さらにまた、絶縁体4の熱膨張係数が金属回路板3よりも大きい場合は、セラミック回路基板1のセラミック基板2と絶縁体4との接合時に熱膨張係数の差が大きくなるため、セラミック基板2にクラックや割れが生じ、絶縁性が低下する可能性がある。従って、絶縁体4の熱膨脹係数は、セラミック基板2の熱膨張係数と同等以上、金属回路板3の熱膨張係数以下で形成しておくことが好ましく、それにより、セラミック回路基板1の反りは抑制され、セラミック回路基板1を放熱部材8に半田6を介して接合する際に、放熱部材8と金属板5との隙間の半田6に気泡が入り込むことを効果的に抑制することが可能となる。その結果、セラミック回路基板1と放熱部材8との間の熱抵抗の増加を防ぐことができる。
【0036】
絶縁体4とセラミック基板2および金属回路板3とは、前述のように、ロウ材を介しての接合が強固であり、接触熱抵抗の低減についても効果がある。また、絶縁体4が補強材としても機能するため、セラミック基板2の曲げ強度を強化し、熱的・機械的応力に起因するクラックや割れの発生を防止することが可能となる。その結果、クラックや割れに起因する絶縁不良を防止することが可能となる。
【0037】
絶縁体4の材料は、例えばセラミック系の高熱伝導・高絶縁性を有するものであり、熱伝導率が60W/mK以上であると、半導体素子7が多量の熱を発生した際に、絶縁体4を経由して隣接する金属回路板3に伝導することが可能となり、効率よく放散することができ、半導体素子7を常に安定、かつ正常に作動させることが可能となる。絶縁体4の絶縁性は、金属回路板3の間に放電が発生し、電気的に短絡するのを防ぐために、その耐電圧を10kV/mm以上としておくことが好ましい。
【0038】
以上のようにして作製されたセラミック回路基板1の金属回路板3の所定の位置に半導体素子7等の電子部品を半田6等を介して接合し、アルミニウム等のボンディングワイヤ10等で電気的に接続して、半田6を介して放熱部材8に接着することにより、図1に示すような半導体モジュールが完成する。
【0039】
以上により、図1に示すような、半導体素子7からの熱を有効に放散することが可能となり、基板の小型化および半導体素子等の電子部品の実装密度を高めることが可能な本発明のセラミック回路基板1が完成する。
【0040】
【実施例】
以下、本発明の実施例および比較例の試験結果を挙げて本発明のセラミック回路基板について詳細に説明するが、本発明は以下の実施例のみに限定されるものではない。
【0041】
セラミック回路基板1において、セラミック基板2に厚み0.32mmの窒化珪素基板を用い、金属回路板3および金属板5にそれぞれの厚みが0.5mmの銅板を使用した。なお、半導体素子7が搭載されている金属回路板3のサイズは半導体素子7の外形より0.5mm大きい正方形の形状とした。そして、複数の金属回路板3の中心に位置するもののサイズを小型にした従来のセラミック回路基板の熱抵抗θj−w(単位:℃/W)を計算した(以下、比較例という)。一方、本発明のセラミック回路基板については、比較例と同じ構成かつ基板サイズとし、金属回路板の外周あるいは金属回路板の間に窒化珪素から成る絶縁体を埋め込んだものとし、熱抵抗θj−w(単位:℃/W)を計算した(以下、実施例という)。この熱抵抗θj−wは、セラミック回路基板を、強制水冷を行なう冷却モジュールにオイルコンパウンドを用いて接着した際のチップ温度Tと冷却液の流路の温度Tとについて定常熱伝導解析を行ない各温度差を印加電力で割ることにより計算した。この熱抵抗θj−wは値が小さいほど放熱能力が高いと判断できる。このようにして求めた熱抵抗θj−wの結果を表1に示す。
【0042】
【表1】

Figure 2004087927
【0043】
表1に示す結果より、比較例(表中の試料No.の欄にそれぞれ※で示した1,3および5)においては、半導体素子が発した熱が金属回路板の端から横へ広がることができず、金属回路板の隙間で遮られてしまうため、熱抵抗が増大することが分かる。一方、本発明の実施例(試料No.2,4および6)においては、半導体素子が発した熱を金属回路板の間に埋め込まれた絶縁体を経由して有効に横方向へも伝導して放散させることが可能なため熱抵抗が低下しており、比較例と比較して、熱抵抗が2〜7%低下していることが分かる。特に、試料No.2に示すように、チップサイズが小さいほど厚み方向の放熱エリアが小さいために、実施例における横方向の熱広がり効果が大きいことが分かる。
【0044】
なお、本発明は上述の実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。例えば、上述の例ではセラミック基板が窒化珪素質焼結体で、絶縁体が窒化珪素質焼結体で形成された例を示したが、半導体素子が多量の熱を発し、この熱を効率良く放熱したい場合には、セラミック基板および絶縁体を熱伝導率の高い窒化アルミニウム質焼結体で形成すればよい。
【0045】
【発明の効果】
本発明のセラミック回路基板によれば、セラミック基板の上面に複数の金属回路板を、下面に金属板を取着して成るセラミック回路基板であって、金属回路板の各々の外周が熱膨張係数がセラミック基板と同等以上の絶縁体で囲まれているとともに、金属回路板の間がその絶縁体で埋められていることから、セラミック回路基板の小型化のために金属回路板の面積を小さくすることが可能となり、半導体素子が金属回路板の端に搭載された場合においても半導体素子からの熱が金属回路板の各々の外周あるいは金属回路板の間にある絶縁体を経由して横方向に拡散することが可能となることにより、セラミック回路基板の熱抵抗が小さくなる。その結果、半導体素子の温度が上昇し、熱破壊することがない。また、熱膨張係数が前記セラミック基板に対し同等以上の絶縁体であるため、絶縁体がない場合と比較し、セラミック基板と金属板の接合時に生じる熱応力を緩和し、さらにはセラミック回路基板が一体化されることにより剛性が高まるため、セラミック基板の反りを効果的に抑制することができる。これにより、金属板と放熱部材間の半田中に生じる気泡が閉じ込められることを効果的に抑制することが可能となるため、半導体素子からの熱を効率よく放散させることができる。
【0046】
また、半導体素子が搭載される複数の金属回路板の面積は、絶縁体を経由して横方向に熱が拡散することが可能となることにより、それぞれ小さくすることができ、セラミック回路基板の小型化を図ることができる。その結果、セラミック回路基板の反りを効果的に抑制することが可能となる。
【0047】
また、金属回路板の各々の外周が熱膨張係数がセラミック基板と同等以上の絶縁体で囲まれているとともに、金属回路板の間が絶縁体で埋められていることから、金属回路間板間のセラミック基板が絶縁体で埋められた分セラミック基板の板厚みが厚くなることとなり機械的強度が増すこととなるので、絶縁体がない場合と比較してセラミック基板と金属板との接合時に生じる熱応力を緩和することが可能となる。さらには、複数の金属回路板により構成される回路間の隙間が一体化されるため、セラミック回路基板の剛性が高まり、それによりセラミック回路基板の反りを効果的に抑制することが可能となる。その結果、金属板と放熱部材間の半田中に生じる気泡が閉じ込められることを効果的に抑制することが可能となることにより、半導体素子からの熱を効率よく放散させることが可能となり、放熱性を改善したセラミック回路基板を提供することができる。
【0048】
従って、本発明のセラミック回路基板によれば、セラミック回路基板の反りを効果的に抑制することが可能となるためセラミック回路基板を損傷することがなく、放熱特性が良好であり、半導体素子等の電子部品の実装密度を高めることが可能となり、搭載された半導体素子を長期にわたり安定して作動させることが可能なセラミック回路基板を得ることができる。
【0049】
以上のことから、本発明により、放熱性を改善したセラミック回路基板を提供することができた。
【図面の簡単な説明】
【図1】本発明のセラミック回路基板およびそれを用いた半導体モジュールの実施の形態の一例を示す断面図である。
【図2】本発明のセラミック回路基板およびそれを用いた半導体モジュールの実施の形態の一例を示す平面図である。
【図3】従来のセラミック回路基板およびそれを用いた半導体モジュールの例を示す断面図である。
【図4】従来のセラミック回路基板およびそれを用いた半導体モジュールの例を示す平面図である。
【符号の説明】
1:セラミック回路基板
2:セラミック基板
3:金属回路板
4:絶縁体
5:金属板
6:半田
7:半導体素子
8:放熱部材[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a ceramic circuit board formed by attaching a metal circuit board to a ceramic substrate.
[0002]
[Prior art]
In recent years, as a circuit board such as a power module board or a switching module board, a ceramic circuit board in which a metal circuit board made of copper or the like is directly bonded and attached to a ceramic board via an active metal brazing material has been used. ing.
[0003]
FIG. 3 is a sectional view of an example of a semiconductor module using a conventional ceramic circuit board, and FIG. 4 is a plan view thereof. In these figures, reference numeral 11 denotes a ceramic circuit board. The ceramic circuit board 11 is attached to a ceramic substrate 12, a plurality of metal circuit boards 13 attached to an upper surface thereof, and a lower surface of the ceramic substrate 12. And a metal plate 15. In such a ceramic circuit board 11, electronic components such as a semiconductor element 17 are mounted on a metal circuit board 13 and mounted on a heat radiating member 18 with a solder 16 interposed between the ceramic circuit board 11 and the metal plate 15. Is used as a semiconductor module.
[0004]
When using the ceramic substrate 12 made of an aluminum oxide sintered body, such a ceramic circuit board 11 is specifically manufactured by the following method.
[0005]
First, an organic solvent and a solvent are added to an active metal powder obtained by adding at least one of titanium, zirconium, and hafnium and a hydride thereof to a silver-copper alloy to prepare a brazing material paste.
[0006]
Next, an appropriate organic binder, a plasticizer, a solvent, and the like are added to and mixed with raw material powders such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide to form a slurry, and a conventionally known doctor blade method or calender roll method is used. After obtaining a plurality of ceramic green sheets by employing a tape forming technique such as that described above, the ceramic green sheets are formed into a predetermined size, and then, the ceramic green sheets are stacked vertically as necessary, and at about 1600 ° C. in a reducing atmosphere. The ceramic green sheet is fired at a temperature and sintered and integrated to form a ceramic substrate 12 made of an aluminum oxide sintered body.
[0007]
Next, a plurality of metal circuit boards 13 made of copper or the like are placed on the ceramic substrate 12 with the brazing material paste interposed therebetween, while the brazing material paste is similarly placed on the lower surface of the ceramic substrate 12 opposed thereto. A metal plate 15 made of copper or the like is interposed therebetween.
[0008]
Further, the brazing material paste disposed between the ceramic substrate 12 and the metal circuit board 13 and between the ceramic substrate 12 and the metal plate 15 is heated to a temperature of about 900 ° C. in a non-oxidizing atmosphere and melted. Then, the ceramic substrate 12 and the metal circuit board 13 and the ceramic substrate 12 and the metal plate 15 are joined with the brazing material.
[0009]
The ceramic circuit board 11 manufactured in this manner is made by bonding an electronic component such as a semiconductor 16 such as an IGBT (Insulated Gate Bipolar Transistor) and a MOS-FET (Metal Oxide Semiconductor-Field Effect Transistor) to an adhesive such as a solder 16. After being joined through the intermediary, for example, the semiconductor module is joined to the heat radiating member 18 made of aluminum or the like by the solder 16, so that a semiconductor module that satisfactorily dissipates heat generated during operation of the semiconductor element 17 is obtained.
[0010]
[Problems to be solved by the invention]
However, in the above-described conventional semiconductor module, the area of the plurality of metal circuit boards 13 on which the semiconductor element 17 is mounted is set so that heat is diffused in the horizontal direction in order to satisfactorily radiate heat generated during operation of the semiconductor element 17. Needed to be larger. Therefore, there is a problem that it is difficult to reduce the size of the semiconductor module.
[0011]
Further, since the plurality of metal circuit boards 13 and the one-sided solid metal plate 15 have different bonding areas, the heat generated at the junction between the ceramic substrate 12 and the metal circuit board 13 and the junction between the ceramic substrate 12 and the metal plate 15 is different. The stress tends to be unbalanced due to the difference in the bonding area as the size of the ceramic circuit board 11 increases. As a result, the ceramic circuit board 11 is warped in the convex direction such that the metal circuit board 13 is on top. If the warpage in the convex direction becomes large, air bubbles are involved in mounting on the heat radiating member 18 using the solder 16, and the air bubbles in the solder 16 block heat from the semiconductor element 17, so that the heat resistance of the semiconductor module is reduced. There was a problem that it increased.
[0012]
SUMMARY OF THE INVENTION The present invention has been completed in view of the problems of the related art described above, and an object of the present invention is to provide a ceramic circuit board capable of effectively dissipating heat from a semiconductor element, suppressing warpage, and reducing the size. It is in.
[0013]
[Means for Solving the Problems]
The ceramic circuit board of the present invention is a ceramic circuit board in which a plurality of metal circuit boards are attached to an upper surface of a ceramic substrate and a metal plate is attached to a lower surface, and the outer circumference of each of the metal circuit boards has a coefficient of thermal expansion. It is characterized by being surrounded by an insulator equal to or more than the ceramic substrate, and being filled with the insulator between the metal circuit boards.
[0014]
According to the ceramic circuit board of the present invention, the outer periphery of each of the plurality of metal circuit boards attached to the upper surface of the ceramic substrate is surrounded by an insulator having a thermal expansion coefficient equal to or greater than that of the ceramic substrate, and Since the space between the boards is filled with the insulator, even when the semiconductor element is mounted on the edge of the metal circuit board, heat from the semiconductor element can be transferred to the outer periphery of each of the metal circuit boards or the insulation between the metal circuit boards. By being able to diffuse laterally through the body, the thermal resistance of the ceramic circuit board is reduced. As a result, it is possible to effectively suppress a rise in the temperature of the semiconductor element and thermal destruction.
[0015]
In addition, the area of the plurality of metal circuit boards on which the semiconductor elements are mounted can be reduced because heat can be diffused in the lateral direction via the insulator, and the size of the ceramic circuit board can be reduced. Can be achieved. As a result, it is possible to effectively suppress the warpage of the ceramic circuit board.
[0016]
In addition, since the outer periphery of each metal circuit board is surrounded by an insulator having a thermal expansion coefficient equal to or greater than that of the ceramic substrate, and the space between the metal circuit boards is filled with the insulator, the ceramic between the metal circuit boards is Since the board is filled with an insulator, the thickness of the ceramic board becomes thicker and the mechanical strength increases, so the thermal stress generated when joining the ceramic board and the metal plate compared to the case without an insulator Can be alleviated. Further, since the gap between the circuits constituted by the plurality of metal circuit boards is integrated, the rigidity of the ceramic circuit board is increased, thereby making it possible to effectively suppress the warpage of the ceramic circuit board. As a result, it is possible to effectively suppress the trapping of air bubbles generated in the solder between the metal plate and the heat radiating member, so that heat from the semiconductor element can be efficiently radiated, and the heat radiating property can be improved. Can be provided.
[0017]
Therefore, according to the ceramic circuit board of the present invention, it is possible to effectively suppress the warpage of the ceramic circuit board. The mounting density of electronic components can be increased, and a ceramic circuit board capable of stably operating the mounted semiconductor element for a long time can be obtained.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the ceramic circuit board of the present invention will be described in detail with reference to the accompanying drawings.
[0019]
FIG. 1 is a sectional view showing an example of an embodiment of a ceramic circuit board of the present invention and a semiconductor module using the same, and FIG. 2 is a plan view thereof. In these figures, 1 is a ceramic circuit board, 2 is a ceramic board, 3 is a metal circuit board, 4 is an insulator, 5 is a metal plate, 6 is solder, 7 is a semiconductor element as an electronic component, and 8 is a heat dissipation member. is there.
[0020]
The ceramic substrate 2 functions as a support member for supporting the metal circuit board 3 and the metal plate 5, and is made of an aluminum oxide (Al 2 O 3 ) -based sintered body, a mullite (3Al 2 O 3 .2SiO 2 ) -based sintered body, It is formed of a ceramic material such as a silicon carbide (SiC) -based sintered body, an aluminum nitride (AlN) -based sintered body, and a silicon nitride (Si 3 N 4 ) -based sintered body.
[0021]
When the ceramic substrate 2 is formed of, for example, a silicon nitride-based sintered body, first, a sintering aid such as a rare earth oxide powder or an aluminum oxide powder is added and mixed with the silicon nitride powder to form a silicon nitride powder. Prepare raw material powder for sintered body. Next, an organic binder and a dispersion medium are added to and mixed with the silicon nitride sintered material raw material powder to form a paste. The paste is formed into a sheet by a normal forming method such as a doctor blade method or a calender roll method, and the silicon nitride green is formed. Make a sheet. A required number of such silicon nitride green sheets are laminated, subjected to press working or the like, and pressed (bonded under pressure) to produce a silicon nitride molded body. Thereafter, the silicon nitride compact is degreased in a non-oxidizing atmosphere such as air or a nitrogen atmosphere, and then fired in a non-oxidizing atmosphere such as a nitrogen atmosphere to obtain a target ceramic substrate 2.
[0022]
The ceramic substrate 2 is made of a ceramic material having a thermal conductivity of 60 W / mK or more, such as a silicon nitride sintered body having high mechanical strength and high toughness, or an aluminum nitride sintered body or a silicon carbide sintered body. It is preferable that when the semiconductor element 7 generates a large amount of heat, the heat can be effectively dissipated by the ceramic substrate 2, so that the semiconductor element 7 operates stably and normally. Becomes possible.
[0023]
In addition, the ceramic substrate 2 preferably has a thickness of 0.2 to 1.0 mm. When the thickness is less than 0.2 mm, cracks and the like tend to occur easily in the ceramic substrate 2 due to stress generated when the ceramic substrate 2 is bonded to the metal circuit board 3 and the metal plate 5. On the other hand, if it exceeds 1.0 mm, the distance that heat generated from the semiconductor element 7 is conducted to the heat radiating member 8 becomes long, and it tends to be difficult to diffuse the heat satisfactorily.
[0024]
The ceramic circuit board 1 of the present invention is a metal circuit board made of a conductive metal material such as copper or aluminum by using a direct bonding method or an active metal method on the upper and lower surfaces of the ceramic substrate 2 manufactured as described above. 3 and the metal plate 5 are integrally joined.
[0025]
For example, when the active metal method is used, an active metal such as titanium / zirconium / hafnium or its hydrogen is added to a silver brazing powder composed of a silver-copper alloy powder or an aluminum brazing powder composed of an aluminum-silicon alloy powder or the like. Metal brazing material paste obtained by adding a suitable organic solvent and a solvent to an active metal brazing material containing 2 to 5% by weight of an active metal powder comprising at least one of Then, using a conventionally well-known screen printing technique, a predetermined pattern corresponding to the metal circuit board 3 and the metal plate 5 is printed.
[0026]
Thereafter, the metal circuit board 3 and the metal plate 5 are placed on the pattern of the active metal brazing material paste, and this is placed at a predetermined temperature (about 900 ° C. for silver brazing, aluminum A heat treatment is performed at about 600 ° C. for the brazing material) to melt the active metal brazing material, thereby joining the upper and lower surfaces of the ceramic substrate 2 with the metal circuit board 3 and the metal plate 5. As a result, the metal circuit board 3 and the metal plate 5 are attached to the upper and lower surfaces of the ceramic substrate 2.
[0027]
The metal circuit board 3 and the metal plate 5 made of copper, aluminum or the like correspond to the shape of the circuit pattern by applying a conventionally known metal working method such as a rolling method or a punching method to an ingot of copper or aluminum. It is manufactured in a predetermined pattern shape. The thickness of the metal circuit board 3 and the metal board 5 is preferably 0.1 to 1.0 mm. When the thickness is less than 0.1 mm, the electric resistance of the metal circuit board 3 increases, so that a high current signal from the semiconductor element 7 tends to be difficult to propagate. On the other hand, if it exceeds 1.0 mm, the stress generated when the ceramic substrate 2 is bonded to the metal circuit board 3 and the metal plate 5 increases, so that cracks and the like tend to occur in the ceramic substrate 2. .
[0028]
If the metal circuit board 3 and the metal plate 5 are made of copper, if they are formed of oxygen-free copper, the surface of the copper becomes free from oxygen existing in the copper during brazing. Since the wettability with the brazing material is improved without being oxidized, the bonding with the ceramic substrate 2 via the brazing material is strengthened. Therefore, it is preferable that the metal circuit board 3 and the metal plate 5 are formed of oxygen-free copper.
[0029]
The thickness of the metal plate 3 and the thickness of the metal plate 5 are set so that warpage due to heating during active metal brazing or solder reflow for mounting electronic components such as the semiconductor element 7 is suppressed. It is preferable that the thickness be smaller than the thickness of the plate 3. The material of the metal circuit board 3 and the metal plate 5 can effectively suppress warpage due to heating at the time of active metal brazing or solder reflow for mounting electronic components such as the semiconductor element 7. It is preferable that the materials have the same expansion coefficient.
[0030]
The metal circuit board 3 is preferably made of nickel and has good conductivity, good corrosion resistance, and good wettability with the brazing material. The electrical connection between the electronic circuit 3 and the external electric circuit can be improved, and the electronic component such as the semiconductor element 7 can be firmly bonded to the metal circuit board 3 via solder. Therefore, it is preferable that the metal circuit board 3 be coated with a metal made of nickel having good conductivity, good corrosion resistance, and good wettability with the brazing material by plating.
[0031]
The insulator 4 is located on the outer periphery of each of the plurality of metal circuit boards 3, and is stacked on the upper surface of the ceramic substrate 2 so as to fill the space between the metal circuit boards 3. The width of the insulator 4 filling the space between the metal circuit boards 3 is preferably about 0.2 to 3.0 mm. If the width is less than 0.2 mm, there is a risk that electric discharge between the metal circuit boards 3 may occur due to a decrease in electrical insulation between the metal circuit boards 3. On the other hand, if it exceeds 3.0 mm, it becomes difficult to effectively radiate the heat generated from the semiconductor element 7 to the adjacent metal circuit board 3 in the lateral direction. In addition, the thickness of the insulator 4 is 0 to the thickness of the metal circuit board 3 in order to effectively suppress discharge between the metal circuit boards 3 and prevent an electrical short circuit. Preferably, the thickness is 1.0 mm.
[0032]
On the other hand, when the thickness of the insulator 4 is smaller than that of the metal circuit board 3, it becomes difficult to satisfactorily dissipate the heat generated from the semiconductor element 7 to the adjacent metal circuit board 3 in the lateral direction. Further, if the thickness of the insulator 4 is greater than 1.0 mm with respect to the thickness of the metal circuit board 3, it tends to hinder the formation of wire bonding for connecting the metal circuit boards 3.
[0033]
It is important that the coefficient of thermal expansion of the insulator 4 is equal to or greater than the coefficient of thermal expansion of the ceramic substrate 2 and is preferably equal to or less than the coefficient of thermal expansion of the metal circuit board 3. However, even when the thermal expansion coefficient of the insulator 4 is smaller than that of the ceramic substrate 2, the rigidity of the ceramic circuit substrate 1 is increased because the gaps between the circuits of the metal circuit board 3 are integrated, so that the ceramic circuit substrate 1 can be suppressed.
[0034]
Further, it is important that the insulator 4 is buried between the metal circuit boards 3. When the thermal expansion coefficient of the insulator 4 is smaller than the thermal expansion coefficient of the ceramic substrate 2, the thermal stress due to the joining between the ceramic substrate 2 and the metal plate 5 becomes imbalanced, and the metal circuit plate 3 is placed on the ceramic circuit substrate 1. In the convex direction.
[0035]
Furthermore, when the thermal expansion coefficient of the insulator 4 is larger than that of the metal circuit board 3, the difference in the thermal expansion coefficient at the time of joining the ceramic substrate 2 of the ceramic circuit board 1 and the insulator 4 becomes large. Cracks or cracks may occur, and the insulation properties may decrease. Therefore, it is preferable that the thermal expansion coefficient of the insulator 4 be equal to or higher than the thermal expansion coefficient of the ceramic substrate 2 and equal to or lower than the thermal expansion coefficient of the metal circuit board 3, thereby suppressing the warpage of the ceramic circuit board 1. When the ceramic circuit board 1 is joined to the heat radiating member 8 via the solder 6, it is possible to effectively suppress air bubbles from entering the solder 6 in the gap between the heat radiating member 8 and the metal plate 5. . As a result, an increase in thermal resistance between the ceramic circuit board 1 and the heat radiating member 8 can be prevented.
[0036]
As described above, the insulator 4 and the ceramic substrate 2 and the metal circuit board 3 are firmly joined via the brazing material, and are effective in reducing the contact thermal resistance. Further, since the insulator 4 also functions as a reinforcing material, it is possible to enhance the bending strength of the ceramic substrate 2 and prevent the occurrence of cracks and cracks due to thermal and mechanical stress. As a result, it is possible to prevent insulation failure due to cracks and cracks.
[0037]
The material of the insulator 4 is, for example, a ceramic-based material having high thermal conductivity and high insulation properties. When the thermal conductivity is 60 W / mK or more, the insulator 4 may be used when the semiconductor element 7 generates a large amount of heat. 4 can be conducted to the adjacent metal circuit board 3, the heat can be efficiently dissipated, and the semiconductor element 7 can always be operated stably and normally. The insulating property of the insulator 4 is preferably set to a withstand voltage of 10 kV / mm or more in order to prevent a discharge from occurring between the metal circuit boards 3 and an electrical short circuit.
[0038]
An electronic component such as a semiconductor element 7 is joined to a predetermined position of the metal circuit board 3 of the ceramic circuit board 1 manufactured as described above via a solder 6 or the like, and electrically connected with a bonding wire 10 of aluminum or the like. The semiconductor module as shown in FIG. 1 is completed by connecting and bonding to the heat dissipation member 8 via the solder 6.
[0039]
As described above, as shown in FIG. 1, the heat of the semiconductor element 7 can be effectively dissipated, and the ceramic of the present invention can reduce the size of the substrate and increase the mounting density of electronic components such as semiconductor elements. The circuit board 1 is completed.
[0040]
【Example】
Hereinafter, the ceramic circuit board of the present invention will be described in detail with reference to test results of examples and comparative examples of the present invention, but the present invention is not limited to only the following examples.
[0041]
In the ceramic circuit board 1, a 0.32 mm-thick silicon nitride substrate was used for the ceramic substrate 2, and 0.5 mm-thick copper plates were used for the metal circuit boards 3 and 5 respectively. In addition, the size of the metal circuit board 3 on which the semiconductor element 7 is mounted was a square shape 0.5 mm larger than the outer shape of the semiconductor element 7. Then, the thermal resistance θ j−w (unit: ° C./W) of the conventional ceramic circuit board in which the size of the one located at the center of the plurality of metal circuit boards 3 was reduced was calculated (hereinafter, referred to as a comparative example). On the other hand, the ceramic circuit board of the present invention has the same configuration and the same board size as the comparative example, an insulator made of silicon nitride embedded in the outer periphery of the metal circuit board or between the metal circuit boards, and a thermal resistance θ j−w ( (Unit: ° C./W) was calculated (hereinafter, referred to as an example). The thermal resistance θ j−w is determined by steady-state heat conduction analysis of the chip temperature T j and the temperature T w of the cooling fluid channel when the ceramic circuit board is bonded to a cooling module that performs forced water cooling using an oil compound. Was calculated by dividing each temperature difference by the applied power. It can be determined that the smaller the value of the thermal resistance θ j−w is, the higher the heat radiation capability is. Table 1 shows the results of the thermal resistance θ j−w thus obtained.
[0042]
[Table 1]
Figure 2004087927
[0043]
From the results shown in Table 1, the heat generated by the semiconductor element spreads laterally from the edge of the metal circuit board in the comparative example (1, 3, and 5 indicated by * in the column of sample No. in the table, respectively). It can be seen that the thermal resistance is increased because the gaps between the metal circuit boards cannot be formed, and are blocked by the gaps between the metal circuit boards. On the other hand, in the examples of the present invention (samples Nos. 2, 4 and 6), the heat generated by the semiconductor element is effectively conducted and dissipated in the lateral direction via the insulator embedded between the metal circuit boards. It can be seen that the thermal resistance is reduced because the thermal resistance can be reduced, and the thermal resistance is reduced by 2 to 7% as compared with the comparative example. In particular, the sample No. As shown in FIG. 2, the smaller the chip size, the smaller the heat radiation area in the thickness direction.
[0044]
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, in the above-described example, the ceramic substrate is a silicon nitride sintered body and the insulator is formed of a silicon nitride sintered body. However, the semiconductor element generates a large amount of heat, and this heat is efficiently generated. If it is desired to radiate heat, the ceramic substrate and the insulator may be formed of an aluminum nitride sintered body having high thermal conductivity.
[0045]
【The invention's effect】
According to the ceramic circuit board of the present invention, a ceramic circuit board is formed by attaching a plurality of metal circuit boards to an upper surface of a ceramic substrate and attaching a metal plate to a lower surface, and each outer periphery of the metal circuit board has a coefficient of thermal expansion. Is surrounded by an insulator equal to or larger than the ceramic substrate, and the space between the metal circuit boards is filled with the insulator.Therefore, the area of the metal circuit board can be reduced to reduce the size of the ceramic circuit board. This makes it possible for the heat from the semiconductor element to diffuse laterally through the outer periphery of each of the metal circuit boards or the insulator between the metal circuit boards even when the semiconductor element is mounted on the edge of the metal circuit board. By making it possible, the thermal resistance of the ceramic circuit board is reduced. As a result, the temperature of the semiconductor element does not rise and the semiconductor element does not break down. In addition, since the thermal expansion coefficient of the insulator is equal to or greater than that of the ceramic substrate, the thermal stress generated when the ceramic substrate is bonded to the metal plate is reduced as compared with the case where the insulator is not provided. Since the rigidity is increased by being integrated, the warpage of the ceramic substrate can be effectively suppressed. Thereby, it is possible to effectively suppress the trapping of air bubbles generated in the solder between the metal plate and the heat radiating member, so that heat from the semiconductor element can be efficiently dissipated.
[0046]
In addition, the area of the plurality of metal circuit boards on which the semiconductor elements are mounted can be reduced because heat can be diffused in the lateral direction via the insulator, and the size of the ceramic circuit board can be reduced. Can be achieved. As a result, it is possible to effectively suppress the warpage of the ceramic circuit board.
[0047]
In addition, since the outer periphery of each metal circuit board is surrounded by an insulator having a thermal expansion coefficient equal to or greater than that of the ceramic substrate, and the space between the metal circuit boards is filled with the insulator, the ceramic between the metal circuit boards is Since the board is filled with an insulator, the thickness of the ceramic board becomes thicker and the mechanical strength increases, so the thermal stress generated when joining the ceramic board and the metal plate compared to the case without an insulator Can be alleviated. Further, since the gap between the circuits constituted by the plurality of metal circuit boards is integrated, the rigidity of the ceramic circuit board is increased, thereby making it possible to effectively suppress the warpage of the ceramic circuit board. As a result, it is possible to effectively suppress the trapping of air bubbles generated in the solder between the metal plate and the heat radiating member, so that heat from the semiconductor element can be efficiently radiated, and the heat radiating property can be improved. Can be provided.
[0048]
Therefore, according to the ceramic circuit board of the present invention, it is possible to effectively suppress the warpage of the ceramic circuit board. The mounting density of electronic components can be increased, and a ceramic circuit board capable of stably operating the mounted semiconductor element for a long time can be obtained.
[0049]
As described above, according to the present invention, a ceramic circuit board with improved heat dissipation can be provided.
[Brief description of the drawings]
FIG. 1 is a sectional view showing an example of an embodiment of a ceramic circuit board and a semiconductor module using the same according to the present invention.
FIG. 2 is a plan view showing an example of an embodiment of a ceramic circuit board and a semiconductor module using the same according to the present invention.
FIG. 3 is a cross-sectional view showing an example of a conventional ceramic circuit board and a semiconductor module using the same.
FIG. 4 is a plan view showing an example of a conventional ceramic circuit board and a semiconductor module using the same.
[Explanation of symbols]
1: ceramic circuit board 2: ceramic board 3: metal circuit board 4: insulator 5: metal plate 6: solder 7: semiconductor element 8: heat dissipation member

Claims (1)

セラミック基板の上面に複数の金属回路板を、下面に金属板を取着して成るセラミック回路基板であって、前記金属回路板の各々の外周が熱膨張係数が前記セラミック基板と同等以上の絶縁体で囲まれているとともに、前記金属回路板の間が前記絶縁体で埋められていることを特徴とするセラミック回路基板。A ceramic circuit board comprising a plurality of metal circuit boards attached to an upper surface of a ceramic substrate and a metal plate attached to a lower surface, wherein an outer periphery of each of the metal circuit boards is insulated with a thermal expansion coefficient equal to or greater than that of the ceramic substrate. A ceramic circuit board, wherein the ceramic circuit board is surrounded by a body and a space between the metal circuit boards is filled with the insulator.
JP2002248711A 2002-08-28 2002-08-28 Ceramic substrate Pending JP2004087927A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002248711A JP2004087927A (en) 2002-08-28 2002-08-28 Ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002248711A JP2004087927A (en) 2002-08-28 2002-08-28 Ceramic substrate

Publications (1)

Publication Number Publication Date
JP2004087927A true JP2004087927A (en) 2004-03-18

Family

ID=32056023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002248711A Pending JP2004087927A (en) 2002-08-28 2002-08-28 Ceramic substrate

Country Status (1)

Country Link
JP (1) JP2004087927A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007095942A (en) * 2005-09-28 2007-04-12 Nissan Motor Co Ltd Joint structure
JP2011135110A (en) * 2011-04-05 2011-07-07 Nissan Motor Co Ltd Joint structure
WO2012157373A1 (en) * 2011-05-16 2012-11-22 日本碍子株式会社 Circuit substrate for large-capacity module periphery circuit, and large-capacity module including periphery circuit employing circuit substrate
JP2015015275A (en) * 2013-07-03 2015-01-22 三菱電機株式会社 Ceramic circuit board, ceramic circuit board with heat sink, and manufacturing method of ceramic circuit board
JP2018006774A (en) * 2017-10-03 2018-01-11 三菱電機株式会社 Ceramic circuit board, ceramic circuit board with radiator, and method of manufacturing ceramic circuit board
CN109075136A (en) * 2016-04-28 2018-12-21 电化株式会社 Ceramic circuit board and its manufacturing method

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007095942A (en) * 2005-09-28 2007-04-12 Nissan Motor Co Ltd Joint structure
JP2011135110A (en) * 2011-04-05 2011-07-07 Nissan Motor Co Ltd Joint structure
WO2012157373A1 (en) * 2011-05-16 2012-11-22 日本碍子株式会社 Circuit substrate for large-capacity module periphery circuit, and large-capacity module including periphery circuit employing circuit substrate
JPWO2012157373A1 (en) * 2011-05-16 2014-07-31 日本碍子株式会社 Circuit board for peripheral circuit of large capacity module, and large capacity module including peripheral circuit using the circuit board
US8958215B2 (en) 2011-05-16 2015-02-17 Ngk Insulators, Ltd. Circuit board for peripheral circuits of high-capacity modules, and a high-capacity module including a peripheral circuit using the circuit board
JP6114691B2 (en) * 2011-05-16 2017-04-12 日本碍子株式会社 Circuit board for peripheral circuit of large capacity module, and large capacity module including peripheral circuit using the circuit board
JP2015015275A (en) * 2013-07-03 2015-01-22 三菱電機株式会社 Ceramic circuit board, ceramic circuit board with heat sink, and manufacturing method of ceramic circuit board
CN109075136A (en) * 2016-04-28 2018-12-21 电化株式会社 Ceramic circuit board and its manufacturing method
CN109075136B (en) * 2016-04-28 2022-08-02 电化株式会社 Ceramic circuit board and method for manufacturing the same
JP2018006774A (en) * 2017-10-03 2018-01-11 三菱電機株式会社 Ceramic circuit board, ceramic circuit board with radiator, and method of manufacturing ceramic circuit board

Similar Documents

Publication Publication Date Title
US11114355B2 (en) Power module and method for manufacturing power module
JP2008124416A (en) Ceramics circuit board and semiconductor module using this
JP2004022973A (en) Ceramic circuit board and semiconductor module
JP2004119568A (en) Ceramic circuit board
JP2004087927A (en) Ceramic substrate
JP2007096252A (en) Liquid-cooling circuit substrate and liquid cooling electronic device
JP3793562B2 (en) Ceramic circuit board
JP2003133662A (en) Ceramic circuit board
JP3934966B2 (en) Ceramic circuit board
JP6983119B2 (en) Heat dissipation plate, semiconductor package and semiconductor device
JP3588315B2 (en) Semiconductor element module
JP4459031B2 (en) Electronic component storage package and electronic device
JP2013012687A (en) Ceramic circuit board and electronic device using the same
CN111834307A (en) Semiconductor module
JP2013229377A (en) Circuit board and electronic apparatus using the same
JP6603098B2 (en) Circuit board and electronic device
JP2012094754A (en) Circuit board and electronic device
JP2005277382A (en) Package for storing electronic component, and electronic device
JP2006013420A (en) Package for electronic component housing, and electronic device
JP2003124584A (en) Ceramic circuit board
JP2003318316A (en) Ceramic circuit substrate
JP5777456B2 (en) Ceramic circuit board and electronic device
JP2006128589A (en) Electronic component housing package and electronic device
JP2006073659A (en) Package for housing electric element, electric element unit and electric element cooling module
JPH11289037A (en) Metal plate for heat dissipation and package for electronic component using the same

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050309

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20061122

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20061128

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20070403