JP2004119568A - Ceramic circuit board - Google Patents

Ceramic circuit board Download PDF

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Publication number
JP2004119568A
JP2004119568A JP2002278860A JP2002278860A JP2004119568A JP 2004119568 A JP2004119568 A JP 2004119568A JP 2002278860 A JP2002278860 A JP 2002278860A JP 2002278860 A JP2002278860 A JP 2002278860A JP 2004119568 A JP2004119568 A JP 2004119568A
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Prior art keywords
circuit board
ceramic
metal circuit
semiconductor element
solder
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JP2002278860A
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Japanese (ja)
Inventor
Masaya Ochi
越智　雅也
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Kyocera Corp
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Kyocera Corp
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Priority to JP2002278860A priority Critical patent/JP2004119568A/en
Publication of JP2004119568A publication Critical patent/JP2004119568A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32013—Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a ceramic circuit board which can be strongly bonded with a semiconductor device, makes suitable the temperature of the semiconductor device at all the time and is capable of normally and stably operating the semiconductor device for a long time. <P>SOLUTION: In the ceramic circuit board, a metal circuit board 2 is bonded on an upper surface of a ceramic wafer 1, and a semiconductor device 5 is packaged on an upper surface of the metal circuit board 2 via solder 4. On the upper surface of the metal circuit board 2, a frame-like groove 6 is formed to position an outer peripheral edge of the semiconductor device 5 between its inner periphery and its outer periphery. As a result, the semiconductor device and the metal circuit board are bonded via the solder in a three-dimensional manner, such that the semiconductor device is surely/strongly bonded on the ceramic circuit board. <P>COPYRIGHT: (C)2004,JPO

Description

【０００１】
【発明の属する技術分野】
本発明は、セラミック基板に金属回路板を接合して成り、この金属回路板の上面に半田を介して半導体素子が搭載されるるセラミック回路基板に関する。
【０００２】
【従来の技術】
近年、パワーモジュール用基板やスイッチングモジュール用基板等の回路基板として、セラミック基板上に活性金属ろう材を介して銅等から成る金属回路板を接合して成るセラミック回路基板が用いられている。
【０００３】
このようなセラミック回路基板は、具体的には以下の方法によって製作される。
まず、銀−銅合金にチタン・ジルコニウム・ハフニウムおよびこれらの水素化物の少なくとも１種を添加した活性金属粉末に有機溶剤・溶媒を添加混合して成る活性金属ろう材ペーストを準備する。
【０００４】
次に、例えばセラミック基板が酸化アルミニウム質焼結体から成る場合、酸化アルミニウム・酸化珪素・酸化マグネシウム・酸化カルシウム等の原料粉末に適当な有機バインダ・可塑剤・溶剤等を添加混合して泥漿状と成すとともにこれを従来周知のドクターブレード法やカレンダーロール法等のテープ成形技術を採用して複数のセラミックグリーンシートを得た後、これらを所定寸法に形成し、次にセラミックグリーンシートを必要に応じて上下に積層するとともに還元雰囲気中にて約１６００℃の温度で焼成し、セラミックグリーンシートを焼結一体化させてセラミック基板を形成する。
【０００５】
次に、セラミック基板に活性金属ろう材ペーストを所定のパターンに印刷するとともに乾燥し、しかる後、活性金属ろう材ペースト上に銅等から成る金属回路板を載置する。
【０００６】
そして最後に、セラミック基板と金属回路板との間に配されている活性金属ろう材ペーストを非酸化性雰囲気中にて約９００℃の温度に加熱して溶融させ、このろう材でセラミック基板と金属回路板とを接合することによって製作される。
【０００７】
このようにして製作されたセラミック回路基板は、これにＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ　Ｇａｔｅ　Ｂｉｐｏｌａｒ　Ｔｒａｎｓｉｓｔｏｒ）やＭＯＳ−ＦＥＴ（Ｍｅｔａｌ　Ｏｘｉｄｅ　Ｓｅｍｉｃｏｎｄｕｃｔｏｒ−Ｆｉｅｌｄ　Ｅｆｆｅｃｔ　Ｔｒａｎｓｉｓｔｏｒ）等の半導体素子が半田等の接着材を介して実装されることにより回路部品となる。
【０００８】
【特許文献１】
特開平７−３８０１３号公報
【０００９】
【発明が解決しようとする課題】
しかしながら、この従来のセラミック回路基板においては、半導体素子を半田を介して実装する際に、半田が大きく融け広がって半田厚みが５０μｍ未満の薄いものとなり、金属回路板と半導体素子とを強固に接合することが困難になり、その結果、半導体素子のＯＮ−ＯＦのスイッチング動作による熱が作用した場合に金属回路板と半導体素子との間の熱膨張係数の相違により熱応力が発生し、この応力を半田が吸収しきれずに半田にクラックが発生してしまうという問題点を有していた。
【００１０】
これに対して、半田の厚みを２５０μｍ程度と厚くした場合、上記問題点は解決できるものの、半田は熱伝達率が低いために、半導体素子の放熱を金属回路板に効率よく伝達できないために、半導体素子が熱破壊したり熱劣化してしまうという問題点を有していた。
【００１１】
本発明は上記従来技術の問題点に鑑み案出されたものであり、その目的は、セラミック回路基板と半導体素子とを強固に接合させることができるとともに、半導体素子を常に適温とし半導体素子を長期間にわたり正常、かつ安定に作動させることができるセラミック回路基板を提供することにある。
【００１２】
【課題を解決するための手段】
本発明のセラミック回路基板は、セラミック基板の上面に金属回路板が接合されて成り、この金属回路板の上面に半田を介して半導体素子が搭載されるセラミック回路基板において、前記金属回路板は、その上面に前記半導体素子の外周縁が内周と外周との間に位置する枠状の溝が形成されていることを特徴とするものである。
【００１３】
本発明のセラミック回路基板によれば、金属回路板は、その上面に半導体素子の外周縁が内周と外周との間に位置する枠状の溝が形成されていることから、半導体素子を金属回路板に半田を介して接続した際、半田が金属回路板の表面に大きく融け広がって厚みが５０μｍ未満の薄いものとなったとしても、枠状の溝に半田の溜りが形成され、半導体素子の外周部側面と金属回路板の表面との間に半田が介在して両者を接合し、その結果、半導体素子と金属回路板との半田を介しての接合が三次元的となって、半導体素子をセラミック回路基板に確実・強固に接合させることができる。また、半導体素子と金属回路板との間に介在する半田の厚みを５０μｍ程度と薄いものとすることができるので、セラミック回路基板に搭載された半導体素子が作動時に発生する熱は、金属回路板に効率良く伝達されることになり、その結果、半導体素子を常に適温として、長期間にわたり正常、かつ安定に作動させることが可能となる。
【００１４】
【発明の実施の形態】
次に、本発明のセラミック回路基板を添付の図面に基づいて詳細に説明する。
図１は、本発明のセラミック回路基板の実施の形態の一例を示す断面図であり、この図において、１はセラミック基板、２は金属回路板、３はろう材、４は半田、５は半導体素子であり、６は枠状の溝部である。
【００１５】
セラミック基板１は、その大きさが２０〜２００ｍｍ程度、厚みが０．２〜１．０ｍｍ程度の略四角形状であり、その表面に銅等の金属から成る金属回路板２がろう材３を介して接合される。
【００１６】
セラミック基板１は、金属回路板２を支持する支持部材として機能し、酸化アルミニウム（Ａｌ２Ｏ３）質焼結体・ムライト（３Ａｌ２Ｏ３・２ＳｉＯ２）質焼結体・炭化珪素（ＳｉＣ）質焼結体・窒化アルミニウム（ＡｌＮ）質焼結体・窒化珪素（Ｓｉ３Ｎ４）質焼結体等の電気絶縁材料で形成されている。
【００１７】
セラミック基板１は、例えば酸化アルミニウム質焼結体で形成されている場合、酸化アルミニウム・酸化珪素・酸化マグネシウム・酸化カルシウム等の原料粉末に適当な有機バインダ・可塑剤・溶剤を添加混合して泥漿状となすとともに、その泥漿物を用いて従来周知のドクターブレード法やカレンダーロール法を採用することによってセラミックグリーンシート（セラミック生シート）を得、しかる後、このセラミックグリーンシートに適当な打ち抜き加工を施すとともに、これを必要に応じて複数枚積層し、約１６００℃の高温で焼成することによって製作される。
【００１８】
セラミック基板１はその厚みを０．２〜１．０ｍｍとすることが、セラミック回路基板の小型化・薄型化の要求を満足するため、金属回路板２を接合したときのセラミック基板１の割れ抑制のため、および搭載される半導体素子５から発生する１００℃以上の熱の伝達性を向上させるためといった点で好ましい。セラミック基板１の厚みが０．２ｍｍ未満では、セラミック基板１に金属回路板２を接合したときに発生する熱応力により、セラミック基板１に割れやクラック等が発生しやすくなる傾向がある。他方、１．０ｍｍを超えると、セラミック回路基板の薄型化への対応が困難となるとともに、搭載される半導体素子５から発生する１００℃以上の熱を金属回路板２を介して良好に放熱することが困難となる傾向がある。
【００１９】
金属回路板２は、鉄・アルミニウム・銅あるいは銅合金等の金属から成り、好ましくは良導電性である銅あるいは銅合金を用いることが好ましい。
そして、このような金属回路板２のセラミック基板１への接合は次に述べる方法により行なわれる。
【００２０】
まず、銀−銅合金粉末等から成る銀ろう粉末や、アルミニウム−シリコン合金粉末等から成るアルミニウムろう粉末に、チタン・ジルコニウム・ハフニウム等の活性金属やその水素化物の少なくとも１種から成る活性金属粉末を２〜５重量％添加した活性金属ろう材に適当な有機溶剤・溶媒を添加混合して得た活性金属ろう材ペーストを、セラミック基板１の表面に従来周知のスクリーン印刷技術を用いて金属回路板２に対応した所定パターンに印刷する。
【００２１】
その後、金属回路板２をこの活性金属ろう材ペーストのパターン上に載置し、これを真空中、または中性雰囲気中もしくは還元雰囲気中で、所定温度（約９００℃）で加熱処理し、活性金属ろう材を溶融させてセラミック基板１の表面に金属回路板２を接合させる。これにより、セラミック基板１の表面に金属回路板２が活性金属ろう材３を介して接合されることとなる。
【００２２】
このような金属回路板２は、金属回路板２が例えば無酸素銅から成る場合は、無酸素銅のインゴット（塊）に圧延加工法や打ち抜き加工法等の従来周知の金属加工法を施すことによって、例えば、厚さが０．５ｍｍで、所望の回路配線パターン形状に製作される。
【００２３】
金属回路板２の厚みは、セラミック回路基板の小型化・薄型化の要求を満足するため、２０〜５０Ａといった大電流信号を伝達するための電気抵抗の仕様を満足するため、さらにはセラミック基板１と接合したときのセラミック基板１の割れ防止のためといった観点からは０．１〜１．０ｍｍが好ましい。金属回路板２の厚さが０．１ｍｍ未満では、電気抵抗が大きくなるため２０〜５０Ａといった大電流信号が良好に流れにくくなる傾向がある。他方、１．０ｍｍを超えると、薄型化への対応が困難となるとともに、セラミック基板１と金属回路板２とを接合したときに発生する熱応力により、セラミック基板１に割れ等が発生しやすくなる傾向がある。
【００２４】
なお、金属回路板２を無酸素銅から成るものとした場合には、無酸素銅はろう付けの際に活性金属ろう材３が無酸素銅中に存在する酸素により酸化されることなく濡れ性が良好となるため、セラミック基板１へ強固に接合できる。従って、セラミック基板１と金属回路板２との接合を活性金属ろう材３を介して行なう場合には、金属回路板２の材料としては無酸素銅を用いることが好ましい。
【００２５】
このようなセラミック回路基板の金属回路板２の上面には、半田を介して半導体素子５が搭載される。
半導体素子５の金属回路板２への接合は次に述べる方法により行なわれる。まず、従来周知の鉛−錫から成る半田ペーストを、金属回路板２の上面の半導体素子５の搭載部に従来周知のスクリーン印刷技術を用いて半導体素子５の形状に対応した所定パターンに印刷する。次に、半田上に半導体素子５を載置するとともに、約３００℃の温度で半田を加熱・溶融することにより、半導体素子５が金属回路板２の上面に接合される。
【００２６】
そして、本発明のセラミック回路基板おいては、金属回路板２は、その上面に半導体素子５の外周縁が内周と外周との間に位置する枠状の溝６が形成されている。また、このことが重要である。
【００２７】
本発明のセラミック回路基板によれば、金属回路板２は、その上面に半導体素子５の外周縁が内周と外周との間に位置する枠状の溝６が形成されていることから、半導体素子５を金属回路板２に半田４を介して接続した際、半田４が金属回路板２の表面に大きく融け広がって厚みが５０μｍ未満の薄いものとなったとしても、枠状の溝６に半田４の溜りが形成され、半導体素子５の外周部側面と金属回路板２の表面との間に半田４が介在して両者を接合し、その結果、半導体素子５と金属回路板２との半田４を介しての接合が三次元的となって、半導体素子５をセラミック回路基板に確実・強固に接合させることができる。また、半導体素子５と金属回路板２との間に介在する半田の厚みを５０μｍ程度と薄いものとすることができるので、セラミック回路基板に搭載された半導体素子５が作動時に発生する熱は、セラミック回路基板に効率良く伝達されることになり、その結果、半導体素子５を常に適温として、長期間にわたり正常、かつ安定に作動させることが可能となる。
【００２８】
なお、枠状の溝６の断面形状は、正方形や長方形等の四角形状や、Ｖ字型等の三角形、半円形、Ｕ字型等の略半円形であり、溝の幅は０．５〜０．８ｍｍ、深さは５０〜２００μｍが好ましい。
【００２９】
枠状の溝６の幅が０．５ｍｍ未満であると、溝６へ半田４が良好に溜りにくく周辺に広がってしまう傾向があり、０．８ｍｍを超えると半導体素子５の外周部の側面に半田が適正な高さに形成できなくなる傾向がある。また、深さが５０μｍ未満であると、溝６へ半田４が良好に溜りにくく周辺に広がってしまう傾向があり、２００μｍを超えると、溝６への半田量が多くなり半導体素子５外周部の放熱性が低下する傾向がある。従って、枠状の溝６の幅は０．５〜０．８ｍｍ、深さは５０〜２００μｍが好ましい。
【００３０】
また、枠状の溝６の外周は、半導体素子５の外周縁より０．２ｍｍ以上外側に位置することが好ましく、枠状の溝６の外周が半導体素子５の外周縁より０．２ｍｍ未満外側に位置する場合には、半田４が半導体素子５の外周部側面に良好に接合できなくなる傾向がある。
【００３１】
なお、このような枠状の溝６は、金属回路板２の表面をエッチングにより加工することにより、あるいは先端の断面形状が四角形状やＶ字形状・Ｕ字形状を有するブレードを用いて、例えばダイシング加工することにより形成される。
【００３２】
かくして本発明のセラミック回路基板によれば、セラミック基板と金属回路板との間に配されている活性金属ろう材ペーストを非酸化性雰囲気中にて約９００℃の温度に加熱して溶融させ、セラミック基板に金属回路板を接合することによって製作され、さらにこれに半導体素子等の電子部品を半田等の接着材を介して実装されることにより回路部品となる。
【００３３】
なお、本発明は上述の実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。
【００３４】
【発明の効果】
本発明のセラミック回路基板によれば、金属回路板は、その上面に半導体素子の外周縁が内周と外周との間に位置する枠状の溝が形成されていることから、半導体素子を金属回路板に半田を介して接続した際、半田が金属回路板の表面に大きく融け広がって厚みが５０μｍ未満の薄いものとなったとしても、枠状の溝に半田の溜りが形成され、半導体素子の外周部側面と金属回路板の表面との間に半田が介在して両者を接合し、その結果、半導体素子と金属回路板との半田を介しての接合が三次元的となって、半導体素子をセラミック回路基板に確実・強固に接合させることができる。また、半導体素子と金属回路板との間に介在する半田の厚みを５０μｍと薄いものとすることができるので、セラミック回路基板に搭載された半導体素子が作動時に発生する熱は、金属回路板に効率良く伝達されることになり、その結果、半導体素子を常に適温として、長期間にわたり正常、かつ安定に作動させることが可能となる。
【図面の簡単な説明】
【図１】本発明のセラミック回路基板の実施の形態の一例を示す断面図である。
【符号の説明】
１・・・・・セラミック基板
２・・・・・金属回路板
３・・・・・ろう材
４・・・・・半田
５・・・・・半導体素子
６・・・・・枠状の溝[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a ceramic circuit board formed by bonding a metal circuit board to a ceramic substrate and mounting a semiconductor element on the upper surface of the metal circuit board via solder.
[0002]
[Prior art]
In recent years, as a circuit board such as a power module board or a switching module board, a ceramic circuit board formed by bonding a metal circuit board made of copper or the like to a ceramic substrate via an active metal brazing material has been used.
[0003]
Such a ceramic circuit board is specifically manufactured by the following method.
First, an active metal brazing material paste is prepared by adding an organic solvent and a solvent to an active metal powder obtained by adding at least one of titanium, zirconium, hafnium and a hydride thereof to a silver-copper alloy.
[0004]
Next, for example, when the ceramic substrate is made of an aluminum oxide sintered body, an appropriate organic binder, a plasticizer, a solvent, etc. are added to raw material powders such as aluminum oxide, silicon oxide, magnesium oxide, calcium oxide, etc. After obtaining a plurality of ceramic green sheets by employing a tape forming technique such as a doctor blade method or a calender roll method, which are well known in the art, forming these into predetermined dimensions, and then requiring the ceramic green sheets The ceramic green sheets are stacked one upon another and fired at a temperature of about 1600 ° C. in a reducing atmosphere, and the ceramic green sheets are sintered and integrated to form a ceramic substrate.
[0005]
Next, the active metal brazing material paste is printed in a predetermined pattern on the ceramic substrate and dried, and then a metal circuit board made of copper or the like is placed on the active metal brazing material paste.
[0006]
Finally, the active metal brazing material paste disposed between the ceramic substrate and the metal circuit board is heated and melted at a temperature of about 900 ° C. in a non-oxidizing atmosphere. It is manufactured by joining a metal circuit board.
[0007]
In the ceramic circuit board manufactured in this manner, a semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOS-FET (Metal Oxide Semiconductor-Field Effect Transistor) is mounted on the ceramic circuit board via an adhesive such as solder. Thus, it becomes a circuit component.
[0008]
[Patent Document 1]
JP-A-7-38013
[Problems to be solved by the invention]
However, in this conventional ceramic circuit board, when a semiconductor element is mounted via solder, the solder is largely melted and spread, and the thickness of the solder is less than 50 μm, and the metal circuit board and the semiconductor element are firmly joined. As a result, when heat is generated by the ON-OF switching operation of the semiconductor element, a thermal stress is generated due to a difference in thermal expansion coefficient between the metal circuit board and the semiconductor element. However, there is a problem that solder cannot be completely absorbed and cracks are generated in the solder.
[0010]
On the other hand, when the thickness of the solder is increased to about 250 μm, although the above problem can be solved, since the heat transfer coefficient is low, the heat radiation of the semiconductor element cannot be efficiently transmitted to the metal circuit board. There has been a problem that the semiconductor element is thermally broken or thermally degraded.
[0011]
The present invention has been devised in view of the above-mentioned problems of the prior art, and an object of the present invention is to make it possible to firmly join a ceramic circuit board and a semiconductor element and to keep the semiconductor element at an appropriate temperature at all times to extend the length of the semiconductor element. An object of the present invention is to provide a ceramic circuit board that can be normally and stably operated over a period.
[0012]
[Means for Solving the Problems]
The ceramic circuit board of the present invention is formed by joining a metal circuit board to an upper surface of a ceramic substrate, and in the ceramic circuit board on which a semiconductor element is mounted via solder on the upper surface of the metal circuit board, the metal circuit board includes: The semiconductor device is characterized in that a frame-shaped groove is formed on an upper surface of the semiconductor device so that an outer edge of the semiconductor element is located between an inner periphery and an outer periphery.
[0013]
According to the ceramic circuit board of the present invention, since the metal circuit board has a frame-shaped groove in which the outer peripheral edge of the semiconductor element is located between the inner circumference and the outer circumference on the upper surface thereof, the semiconductor element is made of metal. When connected to a circuit board via solder, even if the solder is largely melted and spread on the surface of the metal circuit board and becomes thin with a thickness of less than 50 μm, a solder pool is formed in the frame-shaped groove, and the semiconductor element is formed. Solder is interposed between the outer peripheral side surface of the metal circuit board and the surface of the metal circuit board to join them. As a result, the bonding between the semiconductor element and the metal circuit board via the solder becomes three-dimensional, The element can be securely and firmly joined to the ceramic circuit board. Further, since the thickness of the solder interposed between the semiconductor element and the metal circuit board can be made as thin as about 50 μm, the heat generated when the semiconductor element mounted on the ceramic circuit board operates is reduced by the metal circuit board. As a result, the semiconductor element can be normally and stably operated for a long period of time with the semiconductor element always kept at an appropriate temperature.
[0014]
BEST MODE FOR CARRYING OUT THE INVENTION
Next, the ceramic circuit board of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a sectional view showing an example of an embodiment of a ceramic circuit board according to the present invention. In this figure, 1 is a ceramic board, 2 is a metal circuit board, 3 is a brazing material, 4 is solder, and 5 is a semiconductor. An element 6 is a frame-shaped groove.
[0015]
The ceramic substrate 1 has a substantially square shape with a size of about 20 to 200 mm and a thickness of about 0.2 to 1.0 mm, and a metal circuit board 2 made of a metal such as copper is provided on the surface thereof with a brazing material 3 interposed therebetween. Joined.
[0016]
Ceramic substrate 1 functions as a support member for supporting the metal circuit plate 2, aluminum oxide (Al 2 O 3) sintered material, mullite (3Al 2 O 3 · 2SiO 2 ) sintered material, silicon carbide (SiC ) Sintered body, aluminum nitride (AlN) based sintered body, silicon nitride (Si 3 N 4 ) based sintered body and the like.
[0017]
When the ceramic substrate 1 is formed of, for example, an aluminum oxide-based sintered body, an appropriate organic binder, a plasticizer, and a solvent are added to raw material powder such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide, and the mixture is mixed. A ceramic green sheet (ceramic green sheet) is obtained by using a doctor blade method or a calender roll method using the sludge, and then the ceramic green sheet is appropriately punched. It is manufactured by stacking a plurality of these as needed and firing at a high temperature of about 1600 ° C.
[0018]
The ceramic substrate 1 having a thickness of 0.2 to 1.0 mm satisfies the requirements for miniaturization and thinning of the ceramic circuit board. Therefore, the crack of the ceramic substrate 1 when the metal circuit board 2 is joined is suppressed. This is preferable from the viewpoint of improving the conductivity of heat of 100 ° C. or more generated from the semiconductor element 5 to be mounted. When the thickness of the ceramic substrate 1 is less than 0.2 mm, cracks, cracks, and the like tend to be easily generated in the ceramic substrate 1 due to thermal stress generated when the metal circuit board 2 is joined to the ceramic substrate 1. On the other hand, when the thickness exceeds 1.0 mm, it is difficult to cope with the reduction in thickness of the ceramic circuit board, and heat of 100 ° C. or more generated from the semiconductor element 5 mounted is radiated well through the metal circuit board 2. Tends to be difficult.
[0019]
The metal circuit board 2 is made of a metal such as iron, aluminum, copper, or a copper alloy, and is preferably made of copper or a copper alloy having good conductivity.
The bonding of the metal circuit board 2 to the ceramic substrate 1 is performed by the following method.
[0020]
First, an active metal powder comprising at least one of an active metal such as titanium, zirconium and hafnium and a hydride thereof is added to a silver brazing powder composed of a silver-copper alloy powder or the like, or an aluminum brazing powder composed of an aluminum-silicon alloy powder or the like. An active metal brazing material paste obtained by adding an appropriate organic solvent and a solvent to an active metal brazing material containing 2 to 5% by weight of a metal substrate is coated on the surface of the ceramic substrate 1 by a conventionally well-known screen printing technique. Printing is performed in a predetermined pattern corresponding to the plate 2.
[0021]
Thereafter, the metal circuit board 2 is placed on the pattern of the active metal brazing material paste, and this is heat-treated at a predetermined temperature (about 900 ° C.) in a vacuum or in a neutral atmosphere or a reducing atmosphere. The metal circuit board 2 is joined to the surface of the ceramic substrate 1 by melting the metal brazing material. As a result, the metal circuit board 2 is joined to the surface of the ceramic substrate 1 via the active metal brazing material 3.
[0022]
In the case where the metal circuit board 2 is made of, for example, oxygen-free copper, such a metal circuit board 2 is formed by applying a conventionally known metal processing method such as a rolling method or a punching method to an oxygen-free copper ingot. Thus, for example, it is manufactured in a desired circuit wiring pattern shape with a thickness of 0.5 mm.
[0023]
The thickness of the metal circuit board 2 satisfies the requirements for miniaturization and thinning of the ceramic circuit board, the electrical resistance for transmitting a large current signal such as 20 to 50 A, and the ceramic board 1. The thickness is preferably 0.1 to 1.0 mm from the viewpoint of preventing cracking of the ceramic substrate 1 when joined to the substrate. If the thickness of the metal circuit board 2 is less than 0.1 mm, the electric resistance is increased, so that a large current signal of 20 to 50 A tends to be difficult to flow favorably. On the other hand, if the thickness exceeds 1.0 mm, it is difficult to cope with the reduction in thickness, and cracks and the like are likely to occur in the ceramic substrate 1 due to thermal stress generated when the ceramic substrate 1 and the metal circuit board 2 are joined. Tend to be.
[0024]
When the metal circuit board 2 is made of oxygen-free copper, the oxygen-free copper is wetted without being oxidized by the oxygen present in the oxygen-free copper during the brazing. Is improved, so that the ceramic substrate 1 can be firmly joined. Therefore, when joining the ceramic substrate 1 and the metal circuit board 2 via the active metal brazing material 3, it is preferable to use oxygen-free copper as the material of the metal circuit board 2.
[0025]
The semiconductor element 5 is mounted on the upper surface of the metal circuit board 2 of such a ceramic circuit board via solder.
The bonding of the semiconductor element 5 to the metal circuit board 2 is performed by the following method. First, a conventionally well-known solder paste made of lead-tin is printed on a mounting portion of the semiconductor element 5 on the upper surface of the metal circuit board 2 in a predetermined pattern corresponding to the shape of the semiconductor element 5 using a conventionally well-known screen printing technique. . Next, the semiconductor element 5 is mounted on the solder, and the semiconductor element 5 is bonded to the upper surface of the metal circuit board 2 by heating and melting the solder at a temperature of about 300 ° C.
[0026]
In the ceramic circuit board of the present invention, the metal circuit board 2 has a frame-shaped groove 6 on the upper surface of which the outer periphery of the semiconductor element 5 is located between the inner periphery and the outer periphery. This is also important.
[0027]
According to the ceramic circuit board of the present invention, since the metal circuit board 2 has the frame-shaped groove 6 in which the outer periphery of the semiconductor element 5 is located between the inner periphery and the outer periphery, the semiconductor circuit 5 is formed on the upper surface thereof. When the element 5 is connected to the metal circuit board 2 via the solder 4, even if the solder 4 is largely melted and spread on the surface of the metal circuit board 2 and becomes thin with a thickness of less than 50 μm, A pool of the solder 4 is formed, and the solder 4 is interposed between the outer peripheral side surface of the semiconductor element 5 and the surface of the metal circuit board 2 to join them. As a result, the semiconductor element 5 and the metal circuit board 2 The bonding via the solder 4 becomes three-dimensional, so that the semiconductor element 5 can be securely and firmly bonded to the ceramic circuit board. Further, since the thickness of the solder interposed between the semiconductor element 5 and the metal circuit board 2 can be reduced to about 50 μm, the heat generated when the semiconductor element 5 mounted on the ceramic circuit board operates is As a result, the semiconductor element 5 is always transmitted to the ceramic circuit board at an appropriate temperature, and can be normally and stably operated for a long period of time.
[0028]
The cross-sectional shape of the frame-shaped groove 6 is a square shape such as a square or a rectangle, a triangle such as a V-shape, a semi-circle, or a substantially semi-circle such as a U-shape. 0.8 mm and a depth of 50 to 200 μm are preferable.
[0029]
When the width of the frame-shaped groove 6 is less than 0.5 mm, the solder 4 tends to hardly accumulate in the groove 6 and tends to spread to the periphery. There is a tendency that solder cannot be formed at an appropriate height. On the other hand, if the depth is less than 50 μm, the solder 4 tends to hardly accumulate in the groove 6 and spread to the periphery. If the depth exceeds 200 μm, the amount of solder in the groove 6 increases and the outer peripheral portion of the semiconductor element 5 The heat dissipation tends to decrease. Therefore, the width of the frame-shaped groove 6 is preferably 0.5 to 0.8 mm, and the depth is preferably 50 to 200 μm.
[0030]
Further, the outer periphery of the frame-shaped groove 6 is preferably located at least 0.2 mm outside the outer periphery of the semiconductor element 5, and the outer periphery of the frame-shaped groove 6 is less than 0.2 mm outside the outer periphery of the semiconductor element 5. In such a case, there is a tendency that the solder 4 cannot be satisfactorily joined to the outer peripheral side surface of the semiconductor element 5.
[0031]
Note that such a frame-shaped groove 6 is formed by processing the surface of the metal circuit board 2 by etching, or by using a blade having a rectangular or V-shaped or U-shaped cross-section at the tip end, for example. It is formed by dicing.
[0032]
Thus, according to the ceramic circuit board of the present invention, the active metal brazing material paste disposed between the ceramic substrate and the metal circuit board is heated to about 900 ° C. in a non-oxidizing atmosphere and melted, It is manufactured by bonding a metal circuit board to a ceramic substrate, and electronic components such as semiconductor elements are mounted on the ceramic substrate via an adhesive such as solder to form circuit components.
[0033]
The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention.
[0034]
【The invention's effect】
According to the ceramic circuit board of the present invention, since the metal circuit board has a frame-shaped groove in which the outer peripheral edge of the semiconductor element is located between the inner circumference and the outer circumference on the upper surface thereof, the semiconductor element is made of metal. When connected to a circuit board via solder, even if the solder is largely melted and spread on the surface of the metal circuit board and becomes thin with a thickness of less than 50 μm, a solder pool is formed in the frame-shaped groove, and the semiconductor element is formed. Solder is interposed between the outer peripheral side surface of the metal circuit board and the surface of the metal circuit board to join them. As a result, the bonding between the semiconductor element and the metal circuit board via the solder becomes three-dimensional, The element can be securely and firmly joined to the ceramic circuit board. Further, since the thickness of the solder interposed between the semiconductor element and the metal circuit board can be made as thin as 50 μm, the heat generated when the semiconductor element mounted on the ceramic circuit board operates is transferred to the metal circuit board. As a result, the semiconductor device can be operated normally and stably over a long period of time with the semiconductor element always kept at an appropriate temperature.
[Brief description of the drawings]
FIG. 1 is a sectional view showing an example of an embodiment of a ceramic circuit board of the present invention.
[Explanation of symbols]
1 Ceramic substrate 2 Metal circuit board 3 Brazing material 4 Solder 5 Semiconductor element 6 Frame groove

Claims (1)

セラミック基板の上面に金属回路板が接合されて成り、該金属回路板の上面に半田を介して半導体素子が搭載されるセラミック回路基板において、前記金属回路板は、その上面に前記半導体素子の外周縁が内周と外周との間に位置する枠状の溝が形成されていることを特徴とするセラミック回路基板。A metal circuit board is formed by bonding a metal circuit board to an upper surface of a ceramic substrate, and a semiconductor element is mounted on the upper surface of the metal circuit board via solder. A ceramic circuit board, wherein a frame-shaped groove whose peripheral edge is located between an inner periphery and an outer periphery is formed.
JP2002278860A 2002-09-25 2002-09-25 Ceramic circuit board Pending JP2004119568A (en)

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