JP2002158567A5 - - Google Patents

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Publication number
JP2002158567A5
JP2002158567A5 JP2000352307A JP2000352307A JP2002158567A5 JP 2002158567 A5 JP2002158567 A5 JP 2002158567A5 JP 2000352307 A JP2000352307 A JP 2000352307A JP 2000352307 A JP2000352307 A JP 2000352307A JP 2002158567 A5 JP2002158567 A5 JP 2002158567A5
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000352307A
Other versions
JP3815209B2 (ja
JP2002158567A (ja
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Publication date
Application filed filed Critical
Priority to JP2000352307A priority Critical patent/JP3815209B2/ja
Priority claimed from JP2000352307A external-priority patent/JP3815209B2/ja
Priority to US10/005,471 priority patent/US6895523B2/en
Priority to KR10-2001-0071693A priority patent/KR100430609B1/ko
Priority to CNB011436093A priority patent/CN1225085C/zh
Publication of JP2002158567A publication Critical patent/JP2002158567A/ja
Publication of JP2002158567A5 publication Critical patent/JP2002158567A5/ja
Application granted granted Critical
Publication of JP3815209B2 publication Critical patent/JP3815209B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2000352307A 2000-11-20 2000-11-20 クロック信号からのパルス信号の生成 Expired - Fee Related JP3815209B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2000352307A JP3815209B2 (ja) 2000-11-20 2000-11-20 クロック信号からのパルス信号の生成
US10/005,471 US6895523B2 (en) 2000-11-20 2001-11-06 Generation of pulse signals from a clock signal
KR10-2001-0071693A KR100430609B1 (ko) 2000-11-20 2001-11-19 클록 신호로부터의 펄스 신호 생성 회로
CNB011436093A CN1225085C (zh) 2000-11-20 2001-11-20 从时钟信号生成脉冲信号的电路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000352307A JP3815209B2 (ja) 2000-11-20 2000-11-20 クロック信号からのパルス信号の生成

Publications (3)

Publication Number Publication Date
JP2002158567A JP2002158567A (ja) 2002-05-31
JP2002158567A5 true JP2002158567A5 (ja) 2005-07-21
JP3815209B2 JP3815209B2 (ja) 2006-08-30

Family

ID=18825228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000352307A Expired - Fee Related JP3815209B2 (ja) 2000-11-20 2000-11-20 クロック信号からのパルス信号の生成

Country Status (4)

Country Link
US (1) US6895523B2 (ja)
JP (1) JP3815209B2 (ja)
KR (1) KR100430609B1 (ja)
CN (1) CN1225085C (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6622160B1 (en) 1999-07-30 2003-09-16 Microsoft Corporation Methods for routing items for communications based on a measure of criticality
JP4480341B2 (ja) * 2003-04-10 2010-06-16 日立プラズマディスプレイ株式会社 プラズマディスプレイ装置
JP2007306580A (ja) * 2003-07-14 2007-11-22 Nec Corp 周波数シンセサイザ
JP4149430B2 (ja) * 2003-12-04 2008-09-10 シャープ株式会社 パルス出力回路、それを用いた表示装置の駆動回路、表示装置、およびパルス出力方法
US7030676B2 (en) * 2003-12-31 2006-04-18 Intel Corporation Timing circuit for separate positive and negative edge placement in a switching DC-DC converter
US7421610B2 (en) * 2005-07-21 2008-09-02 Freescale Semiconductor, Inc. Clock generation circuit
US7366966B2 (en) * 2005-10-11 2008-04-29 Micron Technology, Inc. System and method for varying test signal durations and assert times for testing memory devices
KR100723537B1 (ko) 2006-09-12 2007-05-30 삼성전자주식회사 클럭 신호 발생 방법 및 장치와 이를 이용한 클럭 주파수제어 방법 및 장치
CN101577792B (zh) * 2008-05-06 2011-01-19 通嘉科技股份有限公司 操作模式的判断装置及其判断方法
KR200451836Y1 (ko) * 2008-10-22 2011-01-13 이재호 야간 식별이 용이한 보안등용 자동 점멸기
CN102571041B (zh) * 2010-12-22 2015-02-04 上海华虹宏力半导体制造有限公司 检测电路延时和时序的方法及采用该方法校准延时的方法
JP2013165570A (ja) * 2012-02-10 2013-08-22 Toshiba Corp 半導体集積回路装置、dc−dcコンバータおよび電圧変換方法
CN106374898B (zh) * 2016-10-18 2019-08-20 天津大学 多通道输出选通开关时序产生结构
CN111464153A (zh) * 2020-05-14 2020-07-28 京东方科技集团股份有限公司 脉冲信号生成电路、方法、时钟生成模组和显示装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5357196A (en) * 1991-08-06 1994-10-18 Jeco Company Limited Circuit for converting a frequency of an input signal so a signal having a digital value corresponding to the frequency
JP3338776B2 (ja) * 1998-03-12 2002-10-28 日本電気株式会社 半導体装置
WO2000042609A1 (fr) * 1999-01-18 2000-07-20 Fujitsu Limited Procede et dispositif de commande de signal reproduit
JP3358590B2 (ja) * 1999-06-18 2002-12-24 日本電気株式会社 半導体集積回路
US6526468B1 (en) * 1999-12-15 2003-02-25 Robotel Electronique Inc. Peripheral bus extender
US6759911B2 (en) * 2001-11-19 2004-07-06 Mcron Technology, Inc. Delay-locked loop circuit and method using a ring oscillator and counter-based delay
US6727740B2 (en) * 2002-08-29 2004-04-27 Micron Technology, Inc. Synchronous mirror delay (SMD) circuit and method including a ring oscillator for timing coarse and fine delay intervals

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