JP2001501043A - 半導体デバイスアセンブリ及び回路 - Google Patents
半導体デバイスアセンブリ及び回路Info
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- JP2001501043A JP2001501043A JP11506785A JP50678599A JP2001501043A JP 2001501043 A JP2001501043 A JP 2001501043A JP 11506785 A JP11506785 A JP 11506785A JP 50678599 A JP50678599 A JP 50678599A JP 2001501043 A JP2001501043 A JP 2001501043A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
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- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
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- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1. 容器内に、第1及び第2の構成本体、マウンティングパッド、及びリードフ レームの導体リードを具え、第1の構成本体がその構成本体の底面主電極と反対 側の主表面に位置する上面主電極及び制御電極を有する半導体素子を具え、第2 の構成本体がその構成本体の底面主電極と反対側の主表面に少なくとも上面主電 極を有する半導体素子を具え、第1及び第2の構成本体の各上面主電極及び制御 電極がそれぞれのボンディングパッドを有し、これらのボンディングパッドにり ードレインフレームのそれぞれの導体リードからそれぞれの電気接続線が接着さ れ、第1の構成本体がマウンティングパッド上に、その底面主電極がマウンティ ングパッドに接着されて装着され、第2の構成本体が第1の構成本体の一部分上 に、第1の構成本体の上面主電極及び制御電極のボンディングパッドを覆わない ように装着され、第2の構成本体の底面主電極が第1の構成本体の上面主電極に 接着されていることを特徴とする半導体デバイスアセンブリ。 2. 第1の構成本体が、第1の構成本体の前記反対側の主表面に隣接するととも に第2の構成本体が装着される部分に隣接して位置する温度センサを有する熱過 負荷保護回路を具えていることを特徴とする請求項1記載の半導体デバイスアセ ンブリ。 3. 第1の構成本体が第1の構成本体の一主表面に共通の底面主電極を有すると ともに反対側の主表面に各別の上面主電極を有する2つの半導体素子を具え、第 2の構成本体が第1の構成本体の2つの半導体素子の一方の素子が位置する部分 に装着されていることを特徴とする請求項1又は2記載の半導体でアセンブリ。 4. 第3の構成本体が第1の構成本体の2つの半導体素子の他方の素子が存在す る部分に装着され、第3の構成本体がその構成本体の底面主電極と反対側の主表 面に位置する上面主電極及び制御電極を有する半導体素子を具え、リードフレー ムのそれぞれの導体リードから第3の構成本体の上面主電極及び制御電極にそれ ぞれの電気接続線が接着され、且つ第3の構成本体の底面主電極が第1の構成本 体の2つの半導体素子の前記他方の素子の上面主電極に、前記他方の素子の上面 主電極及び制御電極のボンディングパッドは覆わないように接着されていること を特徴とする請求項3記載の半導体デバイスアセンブリ。 5. 第1の構成本体の2つの半導体素子が両素子に共通のボンディングパッドを 有する制御電極を有することを特徴とする請求項3又は4記載の半導体でアセン ブリ。 6. 第2の構成本体の半導体素子がその上面主電極と同一の主表面に位置する制 御電極を有し、該制御電極がボンディングパッドを有し、このボンディングパッ ドにリードフレームの関連する導体リードから電気接続線が接着されていること を特徴とする請求項1記載の半導体デバイスアセンブリ。 7. 電気的に且つ熱的に伝導性の接着剤又ははんだの中間層によって第1の構成 本体の上面主電極がその上に接着される構成本体の底面主電極に接着されている ことを特徴とする請求項1記載の半導体デバイスアセンブリ。 8. 請求項6記載の半導体デバイスアセンブリを具え、電気モータが関連する導 体リードを経て第1の構成本体の上面主電極のボンディングパッドに結合されて いることを特徴とする電気モータ駆動用ハーフブリッジドライバ回路。 9. 請求項3記載の半導体デバイスアセンブリを具え、ソレノイドコイルが関連 する導体リードを経て第1の構成本体の上面主電極のボンディングパッドに結合 されていることを特徴とするソレノイドコイル駆動用ソレノイドドライバ回路。 10.請求項4記載の半導体デバイスアセンブリを具え、電気モータが関連する導 体リードを経て第1の構成本体の2つの半導体素子の上面主電極のボンディング パッドに結合されていることを特徴とする電気モータ駆動用フルブリッジドライ バ回路。 11.請求項1記載の半導体デバイスアセンブリを具え、出力電圧レベル端子が関 連する導体リードを経て第1の構成本体の上面主電極のボンディングパッドに結 合されていることを特徴とする電圧レベル変換回路。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9715168.2 | 1997-07-19 | ||
GB9715168A GB9715168D0 (en) | 1997-07-19 | 1997-07-19 | Semiconductor device assemblies and circuits |
GBGB9801240.4A GB9801240D0 (en) | 1998-01-22 | 1998-01-22 | Semiconductor device assemblies and circuits |
GB9801240.4 | 1998-01-22 | ||
PCT/IB1998/000994 WO1999004433A2 (en) | 1997-07-19 | 1998-06-29 | Mcm semiconductor device assemblies and circuits |
Publications (2)
Publication Number | Publication Date |
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JP2001501043A true JP2001501043A (ja) | 2001-01-23 |
JP4014652B2 JP4014652B2 (ja) | 2007-11-28 |
Family
ID=26311900
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50678599A Expired - Lifetime JP4014652B2 (ja) | 1997-07-19 | 1998-06-29 | 半導体デバイスアセンブリ及び回路 |
Country Status (6)
Country | Link |
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US (1) | US6055148A (ja) |
EP (1) | EP0927433B1 (ja) |
JP (1) | JP4014652B2 (ja) |
KR (1) | KR100632137B1 (ja) |
DE (1) | DE69832359T2 (ja) |
WO (1) | WO1999004433A2 (ja) |
Cited By (8)
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WO2007007445A1 (ja) * | 2005-07-07 | 2007-01-18 | Sanken Electric Co., Ltd. | 半導体装置及びその製法 |
WO2007010646A1 (ja) * | 2005-07-15 | 2007-01-25 | Sanken Electric Co., Ltd. | 半導体装置 |
JP2008244388A (ja) * | 2007-03-29 | 2008-10-09 | Nec Electronics Corp | 半導体装置 |
JP2008252115A (ja) * | 2008-05-19 | 2008-10-16 | Sanken Electric Co Ltd | 半導体装置及びその製法 |
JP2008258643A (ja) * | 2008-05-19 | 2008-10-23 | Sanken Electric Co Ltd | 半導体装置 |
JP2009295961A (ja) * | 2008-05-08 | 2009-12-17 | Denso Corp | 半導体装置およびその製造方法 |
WO2010084550A1 (ja) * | 2009-01-22 | 2010-07-29 | サンケン電気株式会社 | 半導体モジュール及びその制御方法 |
JP2019145547A (ja) * | 2018-02-16 | 2019-08-29 | 富士電機株式会社 | 積層型集積回路 |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2000164800A (ja) | 1998-11-30 | 2000-06-16 | Mitsubishi Electric Corp | 半導体モジュール |
DE19935100B4 (de) * | 1999-07-27 | 2004-10-28 | Infineon Technologies Ag | Halbbrückenkonfiguration |
US6392864B1 (en) * | 1999-09-10 | 2002-05-21 | Alliedsignal Truck Brake Systems Co. | Electrical driver circuit for direct acting cantilever solenoid valve |
DE10030875C1 (de) * | 2000-06-23 | 2002-03-07 | Compact Dynamics Gmbh | Halbbrückenbaugruppe |
JP4146607B2 (ja) * | 2000-07-28 | 2008-09-10 | 三菱電機株式会社 | パワーモジュール |
DE10038968A1 (de) * | 2000-08-10 | 2002-03-07 | Infineon Technologies Ag | Schaltungsanordnung mit wenigstens zwei Halbleiterkörpern und einem Kühlkörper |
EP1221718A1 (en) * | 2001-01-08 | 2002-07-10 | STMicroelectronics S.r.l. | Integrated power device with improved efficiency and reduced overall dimensions |
KR20030031234A (ko) * | 2001-10-12 | 2003-04-21 | 주식회사 만도 | 고속 턴 온 다이오드를 이용한 솔레노이드 구동장치 |
ITMI20012284A1 (it) * | 2001-10-30 | 2003-04-30 | St Microelectronics Srl | Metodo per il perfezionamento della connessione elettrica tra un dispositivo elettronico di potenza ed il suo package |
JP2003258180A (ja) * | 2002-02-27 | 2003-09-12 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP2005011986A (ja) * | 2003-06-19 | 2005-01-13 | Sanyo Electric Co Ltd | 半導体装置 |
EP1657750B1 (en) * | 2003-08-18 | 2018-12-05 | Sanken Electric Co., Ltd. | Semiconductor device |
KR100618435B1 (ko) * | 2004-06-01 | 2006-08-30 | 국방과학연구소 | 직류 전동기 구동장치 |
US7511361B2 (en) * | 2005-01-05 | 2009-03-31 | Xiaotian Zhang | DFN semiconductor package having reduced electrical resistance |
US20060145312A1 (en) * | 2005-01-05 | 2006-07-06 | Kai Liu | Dual flat non-leaded semiconductor package |
US7898092B2 (en) * | 2007-11-21 | 2011-03-01 | Alpha & Omega Semiconductor, | Stacked-die package for battery power management |
US7884454B2 (en) | 2005-01-05 | 2011-02-08 | Alpha & Omega Semiconductor, Ltd | Use of discrete conductive layer in semiconductor device to re-route bonding wires for semiconductor device package |
ATE412648T1 (de) | 2005-03-21 | 2008-11-15 | Pfizer Ltd | Substituierte triazolderivate als oxytocinantagonisten |
US8901699B2 (en) | 2005-05-11 | 2014-12-02 | Cree, Inc. | Silicon carbide junction barrier Schottky diodes with suppressed minority carrier injection |
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- 1998-06-29 KR KR1019997002339A patent/KR100632137B1/ko not_active IP Right Cessation
- 1998-06-29 DE DE69832359T patent/DE69832359T2/de not_active Expired - Fee Related
- 1998-06-29 WO PCT/IB1998/000994 patent/WO1999004433A2/en active IP Right Grant
- 1998-06-29 JP JP50678599A patent/JP4014652B2/ja not_active Expired - Lifetime
- 1998-06-29 EP EP98925881A patent/EP0927433B1/en not_active Expired - Lifetime
- 1998-07-16 US US09/116,768 patent/US6055148A/en not_active Expired - Lifetime
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WO2007007445A1 (ja) * | 2005-07-07 | 2007-01-18 | Sanken Electric Co., Ltd. | 半導体装置及びその製法 |
KR100983959B1 (ko) * | 2005-07-15 | 2010-09-27 | 산켄덴키 가부시키가이샤 | 반도체 장치 |
WO2007010646A1 (ja) * | 2005-07-15 | 2007-01-25 | Sanken Electric Co., Ltd. | 半導体装置 |
US8143645B2 (en) | 2005-07-15 | 2012-03-27 | Sanken Electric Co., Ltd. | Semiconductor device having a stacked multi structure that has layered insulated gate-type bipolar transistors |
JP2008244388A (ja) * | 2007-03-29 | 2008-10-09 | Nec Electronics Corp | 半導体装置 |
JP2009295961A (ja) * | 2008-05-08 | 2009-12-17 | Denso Corp | 半導体装置およびその製造方法 |
JP4600576B2 (ja) * | 2008-05-08 | 2010-12-15 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP2008258643A (ja) * | 2008-05-19 | 2008-10-23 | Sanken Electric Co Ltd | 半導体装置 |
JP2008252115A (ja) * | 2008-05-19 | 2008-10-16 | Sanken Electric Co Ltd | 半導体装置及びその製法 |
WO2010084550A1 (ja) * | 2009-01-22 | 2010-07-29 | サンケン電気株式会社 | 半導体モジュール及びその制御方法 |
JP2010171169A (ja) * | 2009-01-22 | 2010-08-05 | Sanken Electric Co Ltd | 半導体モジュール及びその制御方法 |
JP2019145547A (ja) * | 2018-02-16 | 2019-08-29 | 富士電機株式会社 | 積層型集積回路 |
JP7059677B2 (ja) | 2018-02-16 | 2022-04-26 | 富士電機株式会社 | 積層型集積回路 |
Also Published As
Publication number | Publication date |
---|---|
DE69832359T2 (de) | 2006-08-03 |
WO1999004433A2 (en) | 1999-01-28 |
EP0927433A2 (en) | 1999-07-07 |
EP0927433B1 (en) | 2005-11-16 |
DE69832359D1 (de) | 2005-12-22 |
KR20000068590A (ko) | 2000-11-25 |
KR100632137B1 (ko) | 2006-10-19 |
WO1999004433A3 (en) | 1999-04-15 |
US6055148A (en) | 2000-04-25 |
JP4014652B2 (ja) | 2007-11-28 |
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