JP2001313282A - Method of dry etching - Google Patents
Method of dry etchingInfo
- Publication number
- JP2001313282A JP2001313282A JP2000128792A JP2000128792A JP2001313282A JP 2001313282 A JP2001313282 A JP 2001313282A JP 2000128792 A JP2000128792 A JP 2000128792A JP 2000128792 A JP2000128792 A JP 2000128792A JP 2001313282 A JP2001313282 A JP 2001313282A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- dry etching
- etching method
- material layer
- etched
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、ドライエッチング
方法に関し、特に、Ir等からなる貴金属材料膜やPb
(Zr1-x Tix )O3 等の強誘電体膜、フェライト系
強磁性体膜のようにドライエッチングが困難な材料の膜
のドライエッチング方法に関する関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dry etching method and, more particularly, to a noble metal material film made of Ir or the like and Pb.
The present invention relates to a method for dry-etching a film of a material which is difficult to dry-etch, such as a ferroelectric film such as (Zr 1-x Ti x ) O 3 and a ferrite-based ferromagnetic film.
【0002】[0002]
【従来の技術】強誘電体メモリ(FeRAM)のメモリ
セル・キャパシタの誘電体にはPb(Zr1-x TiX )
O3 等が用いられ、また、4ギガビット以上の集積度を
有するDRAMには、その誘電体として(Bax Sr
1-x )TiО3 等が用いられているが、それらキャパシ
タの電極材料として、前者についてはPtやIr等の貴
金属が、後者についてもPt等が用いられている。高集
積化のためには、これら電極材料や誘電体材料の微細加
工が必要であるが、これらの電極材料や誘電体材料は反
応性が低いため反応性のドライエッチングで加工するこ
とが困難である。ドライエッチングは通常Cl、Br、
Fを含むガスを用いたプラズマ中で行われるが、例え
ば、Irの反応生成物であるIrClは常温での蒸気圧
が1.3Pa(10-2Torr)以下と低いため、これ
らが気化してエッチングがスムーズに進行する状況には
ならないからである。これは、例えばAlの反応生成物
であるAlClの蒸気圧が常温で13000Pa(10
2 Torr)以上あるためドライエッチングが容易であ
ることと対照的である。また、IrやPtはそれら自体
の反応性が低いため、反応性ガス中のイオンによってス
パッタエッチされるという効果が大きい。そのため、こ
れらの貴金属のエッチングには、実用的なエッチレート
が得られるガスであるCl2等と、スパッタエッチ効果
を利用できるArとの混合ガスを用いた反応性イオンエ
ッチング(RIE=reactive ion etc
hing)が一般的に採用されている。この際、エッチ
ングマスクとしてやフォトレジストやTiN等を用いた
ハードマスクが用いられる。2. Description of the Related Art Pb (Zr 1 -x Ti x ) is used as a dielectric of a memory cell capacitor of a ferroelectric memory (FeRAM).
O 3 or the like is used, also, the DRAM having 4 gigabits degree of integration, as its dielectric (Ba x Sr
1-x) is TiO 3 or the like is used as an electrode material thereof capacitors, noble metals such as Pt and Ir for the former is, Pt or the like is used also for the latter. For high integration, fine processing of these electrode materials and dielectric materials is necessary. However, these electrode materials and dielectric materials have low reactivity and are difficult to process by reactive dry etching. is there. Dry etching is usually Cl, Br,
The reaction is performed in a plasma using a gas containing F. For example, IrCl, which is a reaction product of Ir, has a low vapor pressure at room temperature of 1.3 Pa (10 -2 Torr) or less. This is because the etching does not proceed smoothly. This is because, for example, the vapor pressure of AlCl, a reaction product of Al, is 13,000 Pa (10
2 Torr) or more, which is in contrast to easy dry etching. In addition, Ir and Pt have low reactivity, and therefore have a great effect of being sputter-etched by ions in the reactive gas. For this reason, reactive ion etching (RIE = reactive ion etc) using a mixed gas of Cl 2 or the like, which is a gas capable of obtaining a practical etch rate, and Ar capable of utilizing a sputter etch effect is used for etching these noble metals.
hing) is generally adopted. At this time, a hard mask using a photoresist, TiN, or the like is used as an etching mask.
【0003】図3は、レジストマスクを用いた従来のエ
ッチング方法を示す工程順の断面図である。まず、図3
(a)に示すように、下地となるシリコン酸化膜等から
なる層間絶縁膜11上に、被エッチング層であるIr層
12を堆積し、次いで、図3(b)に示すように、Ir
層12上にフォトレジスト膜15を形成する。次に、図
3(c)に示すように、Cl2とArの混合ガスを用い
て反応性イオンエッチングを行う。この場合のレジスト
膜の厚さは1μm程度である。そして、図3(d)に示
すように、Ir層12のエッチングが終了した後に、図
3(e)に示されるように、酸素プラズマ中でアッシン
グ処理を行ってフォトレジスト膜15を除去する。FIG. 3 is a sectional view showing a conventional etching method using a resist mask in the order of steps. First, FIG.
As shown in FIG. 3A, an Ir layer 12 to be etched is deposited on an interlayer insulating film 11 made of a silicon oxide film or the like serving as a base, and then, as shown in FIG.
A photoresist film 15 is formed on the layer 12. Next, as shown in FIG. 3C, reactive ion etching is performed using a mixed gas of Cl 2 and Ar. In this case, the thickness of the resist film is about 1 μm. Then, as shown in FIG. 3D, after the etching of the Ir layer 12 is completed, as shown in FIG. 3E, the photoresist film 15 is removed by performing an ashing process in oxygen plasma.
【0004】図4は、TiNハードマスクを用いた従来
のエッチング方法を示す工程順の断面図である。図4
(a)は図3(a)と同じである。図4(b)に示すよ
うに、Ir層12上にハードマスクとなるTiN層14
を成膜した後、図4(c)に示すように、TiN層14
上にフォトレジスト膜15を形成する。次に、図4
(d)に示すように、例えばCF4 ガス等を用いた反応
性イオンエッチングにより、TiN層14をパターニン
グする。次いで、図4(e)に示すように、レジスト膜
15をアッシング除去する。その後、図4(f)、
(g)に示すように、例えば、Cl2 とArとO2 の混
合ガスを用いた反応性イオンエッチングにより、Ir層
12をパターニングする。この場合のTiNマスクの厚
さは200nm程度である。FIG. 4 is a sectional view showing a conventional etching method using a TiN hard mask in the order of steps. FIG.
(A) is the same as FIG. 3 (a). As shown in FIG. 4B, a TiN layer 14 serving as a hard mask is formed on the Ir layer 12.
After the film is formed, as shown in FIG.
A photoresist film 15 is formed thereon. Next, FIG.
As shown in (d), the TiN layer 14 is patterned by, for example, reactive ion etching using CF 4 gas or the like. Next, as shown in FIG. 4E, the resist film 15 is removed by ashing. Then, FIG.
As shown in (g), for example, the Ir layer 12 is patterned by reactive ion etching using a mixed gas of Cl 2 , Ar, and O 2 . In this case, the thickness of the TiN mask is about 200 nm.
【0005】[0005]
【発明が解決しようとする課題】上述した従来のエッチ
ング方法では、図3(c)〜(e)にその断面形状を示
したように、エッチングにおける反応生成物やスパッタ
エッチされた貴金属の混合物が、レジストマスクの側壁
に再付着して、いわゆる側壁再付着層16が形成され
る。その要因は、貴金属Irやそれとの反応生成物であ
るIrCl等の蒸気圧が極めて低く揮発しにくいことで
ある。更にこの付着層は、図3(e)に示すように、フ
ォトレジストのアッシング処理によっても除去されな
い。この付着層を除去するために、図5(a)〜(c)
に示すように、例えば、ブラシスクラブ等の機械的除去
方法が行なわれている。しかし、図5(c)に示される
ように、部分的に除去することは可能であるが、完全に
除去することは不可能である。その結果、以降の工程で
ある貴金属層を下部電極として誘電体層を成膜した際
に、形状不良となり、キャパシタにショートを発生さ
せ、デバイスの歩留低下の原因となる。In the above-mentioned conventional etching method, as shown in FIGS. 3 (c) to 3 (e), the reaction products in the etching and the mixture of sputter-etched noble metals are shown in FIG. Is re-attached to the side wall of the resist mask to form a so-called side wall re-adhesion layer 16. The reason is that the vapor pressure of the noble metal Ir and the reaction product thereof, such as IrCl, is extremely low and is difficult to volatilize. Further, as shown in FIG. 3E, the adhesion layer is not removed by ashing of the photoresist. In order to remove this adhesion layer, FIGS.
As shown in FIG. 1, for example, a mechanical removal method such as a brush scrub is performed. However, as shown in FIG. 5C, partial removal is possible, but complete removal is not possible. As a result, when the dielectric layer is formed using the noble metal layer as the lower electrode in the subsequent steps, the shape becomes defective, a short circuit occurs in the capacitor, and the device yield is reduced.
【0006】レジストマスクに側壁再付着層を生じさせ
ないために、例えば、Cl2とArの混合ガスにおいて
Cl2ガスの流量を増やすことも有効である。この場
合、図6に示すように、レジストとCl2ガスとの化学
反応が促進されるため、エッチング中にレジストマスク
5も横方向にエッチされ、テーパー形状になって側壁に
は再付着層ができにくいか、あるいは再付着層が再エッ
チングされ易い形状になる。この時、再付着層を生じな
いテーパー角は約60°以下である。この際、Ir層1
2も同様にテーパー化される。しかし、例えば、Ir層
の厚さが200nmの場合には、テーパー化した部分の
寸法が100nm以上なり、これ以下の微細加工には、
この方法は不適である。In order not to cause sidewall redeposition layer with the resist mask, for example, it is effective to increase the flow rate of the Cl 2 gas in the mixed gas of Cl 2 and Ar. In this case, as shown in FIG. 6, since the chemical reaction between the resist and the Cl 2 gas is promoted, the resist mask 5 is also etched in the lateral direction during the etching, and becomes tapered to form a redeposition layer on the side wall. It is difficult to form, or the re-adhesion layer has a shape that is easily etched again. At this time, the taper angle at which no re-adhesion layer is formed is about 60 ° or less. At this time, the Ir layer 1
2 is likewise tapered. However, for example, when the thickness of the Ir layer is 200 nm, the dimension of the tapered portion is 100 nm or more, and for fine processing below this,
This method is not suitable.
【0007】一方、ハードマスクとしてTiN層14を
用いた場合、Ir層をキャパシタの下部電極として用い
るために、マスクであるTiN層を除去する必要がある
が、これを下地層である酸化膜と選択性よくエッチング
することは困難である。TiN層の除去にウェットエッ
チングを用いることも可能であるが、TiN層を除去で
きたとしても、TiN層14の側面には側壁再付着層1
6が形成されており、この側壁再付着層16はTiN層
除去後にも残るため、歩留り低下の原因となることには
変わりがない。以上のように、従来のエッチング方法で
は、貴金属等の難エッチング性の材料の微細加工を歩留
りよく行うことは極めて困難である。よって、本発明の
解決すべき課題は、第1に、難エッチング材料のパター
ニング後に突起した側壁再付着層が形成されないように
することであり、第2に、ハードマスクを簡易に除去で
きるようにすることである。On the other hand, when the TiN layer 14 is used as a hard mask, it is necessary to remove the TiN layer as a mask in order to use the Ir layer as a lower electrode of the capacitor. It is difficult to etch with good selectivity. Although it is possible to use wet etching to remove the TiN layer, even if the TiN layer can be removed, the side wall re-adhesion layer 1
6 is formed, and the sidewall re-adhesion layer 16 remains after the removal of the TiN layer, so that it still causes a decrease in yield. As described above, in the conventional etching method, it is extremely difficult to perform fine processing of a difficult-to-etch material such as a noble metal with a high yield. Therefore, the problem to be solved by the present invention is firstly to prevent the formation of the projected side wall re-adhesion layer after patterning of the hard-to-etch material, and secondly, to make it possible to easily remove the hard mask. It is to be.
【0008】[0008]
【課題を解決するための手段】上記の課題を解決するた
め、本発明によれば、(1)下地層上に被エッチング材
料層、パッド材料層、ハードマスク層を順次堆積する工
程と、(2)所定のパターンのレジスト膜を形成し、こ
れをマスクとして前記ハードマスク層と前記パッド材料
層をパターニングする工程と、(3)前記ハードマスク
層をマスクとして、前記パッド材料層の側面がエッチン
グされる条件にて、前記被エッチング材料層を異方性の
あるドライ法でエッチングする工程と、(4)前記パッ
ド材料層を除去する工程と、を有することを特徴とする
ドライエッチング方法、が提供される。According to the present invention, there is provided, according to the present invention, (1) a step of sequentially depositing a material layer to be etched, a pad material layer, and a hard mask layer on an underlayer; 2) forming a resist film having a predetermined pattern and patterning the hard mask layer and the pad material layer using the resist film as a mask; and (3) etching the side surface of the pad material layer using the hard mask layer as a mask. And (4) removing the pad material layer under the conditions to be etched by an anisotropic dry method. Provided.
【0009】[作用]本発明のエッチング方法によれ
ば、まず、被エッチング材料層上に、パッド材料層、ハ
ードマスク層を成膜した〔第(1)工程〕後に、これら
ハードマスク層、パッド材料層をパターニングする〔第
(2)工程〕。その後、パッド材料層をサイドエッチで
きるガス種を含むガスを用いて、被エッチング材料層を
ドライエッチングする〔第(3)工程〕。この被エッチ
ング材料層のエッチングを行う第(3)工程において
は、パッド材料層はサイドエッチされるため、再付着物
はハードマスク層の側面には成長するが、パッド材料層
側面には成長しない。被エッチング材料層のパターニン
グの終了後に、残余のパッド材料層を除去する〔第
(4)工程〕。このとき、ハードマスク層はその側面に
形成された側面再付着物ごとリフトオフされ、基板上に
はパターニングされた被エッチング材料層のみが残され
る。すなわち、この本発明によるエッチング方法によれ
ば、突起した側壁再付着物の発生を防止して歩留りの低
下を招くことを回避できる、難エッチング性の被エッチ
ング材料層のパターニングが可能になる。According to the etching method of the present invention, first, a pad material layer and a hard mask layer are formed on the material layer to be etched [Step (1)]. The material layer is patterned [step (2)]. Thereafter, the material layer to be etched is dry-etched by using a gas containing a gas species capable of side-etching the pad material layer [step (3)]. In the third step of etching the material layer to be etched, the pad material layer is side-etched, so that the re-deposit grows on the side surface of the hard mask layer but does not grow on the side surface of the pad material layer. . After the patterning of the material layer to be etched is completed, the remaining pad material layer is removed [step (4)]. At this time, the hard mask layer is lifted off together with the side surface re-deposits formed on the side surface, leaving only the patterned material layer to be etched on the substrate. That is, according to the etching method of the present invention, it becomes possible to pattern the hardly-etched material layer to be etched, which can prevent the occurrence of the projected side wall reattachment and prevent the yield from being lowered.
【0010】[0010]
【発明の実施の形態】図1は、本発明の実施の形態を説
明するための工程順の断面図である。まず、下地層1上
に、難エッチング材料からなる被エッチング材料層を形
成する。ここで、下地層1は、絶縁層、導電膜あるいは
その複合体である。また、被エッチング材料層2の材料
としては、Pt、Ir、Au、Ag等の貴金属材料、P
b(Zr1-x Tix )O3 、SrBi2 Ta2O9等の強
誘電体材料、(BaxSr1-x)TiO3等の高融電率材
料、または、フェライト系ないしFe、Ni、Coを含
むメタル系強磁性体材料の中の何れかが想定されてい
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view in the order of steps for explaining an embodiment of the present invention. First, an etching target material layer made of a difficult-to-etch material is formed on the underlayer 1. Here, the underlayer 1 is an insulating layer, a conductive film, or a composite thereof. Examples of the material of the material layer 2 to be etched include noble metal materials such as Pt, Ir, Au, Ag, and the like.
b (Zr 1-x Ti x ) O 3, SrBi 2 Ta 2 O 9 ferroelectric material such as, (Ba x Sr 1-x ) KoToru conductivities material 3 such as TiO or ferritic or Fe, Any of metal-based ferromagnetic materials including Ni and Co is assumed.
【0011】被エッチング材料層2上に、パッド材料層
3を被着する。パッド材料層3の材料条件は、被エッチ
ング材料層2のドライエッチング時にサイドエッチング
が可能であり、かつ、このとき下地層および上層のハー
ドマスク層との間に選択性を確保できることである。こ
の条件を満たせば、SOG(spin on glas
s)等の無機膜を用いることもできる。しかし、エッチ
ングガスに酸素を添加することにより簡単にサイドエッ
チを行うことのでき、かつエッチングの選択性を確保で
きる有機材料膜が有利に利用される。有機材料として
は、ベンゾシクロブテン(BCB)、ポリイミド、フォ
トレジスト等を用いることができる。これらの前駆体を
例えばスピン法を用いて塗布し、硬化させる。その上
に、ハードマスク層4を形成する。ハードマスク層4
は、スパッタ法やCVD法を用いてTiN、Ti、Si
O2、SiN等を堆積することにより形成することがで
きる。次に、図1(b)に示すように、ハードマスク層
4上にフォトリソグラフィ法等を用いて所定のパターン
のレジスト膜5を形成する。A pad material layer 3 is deposited on the material layer 2 to be etched. The material condition of the pad material layer 3 is that side etching can be performed at the time of dry etching of the material layer 2 to be etched, and at this time, selectivity between the underlying layer and the upper hard mask layer can be ensured. If this condition is satisfied, SOG (spin on glass)
An inorganic film such as s) can also be used. However, an organic material film that can easily perform side etching by adding oxygen to an etching gas and that ensures etching selectivity is advantageously used. Benzocyclobutene (BCB), polyimide, photoresist, or the like can be used as the organic material. These precursors are applied by using, for example, a spin method and are cured. The hard mask layer 4 is formed thereon. Hard mask layer 4
Are made of TiN, Ti, Si using a sputtering method or a CVD method.
It can be formed by depositing O 2 , SiN or the like. Next, as shown in FIG. 1B, a resist film 5 having a predetermined pattern is formed on the hard mask layer 4 by using a photolithography method or the like.
【0012】続いて、図1(c)に示すように、レジス
ト膜5をマスクとして、異方性のエッチング方法により
ハードマスク層4とパッド材料層3とをパターニングす
る。このエッチング方法としては反応性イオンエッチン
グ法を用いることができる。そして、ハードマスク層4
とパッド材料層3とをそれぞれ異なる条件でエッチング
することができるが、同一ガスを用いて同一条件にてエ
ッチングするようにすることもできる。そのエッチング
ガスには、CF4 、CHF3 を用いることができる。次
に、図1(d)に示すように、レジスト膜5を酸素プラ
ズマまたは剥離液を用いて除去する。なお、この工程は
必須のものではない。次いで、図1(e)、(e′)に
示すように、レジスト膜5を除去した後若しくはレジス
ト膜5を除去することなく、ハードマスク層4をマスク
として、異方性のドライエッチングにより被エッチング
材料層2をパターニングする。このとき、パッド材料層
3がサイドエッチされる条件が選択される。この条件で
エッチングを行うとき、ハードマスク層4(またはハー
ドマスク層4およびレジスト膜5)の側面には側壁再付
着層6が堆積するが、パッド材料層3の側面には再付着
物は付着しない。パッド材料層が有機膜であるとき、こ
のエッチングは酸素を含むエッチングガスを用いた反応
性イオンエッチングにて行うことができる。Subsequently, as shown in FIG. 1C, the hard mask layer 4 and the pad material layer 3 are patterned by the anisotropic etching method using the resist film 5 as a mask. As this etching method, a reactive ion etching method can be used. Then, the hard mask layer 4
Although the pad and the pad material layer 3 can be etched under different conditions, they can be etched under the same conditions using the same gas. CF 4 and CHF 3 can be used as the etching gas. Next, as shown in FIG. 1D, the resist film 5 is removed using oxygen plasma or a stripper. This step is not essential. Then, as shown in FIGS. 1E and 1E, after the resist film 5 is removed or without removing the resist film 5, the hard mask layer 4 is used as a mask to perform anisotropic dry etching. The etching material layer 2 is patterned. At this time, a condition under which the pad material layer 3 is side-etched is selected. When etching is performed under these conditions, the side wall re-deposition layer 6 is deposited on the side surfaces of the hard mask layer 4 (or the hard mask layer 4 and the resist film 5), but the re-deposit is deposited on the side surfaces of the pad material layer 3. do not do. When the pad material layer is an organic film, this etching can be performed by reactive ion etching using an etching gas containing oxygen.
【0013】続いて、図1(f)に示すように、パッド
材料層3を化学的な手段によって除去することにより、
ハードマスク層4(またはハードマスク層4およびレジ
スト膜5)をその側面に堆積した側壁再付着層6ごとリ
フトオフする。このパッド材料層の除去には、パッド材
料層が有機膜であるとき、酸素プラズマエッチングを用
いることができる。あるいは剥離液、ヒドラジン溶液等
を用いるウェット法を採用することもできる。さらに
は、膨潤させて除去することもできる。その後、必要に
応じて、ブラシスクラブや高圧水の噴射等の処理を行う
ことができる。また、これらの処理を併用することもで
きる。Subsequently, as shown in FIG. 1F, the pad material layer 3 is removed by chemical means,
The hard mask layer 4 (or the hard mask layer 4 and the resist film 5) is lifted off together with the side wall redeposition layer 6 deposited on the side surface. When removing the pad material layer, when the pad material layer is an organic film, oxygen plasma etching can be used. Alternatively, a wet method using a stripper, a hydrazine solution, or the like can be employed. Furthermore, it can be removed by swelling. Thereafter, if necessary, a process such as brush scrub or injection of high-pressure water can be performed. Further, these treatments can be used in combination.
【0014】[0014]
【実施例】次に、本発明の実施例について図面を参照し
ながら詳細に説明する。図2(a)〜(g)は、本発明
の一実施例のエッチング方法を工程順に示した断面図で
ある。まず、図2(a)に示すように、下地層である膜
厚約500nmの酸化シリコンからなる層間絶縁膜11
上に、被エッチング層であるIr層12をスパッタ法に
より100nmの膜厚に堆積する。次に、図2(b)に
示すように、Ir層12上に、BCBを含む有機材溶液
をスピナを用いて塗布した後、300℃程度の熱処理を
行って、厚さ100nmのBCB膜13を成膜する。次
いで、図2(c)に示すように、BCB膜13の上にハ
ードマスクとなるTiN層14を、例えばDCスパッタ
法により200nmの膜厚に成膜する。そして、図2
(d)に示すように、TiN層14の上に通常のフォト
リソグラフィ法を用いて所定のパターンの厚さ1.2μ
mのフォトレジスト膜15を形成する。Next, embodiments of the present invention will be described in detail with reference to the drawings. 2A to 2G are sectional views showing an etching method according to an embodiment of the present invention in the order of steps. First, as shown in FIG. 2A, an interlayer insulating film 11 made of silicon oxide having a thickness of about 500 nm as a base layer.
On top, an Ir layer 12 to be etched is deposited to a thickness of 100 nm by a sputtering method. Next, as shown in FIG. 2B, an organic material solution containing BCB is applied on the Ir layer 12 by using a spinner, and then a heat treatment at about 300 ° C. is performed to form a BCB film 13 having a thickness of 100 nm. Is formed. Next, as shown in FIG. 2C, a TiN layer 14 serving as a hard mask is formed on the BCB film 13 to a thickness of 200 nm by, for example, DC sputtering. And FIG.
As shown in (d), a predetermined pattern thickness of 1.2 μm is formed on the TiN layer 14 by using a normal photolithography method.
Then, a m-th photoresist film 15 is formed.
【0015】次に、図2(e)に示すように、フォトレ
ジスト膜15をマスクとしてTiN層14とBCB膜1
3をエッチングする。このエッチングは、例えばCF4
ガスによる反応性イオンエッチングで可能である。この
反応性イオンエッチングにおいては、プラズマソースに
印加するRFパワーと、基板側に印加するRFパワーと
を独立して制御できるが、この際、例えば基板に印加す
るRFパワーを0W近くに設定すれば、Ir層12は殆
どスパッタエッチされないため、下層のIr層12に対
するエッチング選択比を10以上と大きく取ることが可
能にになる。すなわち、BCBのエッチングを、Ir層
12上で制御性よく停止させることが可能になる。さら
に、反応性イオンエッチングの特徴であるエッチングの
異方性により、そのエッチング形状はフォトレジスト膜
15のパターンが忠実に転写され、TiN、BCB共ほ
ぼ垂直にエッチングされる。しかし、この時、BCBは
横方向にもエッチングされる可能性があるが、エッチン
グパターンのサイズと比べて無視できる程度の大きさで
あれば問題はない。BCBの厚さは100nmであるの
で、サイドエッチ量はこの1/2以下であり、例えば、
エッチングパターンのサイズが0.2μm以上である場
合はこの量は問題にならない。Next, as shown in FIG. 2E, using the photoresist film 15 as a mask, the TiN layer 14 and the BCB film 1 are used.
3 is etched. This etching is performed, for example, using CF 4
This is possible by reactive ion etching with a gas. In this reactive ion etching, the RF power applied to the plasma source and the RF power applied to the substrate side can be controlled independently. In this case, for example, if the RF power applied to the substrate is set near 0 W, Since the Ir layer 12 is hardly sputter-etched, the etching selectivity with respect to the lower Ir layer 12 can be made as large as 10 or more. That is, BCB etching can be stopped on the Ir layer 12 with good controllability. Further, due to the anisotropy of etching which is a characteristic of reactive ion etching, the pattern of the photoresist film 15 is faithfully transferred in the etching shape, and both TiN and BCB are etched almost vertically. However, at this time, there is a possibility that the BCB is also etched in the lateral direction, but there is no problem as long as it is negligible compared to the size of the etching pattern. Since the thickness of BCB is 100 nm, the amount of side etching is less than 1/2 of this, for example,
This amount does not matter if the size of the etching pattern is 0.2 μm or more.
【0016】次に、図2(f)に示すように、フォトレ
ジスト膜15をアッシング処理にて除去する。この時、
ウエハを酸素プラズマ中に曝すことにより有機高分子材
料からなるレジスト膜15を分解除去するが、レジスト
とよく似た化学構造を持つBCB膜13もレジスト膜1
5に近い速度で化学的にエッチングされる。一方、Ti
N層14やIr層12は酸素プラズマ処理で分解されエ
ッチングされることはない。この結果、図示のように、
フォトレジスト膜15が完全に除去された後は、TiN
層144の下のBCB膜13はサイドエッチされた形状
になる。Next, as shown in FIG. 2F, the photoresist film 15 is removed by ashing. At this time,
The resist film 15 made of an organic polymer material is decomposed and removed by exposing the wafer to oxygen plasma. The BCB film 13 having a chemical structure very similar to that of the resist is also used as the resist film 1.
It is chemically etched at a rate close to 5. On the other hand, Ti
The N layer 14 and the Ir layer 12 are decomposed by the oxygen plasma treatment and are not etched. As a result, as shown in the figure,
After the photoresist film 15 is completely removed, TiN
The BCB film 13 under the layer 144 has a side-etched shape.
【0017】次いで、図2(g)に示すように、Ir層
12に対するドライエッチングを行う。この時の実質的
なマスクは、既に加工されたTiN層14とBCB膜1
3であり、エッチング方法は塩素、アルゴン、酸素の混
合ガスを用いた反応性イオンエッチングである。Ir層
12をエッチングするには、基板バイアスを、TiN層
14とBCB膜13のエッチングの時に比べて十分に大
きくする必要がある。このエッチング条件としては、例
えば酸素、塩素、アルゴンの比率を10:10:80程
度とし、酸素を10%程度あるいはそれ以上にすること
により、Ir層12とTiN層14との選択比を10以
上にすることができる。この時、図2(e)の工程と同
様に、反応性イオンエッチングの特徴としてIr層12
のエッチングは基板の垂直な方向のみに進行する。Next, as shown in FIG. 2 (g), dry etching is performed on the Ir layer 12. The substantial mask at this time is the TiN layer 14 already processed and the BCB film 1.
3 and the etching method is reactive ion etching using a mixed gas of chlorine, argon and oxygen. In order to etch the Ir layer 12, the substrate bias needs to be sufficiently larger than when etching the TiN layer 14 and the BCB film 13. The etching conditions include, for example, a ratio of oxygen, chlorine, and argon of about 10:10:80 and an oxygen content of about 10% or more, so that the selectivity between the Ir layer 12 and the TiN layer 14 is 10 or more. Can be At this time, similarly to the step of FIG.
Etching proceeds only in the direction perpendicular to the substrate.
【0018】一方、BCB膜13に対する酸素の効果
は、前記アッシングの場合と同様であり、化学的にエッ
チングされる。この場合、Ir層12については、エッ
チングの異方性が高いため、実質的なエッチングマスク
はTiN層14になる。その結果、図2(g)に示すよ
うに、TiN層14は元の形状を留めたままで、Ir層
12はほぼ垂直に近い角度でエッチされ、BCB膜13
だけは図2(f)の段階で既にサイドエッチされている
ことに加えて、このエッチングで更にサイドエッチの深
い形状になる。この状態でも、Irはその反応生成物の
蒸気圧が低いこと、およびスパッタエッチされる効果が
大きいことは従来例の場合と同じなので、やはり側壁再
付着層16は形成される。しかし、この構造ではBCB
膜13は横方向に後退するので、その側壁には再付着層
は形成されず、TiN層14の側壁のみに形成される。
なお、このエッチング工程において、基板温度を200
℃以上に保てば、BCB膜はよりエッチングされ易くな
り、サイドエッチ量が大きくなる。更に、この場合Ir
の反応生成物であるIrCl等が、通常のエッチング温
度である100℃以下の場合に比べて、より蒸発し易く
なる。従って、側壁再付着物の抑制にもより効果的であ
る。On the other hand, the effect of oxygen on the BCB film 13 is the same as in the case of the ashing, and is chemically etched. In this case, since the Ir layer 12 has a high etching anisotropy, the substantial etching mask is the TiN layer 14. As a result, as shown in FIG. 2G, the Ir layer 12 is etched at an almost vertical angle while the TiN layer 14 keeps its original shape, and the BCB film 13 is etched.
In addition to the above, in addition to the fact that side etching has already been performed at the stage of FIG. Even in this state, Ir has a low vapor pressure of the reaction product and a large sputter-etching effect as in the conventional example, so that the sidewall re-adhesion layer 16 is formed. However, in this structure, BCB
Since the film 13 recedes in the lateral direction, no redeposition layer is formed on the side wall thereof, and is formed only on the side wall of the TiN layer 14.
In this etching step, the substrate temperature was set to 200.
If the temperature is kept at not less than ° C., the BCB film is more easily etched, and the amount of side etching is increased. Further, in this case Ir
IrCl etc., which is a reaction product of the above, is more likely to evaporate than in the case where the temperature is 100 ° C. or less, which is a normal etching temperature. Therefore, it is more effective in suppressing the reattachment of the side wall.
【0019】Ir層12のエッチング終了時には、図2
(h)に示されるように、側壁再付着層16とTiN層
14はオーバーハングした形状になり、エッチされたI
r層12の形状はTiN層14の形状をほぼ転写したも
のになる。次に、図2(i)に示すように、酸素プラズ
マで再び図2(f)の工程と同様のアッシング処理を行
うと、BCB膜13だけが化学的にエッチングされる。
その結果、TiN層14は、側壁再付着層16と共に完
全にIr層12のパターンから分離される。その後、図
2(j)に示すように、ブラシやジェット水によるスク
ラブ処理や洗浄処理を行えば、微細加工されたIr層1
2のパターンのみが残る。At the end of the etching of the Ir layer 12, FIG.
As shown in (h), the sidewall redeposition layer 16 and the TiN layer 14 have an overhanging shape, and the etched I
The shape of the r layer 12 is substantially a transfer of the shape of the TiN layer 14. Next, as shown in FIG. 2I, when the ashing process similar to the process of FIG. 2F is performed again with oxygen plasma, only the BCB film 13 is chemically etched.
As a result, the TiN layer 14 is completely separated from the pattern of the Ir layer 12 together with the sidewall redeposition layer 16. Thereafter, as shown in FIG. 2 (j), if a scrubbing process or a cleaning process is performed by using a brush or jet water, the finely processed Ir layer 1 is formed.
Only pattern 2 remains.
【0020】上記のように、本エッチング方法によって
Ir層12は選択的にエッチングされ、かつフォトレジ
スト膜15のパターンを忠実に転写した形状を持ちなが
ら、側壁再付着層16は完全に除去され、最終的に微細
加工されたIr層パターンのみが残る。従って、このI
r層を下部電極としてその上に各種誘電体層の所望通り
の成膜が後の工程で可能である。As described above, the Ir layer 12 is selectively etched by the present etching method, and while the pattern of the photoresist film 15 is faithfully transferred, the sidewall redeposition layer 16 is completely removed. Finally, only the finely processed Ir layer pattern remains. Therefore, this I
Using the r layer as a lower electrode, various dielectric layers can be formed as desired on the lower electrode in a later step.
【0021】[0021]
【発明の効果】以上詳細に説明したように、本発明は、
被エッチング材料層を、パッド材料層を挟んで形成され
たハードマスク層をマスクとして、パッド材料層をサイ
ドエッチしつつドライエッチングするものであるので、
ドライエッチングが困難であった材料層であっても、側
面再付着層をハードマスク層とともにリフトオフするこ
とができ、パターニングされた被エッチング材料層に突
起した再付着層が形成されないようにすることができ
る。したがって、本発明によれば、パターニングされた
難エッチング性の材料層を利用するデバイスを、歩留り
よく形成することが可能になる。また、本発明によれ
ば、ハードマスク層を容易にかつ完全に除去することが
可能になる。As described in detail above, the present invention provides
Since the material layer to be etched is dry-etched while the pad material layer is side-etched using the hard mask layer formed with the pad material layer interposed therebetween as a mask,
Even for a material layer that has been difficult to dry-etch, the side surface redeposition layer can be lifted off together with the hard mask layer, so that a projected redeposition layer is not formed on the patterned material layer to be etched. it can. Therefore, according to the present invention, it is possible to form a device using a patterned hard-to-etch material layer with a high yield. Further, according to the present invention, the hard mask layer can be easily and completely removed.
【図1】 本発明の実施の形態の工程順の断面図。FIG. 1 is a sectional view in the order of steps of an embodiment of the present invention.
【図2】 本発明の一実施例の工程順の断面図。FIG. 2 is a sectional view of an embodiment of the present invention in the order of steps.
【図3】 第1の従来例の工程順の断面図。FIG. 3 is a sectional view of a first conventional example in the order of steps.
【図4】 第2の従来例の工程順の断面図。FIG. 4 is a sectional view of a second conventional example in the order of steps.
【図5】 従来例の問題点を説明するための工程順の断
面図。FIG. 5 is a sectional view in the order of steps for explaining a problem of the conventional example.
【図6】 従来例の問題点を説明するための断面図。FIG. 6 is a sectional view for explaining a problem of the conventional example.
1 下地層 2 被エッチング材料層 3 パッド材料層 4 ハードマスク層 5 レジスト膜 6、16 側壁再付着層 11 層間絶縁膜 12 Ir層 13 ベンゾシクロブテン膜(BCB膜) 14 TiN層 15 フォトレジスト膜 DESCRIPTION OF SYMBOLS 1 Underlayer 2 Material layer to be etched 3 Pad material layer 4 Hard mask layer 5 Resist film 6, 16 Side wall reattachment layer 11 Interlayer insulating film 12 Ir layer 13 Benzocyclobutene film (BCB film) 14 TiN layer 15 Photoresist film
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 FI テーマコート゛(参考) H01L 29/788 29/792 Fターム(参考) 5F001 AA17 AD33 AG10 5F004 AA09 BA03 BA04 BB26 BD01 CA04 DA01 DA04 DA16 DA23 DA26 DB00 DB12 DB23 EA05 EA06 EA07 EA13 EA29 EB02 5F038 AC05 AC15 DF05 EZ14 EZ15 EZ20 5F083 AD21 FR01 GA27 JA14 JA15 JA17 JA38 JA56 JA60 PR03 PR06 PR07 PR21 PR22 PR23 5F101 BA62 BD20 BH14 ──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. 7 Identification symbol FI theme coat ゛ (Reference) H01L 29/788 29/792 F-term (Reference) 5F001 AA17 AD33 AG10 5F004 AA09 BA03 BA04 BB26 BD01 CA04 DA01 DA04 DA16 DA23 DA26 DB00 DB12 DB23 EA05 EA06 EA07 EA13 EA29 EB02 5F038 AC05 AC15 DF05 EZ14 EZ15 EZ20 5F083 AD21 FR01 GA27 JA14 JA15 JA17 JA38 JA56 JA60 PR03 PR06 PR07 PR21 PR22 PR23 5F101 BA62 BD20 BH14
Claims (18)
パッド材料層、ハードマスク層を順次堆積する工程と、 (2)所定のパターンのレジスト膜を形成し、これをマ
スクとして前記ハードマスク層と前記パッド材料層をパ
ターニングする工程と、 (3)前記ハードマスク層をマスクとして、前記パッド
材料層の側面がエッチングされる条件にて、前記被エッ
チング材料層を異方性のあるドライ法でエッチングする
工程と、 (4)前記パッド材料層を除去する工程と、を有するこ
とを特徴とするドライエッチング方法。(1) a material layer to be etched on an underlayer;
A step of sequentially depositing a pad material layer and a hard mask layer; (2) forming a resist film having a predetermined pattern, and patterning the hard mask layer and the pad material layer using the resist film as a mask; Using the hard mask layer as a mask, etching the material layer to be etched by an anisotropic dry method under the condition that the side surface of the pad material layer is etched; and (4) removing the pad material layer And a dry etching method.
されることを特徴とする請求項1記載のドライエッチン
グ方法。2. The dry etching method according to claim 1, wherein said pad material layer is formed of an organic material.
ン、ポリイミド、フォトレジストの中の何れかによって
形成されることを特徴とする請求項1記載のドライエッ
チング方法。3. The dry etching method according to claim 1, wherein said pad material layer is formed of any one of benzocyclobutene, polyimide, and photoresist.
て形成されることを特徴とする請求項1〜3の何れかに
記載のドライエッチング方法。4. The dry etching method according to claim 1, wherein the hard mask layer is formed of an inorganic material.
SiO2 、SiNの中の何れかによって形成されること
を特徴とする請求項1〜3の何れかに記載のドライエッ
チング方法。5. The hard mask layer comprises TiN, Ti,
The dry etching method according to any one of claims 1 to 3, characterized in that it is formed by either in the SiO 2, SiN.
反応性イオンエッチング法により行われることを特徴と
する請求項1〜5の何れかに記載のドライエッチング方
法。6. The patterning in the (2) step is as follows:
The dry etching method according to claim 1, wherein the dry etching method is performed by a reactive ion etching method.
4、CHF3の何れかを含むガスを用いて行われることを
特徴とする請求項6記載のドライエッチング方法。7. The reactive ion etching method according to claim
4, the dry etching method according to claim 6, wherein a is performed using a gas containing either CHF 3.
応性イオンエッチング法により行われることを特徴とす
る請求項1〜7の何れかに記載のドライエッチング方
法。8. The dry etching method according to claim 1, wherein the etching in the step (3) is performed by a reactive ion etching method.
チング法が、酸素を含むガスを用いて行われることを特
徴とする請求項8記載のドライエッチング方法。9. The dry etching method according to claim 8, wherein the reactive ion etching in the step (3) is performed using a gas containing oxygen.
エッチングにより行なわれることを特徴とする請求項1
〜9の何れかに記載のドライエッチング方法。10. The method according to claim 1, wherein the removing in the step (4) is performed by chemical etching.
10. The dry etching method according to any one of claims 9 to 9.
エッチングガスを用いたプラズマエッチングであること
を特徴とする請求項10記載のドライエッチング方法。11. The dry etching method according to claim 10, wherein said chemical etching is plasma etching using an etching gas containing oxygen.
℃以上の温度で行なわれることを特徴とする請求項10
または11記載のドライエッチング方法。12. The method according to claim 1, wherein the removing in the step (4) is performed for 200 times.
11. The method according to claim 10, wherein the heat treatment is performed at a temperature of not less than C.
Or the dry etching method according to 11.
により行なわれることを特徴とする請求項1〜9の何れ
かに記載のドライエッチング方法。13. The dry etching method according to claim 1, wherein the removal in the step (4) is performed by a wet method.
の工程に先立って、前記フォトレジスト膜を除去する工
程が付加されることを特徴とする請求項1〜13の何れ
かに記載のドライエッチング方法。14. The method according to claim 3, further comprising:
14. The dry etching method according to claim 1, wherein a step of removing the photoresist film is added prior to the step of.
の工程に先立って、前記パッド材料層をサイドエッチす
る工程が付加されることを特徴とする請求項1〜13の
何れかに記載のドライエッチング方法。15. The method according to claim 3, wherein the step (3) is performed after the step (2).
14. The dry etching method according to claim 1, wherein a step of side-etching the pad material layer is added prior to the step.
処理、および/または、洗浄処理の工程が付加されるこ
とを特徴とする請求項1〜15の何れかに記載のドライ
エッチング方法。16. The dry etching method according to claim 1, wherein a step of scrubbing and / or a step of cleaning is added after the step (4).
理であり、前記洗浄処理が高圧水の噴射処理であること
を特徴とする請求項16記載のドライエッチング方法。17. The dry etching method according to claim 16, wherein the scrubbing process is a brush scrubbing process, and the cleaning process is a high pressure water injection process.
r、Au、Agを含む導電材料群、Pb(Zr1-x Ti
x )O3 、SrBi2 Ta2O9、(BaxSr1-x)Ti
O3を含む誘電体材料群、または、フェライト系若しく
はFe、Ni、Coの中の何れかを含むメタル系の強磁
性体群の中の何れかの群に属する材料の膜であることを
特徴とする請求項1〜17の何れかに記載のドライエッ
チング方法。18. The material layer to be etched is made of Pt, I
a conductive material group containing r, Au, and Ag, and Pb (Zr 1-x Ti
x) O 3, SrBi 2 Ta 2 O 9, (Ba x Sr 1-x) Ti
It is a film of a material belonging to any one of a dielectric material group including O 3 and a ferromagnetic group or a ferromagnetic group including a metal including any of Fe, Ni, and Co. The dry etching method according to claim 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000128792A JP2001313282A (en) | 2000-04-28 | 2000-04-28 | Method of dry etching |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000128792A JP2001313282A (en) | 2000-04-28 | 2000-04-28 | Method of dry etching |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2001313282A true JP2001313282A (en) | 2001-11-09 |
Family
ID=18638176
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2000128792A Pending JP2001313282A (en) | 2000-04-28 | 2000-04-28 | Method of dry etching |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2001313282A (en) |
Cited By (85)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006501523A (en) * | 2002-10-03 | 2006-01-12 | ルーメラ・コーポレーション | Polymer microstructure and method of manufacturing polymer waveguide |
JP2006278457A (en) * | 2005-03-28 | 2006-10-12 | Ulvac Japan Ltd | Etching method |
JP2007109718A (en) * | 2005-10-11 | 2007-04-26 | Toshiba Corp | Process for fabricating semiconductor device |
JP2007335897A (en) * | 2007-08-29 | 2007-12-27 | Fujitsu Ltd | Semiconductor device fabrication method |
JP2008159924A (en) * | 2006-12-25 | 2008-07-10 | Fujitsu Ltd | Method of manufacturing semiconductor device |
JP2015103756A (en) * | 2013-11-27 | 2015-06-04 | 富士通セミコンダクター株式会社 | Method for manufacturing magnetic resistance element |
WO2016118279A1 (en) * | 2015-01-22 | 2016-07-28 | Applied Materials, Inc. | Titanium nitride removal |
US9934942B1 (en) | 2016-10-04 | 2018-04-03 | Applied Materials, Inc. | Chamber with flow-through source |
US9947549B1 (en) | 2016-10-10 | 2018-04-17 | Applied Materials, Inc. | Cobalt-containing material removal |
US9966240B2 (en) | 2014-10-14 | 2018-05-08 | Applied Materials, Inc. | Systems and methods for internal surface conditioning assessment in plasma processing equipment |
US9978564B2 (en) | 2012-09-21 | 2018-05-22 | Applied Materials, Inc. | Chemical control features in wafer process equipment |
US10026621B2 (en) | 2016-11-14 | 2018-07-17 | Applied Materials, Inc. | SiN spacer profile patterning |
US10032606B2 (en) | 2012-08-02 | 2018-07-24 | Applied Materials, Inc. | Semiconductor processing with DC assisted RF power for improved control |
US10043684B1 (en) | 2017-02-06 | 2018-08-07 | Applied Materials, Inc. | Self-limiting atomic thermal etching systems and methods |
US10043674B1 (en) | 2017-08-04 | 2018-08-07 | Applied Materials, Inc. | Germanium etching systems and methods |
US10049891B1 (en) | 2017-05-31 | 2018-08-14 | Applied Materials, Inc. | Selective in situ cobalt residue removal |
US10062579B2 (en) | 2016-10-07 | 2018-08-28 | Applied Materials, Inc. | Selective SiN lateral recess |
US10062575B2 (en) | 2016-09-09 | 2018-08-28 | Applied Materials, Inc. | Poly directional etch by oxidation |
US10062578B2 (en) | 2011-03-14 | 2018-08-28 | Applied Materials, Inc. | Methods for etch of metal and metal-oxide films |
US10062585B2 (en) | 2016-10-04 | 2018-08-28 | Applied Materials, Inc. | Oxygen compatible plasma source |
US10062587B2 (en) | 2012-07-18 | 2018-08-28 | Applied Materials, Inc. | Pedestal with multi-zone temperature control and multiple purge capabilities |
US10128086B1 (en) | 2017-10-24 | 2018-11-13 | Applied Materials, Inc. | Silicon pretreatment for nitride removal |
US10147620B2 (en) | 2015-08-06 | 2018-12-04 | Applied Materials, Inc. | Bolted wafer chuck thermal management systems and methods for wafer processing systems |
US10163696B2 (en) | 2016-11-11 | 2018-12-25 | Applied Materials, Inc. | Selective cobalt removal for bottom up gapfill |
US10170336B1 (en) | 2017-08-04 | 2019-01-01 | Applied Materials, Inc. | Methods for anisotropic control of selective silicon removal |
US10186428B2 (en) | 2016-11-11 | 2019-01-22 | Applied Materials, Inc. | Removal methods for high aspect ratio structures |
US10224210B2 (en) | 2014-12-09 | 2019-03-05 | Applied Materials, Inc. | Plasma processing system with direct outlet toroidal plasma source |
US10242908B2 (en) | 2016-11-14 | 2019-03-26 | Applied Materials, Inc. | Airgap formation with damage-free copper |
US10256112B1 (en) | 2017-12-08 | 2019-04-09 | Applied Materials, Inc. | Selective tungsten removal |
US10256079B2 (en) | 2013-02-08 | 2019-04-09 | Applied Materials, Inc. | Semiconductor processing systems having multiple plasma configurations |
US10283324B1 (en) | 2017-10-24 | 2019-05-07 | Applied Materials, Inc. | Oxygen treatment for nitride etching |
US10283321B2 (en) | 2011-01-18 | 2019-05-07 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
US10297458B2 (en) | 2017-08-07 | 2019-05-21 | Applied Materials, Inc. | Process window widening using coated parts in plasma etch processes |
US10319649B2 (en) | 2017-04-11 | 2019-06-11 | Applied Materials, Inc. | Optical emission spectroscopy (OES) for remote plasma monitoring |
US10319600B1 (en) | 2018-03-12 | 2019-06-11 | Applied Materials, Inc. | Thermal silicon etch |
US10319739B2 (en) | 2017-02-08 | 2019-06-11 | Applied Materials, Inc. | Accommodating imperfectly aligned memory holes |
US10354889B2 (en) | 2017-07-17 | 2019-07-16 | Applied Materials, Inc. | Non-halogen etching of silicon-containing materials |
US10403507B2 (en) | 2017-02-03 | 2019-09-03 | Applied Materials, Inc. | Shaped etch profile with oxidation |
US10424464B2 (en) | 2015-08-07 | 2019-09-24 | Applied Materials, Inc. | Oxide etch selectivity systems and methods |
US10431429B2 (en) | 2017-02-03 | 2019-10-01 | Applied Materials, Inc. | Systems and methods for radial and azimuthal control of plasma uniformity |
US10468267B2 (en) | 2017-05-31 | 2019-11-05 | Applied Materials, Inc. | Water-free etching methods |
US10468276B2 (en) | 2015-08-06 | 2019-11-05 | Applied Materials, Inc. | Thermal management systems and methods for wafer processing systems |
US10465294B2 (en) | 2014-05-28 | 2019-11-05 | Applied Materials, Inc. | Oxide and metal removal |
US10490406B2 (en) | 2018-04-10 | 2019-11-26 | Appled Materials, Inc. | Systems and methods for material breakthrough |
US10497573B2 (en) | 2018-03-13 | 2019-12-03 | Applied Materials, Inc. | Selective atomic layer etching of semiconductor materials |
US10504700B2 (en) | 2015-08-27 | 2019-12-10 | Applied Materials, Inc. | Plasma etching systems and methods with secondary plasma injection |
US10504754B2 (en) | 2016-05-19 | 2019-12-10 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US10522371B2 (en) | 2016-05-19 | 2019-12-31 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US10541184B2 (en) | 2017-07-11 | 2020-01-21 | Applied Materials, Inc. | Optical emission spectroscopic techniques for monitoring etching |
US10541246B2 (en) | 2017-06-26 | 2020-01-21 | Applied Materials, Inc. | 3D flash memory cells which discourage cross-cell electrical tunneling |
US10546729B2 (en) | 2016-10-04 | 2020-01-28 | Applied Materials, Inc. | Dual-channel showerhead with improved profile |
US10566206B2 (en) | 2016-12-27 | 2020-02-18 | Applied Materials, Inc. | Systems and methods for anisotropic material breakthrough |
US10573527B2 (en) | 2018-04-06 | 2020-02-25 | Applied Materials, Inc. | Gas-phase selective etching systems and methods |
US10573496B2 (en) | 2014-12-09 | 2020-02-25 | Applied Materials, Inc. | Direct outlet toroidal plasma source |
US10593560B2 (en) | 2018-03-01 | 2020-03-17 | Applied Materials, Inc. | Magnetic induction plasma source for semiconductor processes and equipment |
US10593523B2 (en) | 2014-10-14 | 2020-03-17 | Applied Materials, Inc. | Systems and methods for internal surface conditioning in plasma processing equipment |
US10615047B2 (en) | 2018-02-28 | 2020-04-07 | Applied Materials, Inc. | Systems and methods to form airgaps |
US10629473B2 (en) | 2016-09-09 | 2020-04-21 | Applied Materials, Inc. | Footing removal for nitride spacer |
US10672642B2 (en) | 2018-07-24 | 2020-06-02 | Applied Materials, Inc. | Systems and methods for pedestal configuration |
US10679870B2 (en) | 2018-02-15 | 2020-06-09 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus |
US10699879B2 (en) | 2018-04-17 | 2020-06-30 | Applied Materials, Inc. | Two piece electrode assembly with gap for plasma control |
US10727080B2 (en) | 2017-07-07 | 2020-07-28 | Applied Materials, Inc. | Tantalum-containing material removal |
US10755941B2 (en) | 2018-07-06 | 2020-08-25 | Applied Materials, Inc. | Self-limiting selective etching systems and methods |
US10854426B2 (en) | 2018-01-08 | 2020-12-01 | Applied Materials, Inc. | Metal recess for semiconductor structures |
US10872778B2 (en) | 2018-07-06 | 2020-12-22 | Applied Materials, Inc. | Systems and methods utilizing solid-phase etchants |
US10886137B2 (en) | 2018-04-30 | 2021-01-05 | Applied Materials, Inc. | Selective nitride removal |
US10892198B2 (en) | 2018-09-14 | 2021-01-12 | Applied Materials, Inc. | Systems and methods for improved performance in semiconductor processing |
US10903054B2 (en) | 2017-12-19 | 2021-01-26 | Applied Materials, Inc. | Multi-zone gas distribution systems and methods |
US10920320B2 (en) | 2017-06-16 | 2021-02-16 | Applied Materials, Inc. | Plasma health determination in semiconductor substrate processing reactors |
US10920319B2 (en) | 2019-01-11 | 2021-02-16 | Applied Materials, Inc. | Ceramic showerheads with conductive electrodes |
US10943834B2 (en) | 2017-03-13 | 2021-03-09 | Applied Materials, Inc. | Replacement contact process |
US10964512B2 (en) | 2018-02-15 | 2021-03-30 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus and methods |
US11049755B2 (en) | 2018-09-14 | 2021-06-29 | Applied Materials, Inc. | Semiconductor substrate supports with embedded RF shield |
US11062887B2 (en) | 2018-09-17 | 2021-07-13 | Applied Materials, Inc. | High temperature RF heater pedestals |
US11121002B2 (en) | 2018-10-24 | 2021-09-14 | Applied Materials, Inc. | Systems and methods for etching metals and metal derivatives |
US11239061B2 (en) | 2014-11-26 | 2022-02-01 | Applied Materials, Inc. | Methods and systems to enhance process uniformity |
US11257693B2 (en) | 2015-01-09 | 2022-02-22 | Applied Materials, Inc. | Methods and systems to improve pedestal temperature control |
US11276559B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Semiconductor processing chamber for multiple precursor flow |
US11276590B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Multi-zone semiconductor substrate supports |
US11328909B2 (en) | 2017-12-22 | 2022-05-10 | Applied Materials, Inc. | Chamber conditioning and removal processes |
US11417534B2 (en) | 2018-09-21 | 2022-08-16 | Applied Materials, Inc. | Selective material removal |
US11437242B2 (en) | 2018-11-27 | 2022-09-06 | Applied Materials, Inc. | Selective removal of silicon-containing materials |
US11594428B2 (en) | 2015-02-03 | 2023-02-28 | Applied Materials, Inc. | Low temperature chuck for plasma processing systems |
US11682560B2 (en) | 2018-10-11 | 2023-06-20 | Applied Materials, Inc. | Systems and methods for hafnium-containing film removal |
US11721527B2 (en) | 2019-01-07 | 2023-08-08 | Applied Materials, Inc. | Processing chamber mixing systems |
-
2000
- 2000-04-28 JP JP2000128792A patent/JP2001313282A/en active Pending
Cited By (116)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006501523A (en) * | 2002-10-03 | 2006-01-12 | ルーメラ・コーポレーション | Polymer microstructure and method of manufacturing polymer waveguide |
JP2006278457A (en) * | 2005-03-28 | 2006-10-12 | Ulvac Japan Ltd | Etching method |
JP2007109718A (en) * | 2005-10-11 | 2007-04-26 | Toshiba Corp | Process for fabricating semiconductor device |
US7767582B2 (en) | 2005-10-11 | 2010-08-03 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device |
JP2008159924A (en) * | 2006-12-25 | 2008-07-10 | Fujitsu Ltd | Method of manufacturing semiconductor device |
JP2007335897A (en) * | 2007-08-29 | 2007-12-27 | Fujitsu Ltd | Semiconductor device fabrication method |
JP4515492B2 (en) * | 2007-08-29 | 2010-07-28 | 富士通セミコンダクター株式会社 | Manufacturing method of semiconductor device |
US10283321B2 (en) | 2011-01-18 | 2019-05-07 | Applied Materials, Inc. | Semiconductor processing system and methods using capacitively coupled plasma |
US10062578B2 (en) | 2011-03-14 | 2018-08-28 | Applied Materials, Inc. | Methods for etch of metal and metal-oxide films |
US10062587B2 (en) | 2012-07-18 | 2018-08-28 | Applied Materials, Inc. | Pedestal with multi-zone temperature control and multiple purge capabilities |
US10032606B2 (en) | 2012-08-02 | 2018-07-24 | Applied Materials, Inc. | Semiconductor processing with DC assisted RF power for improved control |
US10354843B2 (en) | 2012-09-21 | 2019-07-16 | Applied Materials, Inc. | Chemical control features in wafer process equipment |
US9978564B2 (en) | 2012-09-21 | 2018-05-22 | Applied Materials, Inc. | Chemical control features in wafer process equipment |
US11264213B2 (en) | 2012-09-21 | 2022-03-01 | Applied Materials, Inc. | Chemical control features in wafer process equipment |
US10256079B2 (en) | 2013-02-08 | 2019-04-09 | Applied Materials, Inc. | Semiconductor processing systems having multiple plasma configurations |
US11024486B2 (en) | 2013-02-08 | 2021-06-01 | Applied Materials, Inc. | Semiconductor processing systems having multiple plasma configurations |
JP2015103756A (en) * | 2013-11-27 | 2015-06-04 | 富士通セミコンダクター株式会社 | Method for manufacturing magnetic resistance element |
US10465294B2 (en) | 2014-05-28 | 2019-11-05 | Applied Materials, Inc. | Oxide and metal removal |
US10707061B2 (en) | 2014-10-14 | 2020-07-07 | Applied Materials, Inc. | Systems and methods for internal surface conditioning in plasma processing equipment |
US10796922B2 (en) | 2014-10-14 | 2020-10-06 | Applied Materials, Inc. | Systems and methods for internal surface conditioning assessment in plasma processing equipment |
US10593523B2 (en) | 2014-10-14 | 2020-03-17 | Applied Materials, Inc. | Systems and methods for internal surface conditioning in plasma processing equipment |
US9966240B2 (en) | 2014-10-14 | 2018-05-08 | Applied Materials, Inc. | Systems and methods for internal surface conditioning assessment in plasma processing equipment |
US10490418B2 (en) | 2014-10-14 | 2019-11-26 | Applied Materials, Inc. | Systems and methods for internal surface conditioning assessment in plasma processing equipment |
US11637002B2 (en) | 2014-11-26 | 2023-04-25 | Applied Materials, Inc. | Methods and systems to enhance process uniformity |
US11239061B2 (en) | 2014-11-26 | 2022-02-01 | Applied Materials, Inc. | Methods and systems to enhance process uniformity |
US10573496B2 (en) | 2014-12-09 | 2020-02-25 | Applied Materials, Inc. | Direct outlet toroidal plasma source |
US10224210B2 (en) | 2014-12-09 | 2019-03-05 | Applied Materials, Inc. | Plasma processing system with direct outlet toroidal plasma source |
US11257693B2 (en) | 2015-01-09 | 2022-02-22 | Applied Materials, Inc. | Methods and systems to improve pedestal temperature control |
WO2016118279A1 (en) * | 2015-01-22 | 2016-07-28 | Applied Materials, Inc. | Titanium nitride removal |
US11594428B2 (en) | 2015-02-03 | 2023-02-28 | Applied Materials, Inc. | Low temperature chuck for plasma processing systems |
US10607867B2 (en) | 2015-08-06 | 2020-03-31 | Applied Materials, Inc. | Bolted wafer chuck thermal management systems and methods for wafer processing systems |
US11158527B2 (en) | 2015-08-06 | 2021-10-26 | Applied Materials, Inc. | Thermal management systems and methods for wafer processing systems |
US10468276B2 (en) | 2015-08-06 | 2019-11-05 | Applied Materials, Inc. | Thermal management systems and methods for wafer processing systems |
US10147620B2 (en) | 2015-08-06 | 2018-12-04 | Applied Materials, Inc. | Bolted wafer chuck thermal management systems and methods for wafer processing systems |
US10424463B2 (en) | 2015-08-07 | 2019-09-24 | Applied Materials, Inc. | Oxide etch selectivity systems and methods |
US10424464B2 (en) | 2015-08-07 | 2019-09-24 | Applied Materials, Inc. | Oxide etch selectivity systems and methods |
US10504700B2 (en) | 2015-08-27 | 2019-12-10 | Applied Materials, Inc. | Plasma etching systems and methods with secondary plasma injection |
US11476093B2 (en) | 2015-08-27 | 2022-10-18 | Applied Materials, Inc. | Plasma etching systems and methods with secondary plasma injection |
US11735441B2 (en) | 2016-05-19 | 2023-08-22 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US10522371B2 (en) | 2016-05-19 | 2019-12-31 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US10504754B2 (en) | 2016-05-19 | 2019-12-10 | Applied Materials, Inc. | Systems and methods for improved semiconductor etching and component protection |
US10629473B2 (en) | 2016-09-09 | 2020-04-21 | Applied Materials, Inc. | Footing removal for nitride spacer |
US10062575B2 (en) | 2016-09-09 | 2018-08-28 | Applied Materials, Inc. | Poly directional etch by oxidation |
US10546729B2 (en) | 2016-10-04 | 2020-01-28 | Applied Materials, Inc. | Dual-channel showerhead with improved profile |
US11049698B2 (en) | 2016-10-04 | 2021-06-29 | Applied Materials, Inc. | Dual-channel showerhead with improved profile |
US9934942B1 (en) | 2016-10-04 | 2018-04-03 | Applied Materials, Inc. | Chamber with flow-through source |
US10541113B2 (en) | 2016-10-04 | 2020-01-21 | Applied Materials, Inc. | Chamber with flow-through source |
US10224180B2 (en) | 2016-10-04 | 2019-03-05 | Applied Materials, Inc. | Chamber with flow-through source |
US10062585B2 (en) | 2016-10-04 | 2018-08-28 | Applied Materials, Inc. | Oxygen compatible plasma source |
US10062579B2 (en) | 2016-10-07 | 2018-08-28 | Applied Materials, Inc. | Selective SiN lateral recess |
US10319603B2 (en) | 2016-10-07 | 2019-06-11 | Applied Materials, Inc. | Selective SiN lateral recess |
US9947549B1 (en) | 2016-10-10 | 2018-04-17 | Applied Materials, Inc. | Cobalt-containing material removal |
US10163696B2 (en) | 2016-11-11 | 2018-12-25 | Applied Materials, Inc. | Selective cobalt removal for bottom up gapfill |
US10770346B2 (en) | 2016-11-11 | 2020-09-08 | Applied Materials, Inc. | Selective cobalt removal for bottom up gapfill |
US10186428B2 (en) | 2016-11-11 | 2019-01-22 | Applied Materials, Inc. | Removal methods for high aspect ratio structures |
US10026621B2 (en) | 2016-11-14 | 2018-07-17 | Applied Materials, Inc. | SiN spacer profile patterning |
US10600639B2 (en) | 2016-11-14 | 2020-03-24 | Applied Materials, Inc. | SiN spacer profile patterning |
US10242908B2 (en) | 2016-11-14 | 2019-03-26 | Applied Materials, Inc. | Airgap formation with damage-free copper |
US10566206B2 (en) | 2016-12-27 | 2020-02-18 | Applied Materials, Inc. | Systems and methods for anisotropic material breakthrough |
US10431429B2 (en) | 2017-02-03 | 2019-10-01 | Applied Materials, Inc. | Systems and methods for radial and azimuthal control of plasma uniformity |
US10403507B2 (en) | 2017-02-03 | 2019-09-03 | Applied Materials, Inc. | Shaped etch profile with oxidation |
US10903052B2 (en) | 2017-02-03 | 2021-01-26 | Applied Materials, Inc. | Systems and methods for radial and azimuthal control of plasma uniformity |
US10043684B1 (en) | 2017-02-06 | 2018-08-07 | Applied Materials, Inc. | Self-limiting atomic thermal etching systems and methods |
US10529737B2 (en) | 2017-02-08 | 2020-01-07 | Applied Materials, Inc. | Accommodating imperfectly aligned memory holes |
US10325923B2 (en) | 2017-02-08 | 2019-06-18 | Applied Materials, Inc. | Accommodating imperfectly aligned memory holes |
US10319739B2 (en) | 2017-02-08 | 2019-06-11 | Applied Materials, Inc. | Accommodating imperfectly aligned memory holes |
US10943834B2 (en) | 2017-03-13 | 2021-03-09 | Applied Materials, Inc. | Replacement contact process |
US10319649B2 (en) | 2017-04-11 | 2019-06-11 | Applied Materials, Inc. | Optical emission spectroscopy (OES) for remote plasma monitoring |
US11361939B2 (en) | 2017-05-17 | 2022-06-14 | Applied Materials, Inc. | Semiconductor processing chamber for multiple precursor flow |
US11915950B2 (en) | 2017-05-17 | 2024-02-27 | Applied Materials, Inc. | Multi-zone semiconductor substrate supports |
US11276559B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Semiconductor processing chamber for multiple precursor flow |
US11276590B2 (en) | 2017-05-17 | 2022-03-15 | Applied Materials, Inc. | Multi-zone semiconductor substrate supports |
US10497579B2 (en) | 2017-05-31 | 2019-12-03 | Applied Materials, Inc. | Water-free etching methods |
US10049891B1 (en) | 2017-05-31 | 2018-08-14 | Applied Materials, Inc. | Selective in situ cobalt residue removal |
US10468267B2 (en) | 2017-05-31 | 2019-11-05 | Applied Materials, Inc. | Water-free etching methods |
US10920320B2 (en) | 2017-06-16 | 2021-02-16 | Applied Materials, Inc. | Plasma health determination in semiconductor substrate processing reactors |
US10541246B2 (en) | 2017-06-26 | 2020-01-21 | Applied Materials, Inc. | 3D flash memory cells which discourage cross-cell electrical tunneling |
US10727080B2 (en) | 2017-07-07 | 2020-07-28 | Applied Materials, Inc. | Tantalum-containing material removal |
US10541184B2 (en) | 2017-07-11 | 2020-01-21 | Applied Materials, Inc. | Optical emission spectroscopic techniques for monitoring etching |
US10354889B2 (en) | 2017-07-17 | 2019-07-16 | Applied Materials, Inc. | Non-halogen etching of silicon-containing materials |
US10170336B1 (en) | 2017-08-04 | 2019-01-01 | Applied Materials, Inc. | Methods for anisotropic control of selective silicon removal |
US10593553B2 (en) | 2017-08-04 | 2020-03-17 | Applied Materials, Inc. | Germanium etching systems and methods |
US10043674B1 (en) | 2017-08-04 | 2018-08-07 | Applied Materials, Inc. | Germanium etching systems and methods |
US10297458B2 (en) | 2017-08-07 | 2019-05-21 | Applied Materials, Inc. | Process window widening using coated parts in plasma etch processes |
US11101136B2 (en) | 2017-08-07 | 2021-08-24 | Applied Materials, Inc. | Process window widening using coated parts in plasma etch processes |
US10283324B1 (en) | 2017-10-24 | 2019-05-07 | Applied Materials, Inc. | Oxygen treatment for nitride etching |
US10128086B1 (en) | 2017-10-24 | 2018-11-13 | Applied Materials, Inc. | Silicon pretreatment for nitride removal |
US10256112B1 (en) | 2017-12-08 | 2019-04-09 | Applied Materials, Inc. | Selective tungsten removal |
US10903054B2 (en) | 2017-12-19 | 2021-01-26 | Applied Materials, Inc. | Multi-zone gas distribution systems and methods |
US11328909B2 (en) | 2017-12-22 | 2022-05-10 | Applied Materials, Inc. | Chamber conditioning and removal processes |
US10861676B2 (en) | 2018-01-08 | 2020-12-08 | Applied Materials, Inc. | Metal recess for semiconductor structures |
US10854426B2 (en) | 2018-01-08 | 2020-12-01 | Applied Materials, Inc. | Metal recess for semiconductor structures |
US10964512B2 (en) | 2018-02-15 | 2021-03-30 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus and methods |
US10679870B2 (en) | 2018-02-15 | 2020-06-09 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus |
US10699921B2 (en) | 2018-02-15 | 2020-06-30 | Applied Materials, Inc. | Semiconductor processing chamber multistage mixing apparatus |
US10615047B2 (en) | 2018-02-28 | 2020-04-07 | Applied Materials, Inc. | Systems and methods to form airgaps |
US10593560B2 (en) | 2018-03-01 | 2020-03-17 | Applied Materials, Inc. | Magnetic induction plasma source for semiconductor processes and equipment |
US10319600B1 (en) | 2018-03-12 | 2019-06-11 | Applied Materials, Inc. | Thermal silicon etch |
US11004689B2 (en) | 2018-03-12 | 2021-05-11 | Applied Materials, Inc. | Thermal silicon etch |
US10497573B2 (en) | 2018-03-13 | 2019-12-03 | Applied Materials, Inc. | Selective atomic layer etching of semiconductor materials |
US10573527B2 (en) | 2018-04-06 | 2020-02-25 | Applied Materials, Inc. | Gas-phase selective etching systems and methods |
US10490406B2 (en) | 2018-04-10 | 2019-11-26 | Appled Materials, Inc. | Systems and methods for material breakthrough |
US10699879B2 (en) | 2018-04-17 | 2020-06-30 | Applied Materials, Inc. | Two piece electrode assembly with gap for plasma control |
US10886137B2 (en) | 2018-04-30 | 2021-01-05 | Applied Materials, Inc. | Selective nitride removal |
US10755941B2 (en) | 2018-07-06 | 2020-08-25 | Applied Materials, Inc. | Self-limiting selective etching systems and methods |
US10872778B2 (en) | 2018-07-06 | 2020-12-22 | Applied Materials, Inc. | Systems and methods utilizing solid-phase etchants |
US10672642B2 (en) | 2018-07-24 | 2020-06-02 | Applied Materials, Inc. | Systems and methods for pedestal configuration |
US10892198B2 (en) | 2018-09-14 | 2021-01-12 | Applied Materials, Inc. | Systems and methods for improved performance in semiconductor processing |
US11049755B2 (en) | 2018-09-14 | 2021-06-29 | Applied Materials, Inc. | Semiconductor substrate supports with embedded RF shield |
US11062887B2 (en) | 2018-09-17 | 2021-07-13 | Applied Materials, Inc. | High temperature RF heater pedestals |
US11417534B2 (en) | 2018-09-21 | 2022-08-16 | Applied Materials, Inc. | Selective material removal |
US11682560B2 (en) | 2018-10-11 | 2023-06-20 | Applied Materials, Inc. | Systems and methods for hafnium-containing film removal |
US11121002B2 (en) | 2018-10-24 | 2021-09-14 | Applied Materials, Inc. | Systems and methods for etching metals and metal derivatives |
US11437242B2 (en) | 2018-11-27 | 2022-09-06 | Applied Materials, Inc. | Selective removal of silicon-containing materials |
US11721527B2 (en) | 2019-01-07 | 2023-08-08 | Applied Materials, Inc. | Processing chamber mixing systems |
US10920319B2 (en) | 2019-01-11 | 2021-02-16 | Applied Materials, Inc. | Ceramic showerheads with conductive electrodes |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2001313282A (en) | Method of dry etching | |
JP3803523B2 (en) | Dry etching method and semiconductor device manufacturing method | |
JP3571784B2 (en) | Semiconductor device wiring forming method | |
JP2952574B2 (en) | Method of forming metal wiring | |
US6753133B2 (en) | Method and manufacturing a semiconductor device having a ruthenium or a ruthenium oxide | |
US5776356A (en) | Method for etching ferroelectric film | |
KR100604662B1 (en) | Semiconductor device capable of improving adhesion characteristic between upper electrode and interlayer insulating layer and method for forming the same | |
WO1997035341A1 (en) | Semiconductor storage device and its manufacture | |
JP2003298022A (en) | Ferroelectric memory and method of manufacturing the same | |
JP2983356B2 (en) | Method for manufacturing semiconductor device | |
JP3367600B2 (en) | Method of manufacturing dielectric thin film element | |
JP2000294544A (en) | Dry etching method | |
JP3166747B2 (en) | Method for manufacturing capacitor and capacitor | |
JP2985396B2 (en) | Post-treatment method after dry etching | |
JP3704030B2 (en) | Manufacturing method of semiconductor device | |
JP3565132B2 (en) | Dry etching process and method for manufacturing semiconductor device using the same | |
JP2000183287A (en) | Etching method of dielectric thin film and semiconductor device | |
JPH0888329A (en) | Manufacture of semiconductor device | |
US20060166379A1 (en) | Method for manufacturing ferroelectric capacitor | |
JP3114640B2 (en) | Method for manufacturing semiconductor device | |
JP3243975B2 (en) | Method for manufacturing semiconductor device | |
JP2004241692A (en) | Manufacturing method of ferroelectric memory element | |
US20020105018A1 (en) | Semiconductor device and process for manufacturing the same | |
JP4023191B2 (en) | Ferroelectric memory and manufacturing method thereof | |
JP3403031B2 (en) | Method for manufacturing semiconductor device |