JP2000299504A - Semiconductor material and manufacture thereof - Google Patents
Semiconductor material and manufacture thereofInfo
- Publication number
- JP2000299504A JP2000299504A JP11105514A JP10551499A JP2000299504A JP 2000299504 A JP2000299504 A JP 2000299504A JP 11105514 A JP11105514 A JP 11105514A JP 10551499 A JP10551499 A JP 10551499A JP 2000299504 A JP2000299504 A JP 2000299504A
- Authority
- JP
- Japan
- Prior art keywords
- laminated
- self
- film
- supporting
- supporting film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、複数の材料からな
る積層構造を有する半導体材料およびその製造方法に関
するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor material having a laminated structure composed of a plurality of materials and a method for manufacturing the same.
【０００２】[0002]
【従来の技術と発明が解決しようとする課題】複数の材
料を順次繰り返し積層することにより形成された半導体
材料は、高温超伝導材料、圧電材料またはコンデンサ材
料などとしての特性を発揮するのに有用であることが知
られている。近年、熱電変換材料として、異なる化合物
からなる２種類の層を交互に積層してなり、一層当たり
の膜厚が数ｎｍである半導体材料、いわゆる超格子構造
を有する半導体材料（Ｒａｍａ Ｖｅｎｋａｔａｓｕｂ
ｒａｍａｎｉａｎ，ｅｔ．ａｌ， Ｔｈｅ １２ｔｈ
Ｉｎｔｅｒｎａｔｉｏｎａｌ Ｃｏｎｆｅｒｅｎｃｅｏ
ｎ Ｔｈｅｒｍｏｅｌｅｃｔｒｉｃｓ， １９９３，
ｐ．３２２−３２７．）が知られ、これを用いた熱電変
換素子が提案されている。2. Description of the Related Art A semiconductor material formed by sequentially and repeatedly laminating a plurality of materials is useful for exhibiting characteristics as a high-temperature superconducting material, a piezoelectric material or a capacitor material. It is known that 2. Description of the Related Art In recent years, as a thermoelectric conversion material, a semiconductor material in which two types of layers made of different compounds are alternately laminated and the thickness of one layer is several nm, that is, a semiconductor material having a so-called superlattice structure (Rama Venkatasub)
ramanian, et. al, The 12th
International Conference
n Thermoelectrics, 1993,
p. 322-327. ) Is known, and a thermoelectric conversion element using the same is proposed.
【０００３】このような熱電変換素子においては、半導
体材料が微細な積層ピッチで構成されたものであり、半
導体材料の積層界面を垂直方向に通電させるような場合
は、積層界面でフォノン（材料内の結晶格子の振動によ
る熱伝導を量子化した考え方）の散乱が起きるため、熱
伝導率が大幅に低下する。そこで、本発明において、同
様の材料を用いてレーザーアブレーション法により積層
ピッチ１０〜５０ｎｍ、膜厚１μｍ（積層数２００〜１
０００）の薄膜材料を作成し、その熱伝導率を測定した
ところ、図７に示すように、積層ピッチの微細化が積層
界面における垂直方向の熱伝導率を大幅に低減すること
が分かった。[0003] In such a thermoelectric conversion element, the semiconductor material is formed with a fine lamination pitch, and when the lamination interface of the semiconductor material is energized in the vertical direction, phonons (in the material) are generated at the lamination interface. (A concept of quantizing the thermal conduction due to the vibration of the crystal lattice), the thermal conductivity is greatly reduced. Therefore, in the present invention, the same material is used for the lamination pitch of 10 to 50 nm and the film thickness of 1 μm (the number of laminations is 200 to 1) by laser ablation.
000), and the thermal conductivity was measured. As shown in FIG. 7, it was found that the miniaturization of the lamination pitch greatly reduced the vertical thermal conductivity at the lamination interface.
【０００４】また、熱電冷却あるいは熱電発電用デバイ
ス（総称して熱電変換デバイス）の熱伝導率は、半導体
材料の構造だけではなく、半導体材料の膜厚によっても
変動する。例えば、一般的な熱電変換デバイスの構造を
図８（ただし、ここでは絶縁基板および電極を図示して
いない）に示す。このデバイスではＰ型熱電変換素子１
０１とＮ型熱電変換素子１０２とからなる熱電変換素子
が電極１０３によって電気的に交互に直列接続されてい
る。このデバイスの第１の終端電極１０４に「＋」、第
２の終端電極１０５に「−」の直流電圧を印加すれば上
面が吸熱（冷却）下面が放熱（加熱）面となり、ヒート
ポンプとして動作するが、この場合、高温側と低温側の
温度差によって熱の逆流が起きる。この逆流を抑えてデ
バイスの効率を上げるためには、熱電変換素子１０１お
よび１０２の膜厚を厚くする（高温側と低温側の距離を
大きくする）必要がある。[0004] The thermal conductivity of a device for thermoelectric cooling or thermoelectric power generation (generally referred to as a thermoelectric conversion device) varies depending not only on the structure of the semiconductor material but also on the thickness of the semiconductor material. For example, a structure of a general thermoelectric conversion device is shown in FIG. 8 (however, an insulating substrate and electrodes are not shown here). In this device, the P-type thermoelectric conversion element 1
The thermoelectric conversion elements, each of which is composed of a thermoelectric conversion element 01 and an N-type thermoelectric conversion element 102, are electrically and alternately connected in series by electrodes 103. When a DC voltage of "+" is applied to the first terminal electrode 104 and "-" is applied to the second terminal electrode 105 of this device, the upper surface becomes an endothermic (cooling) surface and the lower surface becomes a heat releasing (heating) surface, and operates as a heat pump. However, in this case, a heat flow occurs due to a temperature difference between the high temperature side and the low temperature side. In order to suppress the backflow and increase the efficiency of the device, it is necessary to increase the thickness of the thermoelectric conversion elements 101 and 102 (to increase the distance between the high-temperature side and the low-temperature side).
【０００５】熱電変換素子の性質が一定（無次元性能指
数ＺＴ＝５）であると仮定して、素子の厚みＨと熱電変
換効率（ＣＯＰ）の関係を計算した結果を図９に示す。
このグラフを見れば、膜厚の厚い熱電変換素子が薄いも
のよりもＣＯＰが高く、熱の逆流が小さくなることを示
している。FIG. 9 shows the result of calculating the relationship between the thickness H of the element and the thermoelectric conversion efficiency (COP), assuming that the properties of the thermoelectric element are constant (the dimensionless figure of merit ZT = 5).
This graph shows that the thicker thermoelectric conversion element has a higher COP than the thinner thermoelectric conversion element, and the heat backflow is smaller.
【０００６】以上のように、超格子構造を有する半導体
材料または膜厚が厚い半導体材料からなる熱電変換素子
は、熱伝導率を低減することができる。しかしながら、
これらの熱電変換素子は熱電変換効率の点において未だ
満足できるものではなかった。As described above, a thermoelectric element made of a semiconductor material having a superlattice structure or a semiconductor material having a large film thickness can reduce the thermal conductivity. However,
These thermoelectric conversion elements have not been satisfactory in terms of thermoelectric conversion efficiency.
【０００７】半導体材料の一つであるバルク型熱電材料
の製造方法としては、複数の高純度の原料を秤量し、そ
の原料を不活性ガズ雰囲気に封入した後、ロッキング炉
で融点より高い温度で均一に溶融撹拌し、次いでブリッ
ジマン炉で結晶の方向性を一定にする一方向性の凝固を
行う方法（溶成法）が知られている。この方法によれば
異方性材料が製造でき、結晶軸方向に通電する場合は、
熱電変換効率が高い材料となる。しかしながらこの製造
方法により得られる異方性材料は、劈開性が強く機械的
強度が弱いという問題がある。[0007] As a method of manufacturing a bulk type thermoelectric material, which is one of the semiconductor materials, a plurality of high-purity raw materials are weighed, and the raw materials are sealed in an inert gas atmosphere. There is known a method of uniformly melting and stirring and then performing unidirectional solidification in a Bridgman furnace to keep the directionality of crystals constant (melting method). According to this method, an anisotropic material can be manufactured, and when energizing in the crystal axis direction,
The material has high thermoelectric conversion efficiency. However, the anisotropic material obtained by this manufacturing method has a problem that it has a high cleavage property and a low mechanical strength.
【０００８】このような問題を解決するために、溶成法
により一旦製造したインゴットを粉砕して粉体にし、こ
の粉体を融点以下で焼結させて熱電材料を製造する焼結
法がある。この方法により製造される熱電材料は、溶成
法により製造された熱電材料のように結晶軸は揃ってい
ないが、機械的強度が強く、組成やドーパントの量を変
えることで熱電性能を向上させることが可能である。[0008] In order to solve such a problem, there is a sintering method for manufacturing a thermoelectric material by pulverizing an ingot once manufactured by a fusion method into powder, and sintering the powder at a melting point or less. . The thermoelectric material manufactured by this method does not have the same crystallographic axis as the thermoelectric material manufactured by the fusion method, but has a high mechanical strength, and improves the thermoelectric performance by changing the composition and the amount of the dopant. It is possible.
【０００９】これらの溶成法および焼結法によって製造
されたインゴットは、所定の素子寸法に切断されて熱電
変換素子となる。Ｐ型とＮ型の熱電変換素子は、その性
質が最大に発揮できる方向（材料の異方性による）に向
けて交互に整列させ、次いで、電極と接触させる面に半
田ペーストを塗布し、電極が形成される。これによりＰ
型とＮ型の熱電変換素子は電極を介して直列接続され
る。このようにして図８に示すような熱電変換デバイス
を製造することができる。[0009] The ingot manufactured by the above-mentioned fusion method and sintering method is cut into a predetermined element size to obtain a thermoelectric conversion element. The P-type and N-type thermoelectric conversion elements are alternately aligned in a direction (depending on the anisotropy of the material) in which the properties can be maximized, and then a solder paste is applied to a surface to be brought into contact with the electrode, Is formed. This gives P
The type and N-type thermoelectric conversion elements are connected in series via electrodes. Thus, a thermoelectric conversion device as shown in FIG. 8 can be manufactured.
【００１０】また、半導体材料のうち熱電材料以外の積
層材料とその製造方法については、例えば特開平２−３
８３１３号公報に、Ｂｉを含む材料と銅およびアルカリ
土類金属を含む材料を周期的に積層させた高温超伝導材
料およびその製造方法が開示されている。この方法は、
４種類のターゲットを１つの真空容器に設置し、それら
のターゲットをスリットを設けた回転シャッターにてマ
スクしながら順次スパッタすることにより周期的な積層
材料を製造するというものである。[0010] Regarding a laminated material other than a thermoelectric material among semiconductor materials and a method of manufacturing the same, see, for example, JP-A-Hei 2-3
No. 8313 discloses a high-temperature superconducting material in which a material containing Bi and a material containing copper and an alkaline earth metal are periodically laminated, and a production method thereof. This method
Four types of targets are placed in one vacuum vessel, and these targets are sequentially sputtered while being masked by a rotary shutter provided with slits, thereby producing a periodic laminated material.
【００１１】また、結晶性が特に要求されるレーザー素
子の半導体材料を形成する方法としては、基板の加熱温
度を制御し、前記基板上に強度を制御した分子線を入射
させてエピタキシャル成長を行う分子線エピタキシー法
（ＭＢＥ法）も知られている。As a method of forming a semiconductor material of a laser element particularly requiring crystallinity, a method of controlling a heating temperature of a substrate and causing a molecular beam having a controlled intensity to be incident on the substrate to perform epitaxial growth. The line epitaxy method (MBE method) is also known.
【００１２】以上に挙げた溶成法や焼結法またはレーザ
ーアブレーション法、スパッタ法、ＭＢＥ法等の真空装
置による気相法は、制御性が良く、種々の積層材料が製
造できる方法であり、半導体産業において不可欠な技術
である。しかしながら、これらの方法によれば、例え
ば、レーザー素子用のＧａＡｓ／ＡｌＡｓ超格子が製造
できるが、成膜に時間を要するため、積層数の多い積層
材料を製造するのは困難であった。したがって、素子の
厚みが数ｍｍ程度で、積層ピッチが数十ｎｍ程度である
場合、すなわち積層数が数千〜数万にも及ぶ積層材料を
製造する場合には、気相法は非常に時間を要するため、
これらの方法を工業用に用いることは困難であった。ま
た、これらの方法では、たとえ時間をかけて積層して
も、下層で生じた格子欠陥や表面の凹凸が積層するにつ
れて大きくなり、大きな機械的残留応力が生じたり、表
面のマクロ単位での平坦性や表面と基板との平行が保た
れなくなり、厚み方向における下層から上層までを均一
に積層することが困難であった。The vapor phase method using a vacuum apparatus such as the melting method, the sintering method, the laser ablation method, the sputtering method, and the MBE method described above is a method having good controllability and capable of producing various laminated materials. This is an indispensable technology in the semiconductor industry. However, according to these methods, for example, a GaAs / AlAs superlattice for a laser element can be manufactured, but it takes time for film formation, and it has been difficult to manufacture a laminated material having a large number of layers. Therefore, when the thickness of the element is about several mm and the lamination pitch is about several tens nm, that is, when a laminated material having a number of laminations of several thousands to tens of thousands is manufactured, the vapor phase method takes a very long time. Requires
It has been difficult to use these methods for industrial use. In addition, in these methods, even if the lamination is performed over time, lattice defects and surface irregularities generated in the lower layer become larger as the lamination increases, resulting in large mechanical residual stress or flattening of the surface in macro units. The properties and the parallelism between the surface and the substrate were not maintained, and it was difficult to uniformly laminate the lower layer to the upper layer in the thickness direction.
【００１３】これに対して、超格子レーザー素子を高速
で製造する方法として、真空容器を用いずに、ほぼ大気
圧下で基板上に薄膜を成長させる方法（液相エピタキシ
ー法：ＬＰＥ法）がある。この方法では、低融点の金属
を溶媒とし、その中に材料結晶を溶質として飽和溶解さ
せておき、溶解度の温度依存性を利用して過飽和状態に
した溶質を種結晶基板上に析出させることにより基板と
同一の結晶方位を持つ単結晶の成長層を得ることができ
る。しかしながら、この方法では、高速で積層材料を製
造できるが、積層すべき材料を溶融分散させる溶媒が必
要であったり、また、積層すべき材料が２種類以上の組
成からなる化合物である場合には、偏析を避けるために
膜面温度と溶液温度を制御する必要があった。このうち
膜面温度は基板温度を調節することにより制御するた
め、積層厚みが数ｍｍにも及ぶような厚みが大きい場合
には、厚みに応じて基板温度を精密に変化させる必要が
あり、製造工程が複雑であった。On the other hand, as a method of manufacturing a superlattice laser element at a high speed, a method of growing a thin film on a substrate at substantially atmospheric pressure without using a vacuum vessel (liquid phase epitaxy method: LPE method) is known. is there. In this method, a low melting point metal is used as a solvent, and material crystals are saturated and dissolved therein as a solute, and a supersaturated solute is deposited on a seed crystal substrate by utilizing the temperature dependency of solubility. A single crystal growth layer having the same crystal orientation as the substrate can be obtained. However, in this method, a laminated material can be produced at a high speed, but when a solvent for melting and dispersing the material to be laminated is required, or when the material to be laminated is a compound having two or more compositions, In addition, it was necessary to control the film surface temperature and the solution temperature in order to avoid segregation. Of these, the film surface temperature is controlled by adjusting the substrate temperature. Therefore, when the thickness of the laminate is as large as several mm, it is necessary to precisely change the substrate temperature according to the thickness. The process was complicated.
【００１４】本発明は、このような問題を解決するため
になされたものであり、熱伝導率が低く、熱電変換効率
のよい熱電変換素子を提供し、また、比較的簡便な方法
により短い気相成長時間で上記熱電変換素子を製造する
方法を提供するものである。The present invention has been made to solve such a problem, and provides a thermoelectric conversion element having a low thermal conductivity and a high thermoelectric conversion efficiency. Another object of the present invention is to provide a method for manufacturing the thermoelectric conversion element in a phase growth time.
【００１５】[0015]
【課題を解決するための手段】本発明によれば、異なる
化合物からなる複数種類の層が順次繰り返し積層されて
なる積層相と、前記複数種類の層が焼結されてなる焼結
反応相とが交互に積層して一体化されていることを特徴
とする半導体材料が提供される。According to the present invention, there are provided a laminated phase in which a plurality of layers composed of different compounds are sequentially and repeatedly laminated, and a sintering reaction phase in which the plurality of layers are sintered. Are alternately laminated and integrated to provide a semiconductor material.
【００１６】また、異なる化合物からなる複数種類の層
を順次繰り返し積層して積層自立膜を形成し、該積層自
立膜をその厚さ方向に複数枚積層して加熱しながら加圧
することにより各積層自立膜の表面を熔融固着して焼結
反応相を形成するとともに複数の積層自立膜を一体化さ
せることを特徴とする積層相と焼結反応相とが交互に積
層されてなる半導体材料の製造方法が提供される。Also, a plurality of layers composed of different compounds are sequentially and repeatedly laminated to form a laminated self-supporting film, and a plurality of the laminated self-supporting films are laminated in the thickness direction, and heated and pressurized while heating. Manufacturing a semiconductor material in which a laminated phase and a sintering reaction phase are alternately laminated by forming a sintering reaction phase by fusing the surface of the self-supporting film and forming a sintering reaction phase. A method is provided.
【００１７】また、異なる化合物からなる複数種類の層
を順次繰り返し積層して積層自立膜を形成し、該積層自
立膜を所定の大きさに裁断し、裁断された積層自立膜を
その厚さ方向に複数枚積層して加熱しながら加圧するこ
とにより各積層自立膜の表面を熔融固着して焼結反応相
を形成するとともに複数の積層自立膜を一体化させるこ
とを特徴とする積層相と焼結反応相とが交互に積層され
てなる半導体材料の製造方法が提供される。Also, a plurality of layers composed of different compounds are sequentially and repeatedly laminated to form a laminated free-standing film, the laminated free-standing film is cut into a predetermined size, and the cut laminated free-standing film is cut in its thickness direction. By laminating a plurality of self-supporting films and applying pressure while heating, the surface of each self-supporting film is melt-fixed to form a sintering reaction phase, and the plurality of self-supporting films are integrated. There is provided a method for manufacturing a semiconductor material in which a binding reaction phase is alternately stacked.
【００１８】また、異なる化合物からなる複数種類の層
を順次繰り返し積層して積層自立膜を形成し、異なる大
きさおよび／または異なる形の積層自立膜を複数枚積層
し、次いで加圧することにより各積層自立膜の隙間に生
じた空間を積層自立膜の破片で充填し、次いで加熱しな
がら加圧することにより各積層自立膜の表面を熔融固着
して焼結反応相を形成するとともに各積層自立膜の隙間
に生じた空間に充填された積層自立膜の破片を熔融固着
して焼結反応相を形成することを特徴とする積層相また
は焼結反応相で分割された積層相と焼結反応相とが交互
に積層されてなる半導体材料の製造方法が提供される。Further, a plurality of layers composed of different compounds are sequentially and repeatedly laminated to form a laminated self-supporting film, a plurality of laminated self-supporting films having different sizes and / or different shapes are laminated, and then each of the films is pressurized. The space created in the gap between the stacked free-standing films is filled with fragments of the stacked free-standing films, and then heated and pressurized to melt and fix the surface of each stacked free-standing film to form a sintering reaction phase and to form each stacked free-standing film. Characterized in that a sintering reaction phase is formed by melting and fixing the pieces of the self-supporting laminated film filled in the space generated in the gap between the sintering reaction phase and the sintering phase divided by the sintering reaction phase And a method for manufacturing a semiconductor material, which is alternately laminated.
【００１９】[0019]
【発明の実施の形態】本発明の半導体材料を製造するに
際して、先ず、基板上に異なる化合物からなる複数種類
の層を順次繰り返し積層して積層自立膜を形成する。基
板としては、通常用いられているものなら特に限定され
ないが、ガラス基板が好適に用いられる。DESCRIPTION OF THE PREFERRED EMBODIMENTS In manufacturing a semiconductor material according to the present invention, first, a plurality of layers composed of different compounds are sequentially and repeatedly laminated on a substrate to form a laminated self-supporting film. The substrate is not particularly limited as long as it is commonly used, but a glass substrate is suitably used.
【００２０】複数種類の各層を構成する化合物として
は、例えばＢｉ2 Ｔｅ3 、Ｓｂ2 Ｔｅ 3 、Ｂｉ2 Ｓ
ｅ3 、Ｓｂ2 Ｓｅ3 等が挙げられ、なかでもＢｉ2 Ｔｅ
3 、Ｓｂ2Ｔｅ3 が好ましい。積層する方法としては、
ＭＢＥ法、スパッタ法、レーザーアブレーション法、多
元蒸着法等が挙げられる。As a compound constituting each of a plurality of types of layers,
Is, for example, BiTwoTeThree, SbTwoTe Three, BiTwoS
eThree, SbTwoSeThreeEtc., among which BiTwoTe
Three, SbTwoTeThreeIs preferred. As a method of laminating,
MBE method, sputtering method, laser ablation method,
Source evaporation method and the like.
【００２１】複数種類の各層の積層順としては特に限定
されず、どのような順であってもよい。例えば、３種類
のＡ層、Ｂ層、Ｃ層を積層する場合は、最下層からＡ層
／Ｂ層／Ｃ層、Ａ層／Ａ層／Ｂ層／Ｃ層、Ａ層／Ｂ層／
Ｂ層／Ｃ層等と順次繰り返し積層したものが挙げられ
る。複数種類の各層を成膜する際に、Ｔｅ、Ｉ、ＡｇＩ
またはＣｕＢｒ2 等のドナーを用いてもよく、ドナーを
各層に適宜拡散することによりＰ型またはＮ型の積層自
立膜に調製することができる。The order of laminating a plurality of types of layers is not particularly limited, and may be any order. For example, when three types of A layer, B layer, and C layer are laminated, A layer / B layer / C layer, A layer / A layer / B layer / C layer, and A layer / B layer /
One that is sequentially and repeatedly laminated with the B layer / C layer and the like is mentioned. When depositing a plurality of types of layers, Te, I, AgI
Alternatively, a donor such as CuBr 2 may be used, and a P-type or N-type laminated free-standing film can be prepared by appropriately diffusing the donor into each layer.
【００２２】例えば、Ｂｉ2 Ｔｅ3 とＳｂ2 Ｔｅ3 とを
積層した材料はそのままの状態でＰ型積層自立膜として
使用できるのに対し、Ｂｉ2 Ｔｅ3 とＢｉ2 Ｓｅ3 とを
積層した材料ではＢｉ2 Ｔｅ3 はＰ型膜で、Ｂｉ2 Ｓｅ
3 はＮ型膜であり、そのままの状態ではＮ型の積層自立
膜として使用することが難しい。そこで、Ｂｉ2 Ｔｅ 3
のＰ型膜に例えばドナーとしてＴｅを２重量％以上、Ｉ
を０．５重量％以上、ＡｇＩを０．０５重量％以上また
はＣｕＢｒ2 を０．０５重量％以上拡散させることによ
り、Ｂｉ2 Ｔｅ3 のＰ型膜をＮ型膜に変えることがで
き、Ｂｉ2 Ｔｅ3とＢｉ2 Ｓｅ3 とを積層した材料をＮ
型の積層自立膜として使用できるようになる。なお、ド
ナーを拡散させるときは、積層自立膜の製造工程を簡便
にするためにも、成膜時にＰ型膜のＢｉ2 Ｔｅ3 とＮ型
膜のＢｉ2 Ｓｅ3 との両方にドナーを拡散させてもよ
く、また、成膜後、積層自立膜にドナーを拡散させても
よい。複数種類の各層の膜厚（積層自立膜の積層ピッ
チ）は、１０〜５０ｎｍが好ましく、１０〜２０ｎｍが
さらに好ましい。積層自立膜の膜厚はハンドリングの良
さから１〜１０μｍが好ましい。For example, BiTwoTeThreeAnd SbTwoTeThreeAnd
The laminated material remains as it is as a P-type laminated free-standing film
Can be used while BiTwoTeThreeAnd BiTwoSeThreeAnd
Bi in the laminated materialTwoTeThreeIs a P-type membrane, BiTwoSe
ThreeIs an N-type film, and as it is, an N-type laminated self-supporting
Difficult to use as a membrane. So BiTwoTe Three
In the P-type film, for example, at least 2% by weight of Te as a donor and I
0.5% by weight or more, AgI 0.05% by weight or more
Is CuBrTwoBy diffusing 0.05% by weight or more of
, BiTwoTeThreeCan be changed from P-type film to N-type film
Come, BiTwoTeThreeAnd BiTwoSeThreeAnd N
It can be used as a laminated self-supporting film of a mold. Note that
When diffusing the toner, the manufacturing process of the laminated self-supporting film is simplified.
In order to achieve this, the P-type film BiTwoTeThreeAnd N type
Bi of membraneTwoSeThreeYou can spread the donor to both
In addition, after the film is formed, the donor
Good. The film thickness of each layer of multiple types (laminated
H) is preferably from 10 to 50 nm, more preferably from 10 to 20 nm.
More preferred. The thickness of the laminated self-supporting film is good for handling.
From this, 1 to 10 μm is preferable.
【００２３】次に、フッ素酸水溶液のような除去液で基
板を除去することにより積層自立膜が得られる。得られ
た積層自立膜を複数枚積み重ね、加熱しながら加圧する
ことにより各積層自立膜の表面を熔融固着して焼結反応
相を形成する。ここで、各積層自立膜の表面以外の部分
は溶融固着されないため、積層自立膜の構成がそのまま
残り積層相を形成する。Next, the substrate is removed with a removing solution such as an aqueous solution of fluorinated acid to obtain a laminated self-supporting film. By stacking a plurality of the obtained laminated self-supporting films and applying pressure while heating, the surface of each laminated self-supporting film is melt-fixed to form a sintering reaction phase. Here, since the portions other than the surface of each laminated self-supporting film are not melted and fixed, the configuration of the laminated self-supporting film remains as it is to form a laminated phase.
【００２４】積層自立膜を積み重ねるときは、図２およ
び図５に示されるように各積層自立膜の積層方向が一致
するように積み重ねる。各積層自立膜は、所定の大きさ
の熱電変換素子を製造するために、加圧する前に所定の
大きさに裁断してもよい。所定の大きさとしては特に限
定されないが、最終的に得られる半導体材料の断面積よ
り少し大きいことが好ましい。積み重ねる積層自立膜の
枚数は、積層自立膜の膜厚により変動するが、２００〜
２０００枚が好ましい。When stacking the self-supporting films, the self-supporting films are stacked so that the stacking directions of the self-supporting films coincide with each other as shown in FIGS. Each laminated self-supporting film may be cut into a predetermined size before pressing in order to manufacture a thermoelectric conversion element of a predetermined size. The predetermined size is not particularly limited, but is preferably slightly larger than the cross-sectional area of the finally obtained semiconductor material. The number of stacked free-standing films varies depending on the thickness of the stacked free-standing films,
2000 sheets are preferred.
【００２５】積み重ねた積層自立膜を加熱しながら加圧
するに際して、例えば積層自立膜がＢｉ2 Ｔｅ3 ／Ｓｂ
2 Ｔｅ3 の２層構成では、加熱温度は低沸点成分である
Ｔｅの最蒸発、拡散による界面の不明瞭化、および焼結
界面の接着性に影響するため、２８０〜３６０℃が好ま
しく、２８０〜３００℃がさらに好ましい。加圧すると
きの圧力は、積層自立膜の割れが起こらないよう、５０
ｋｇ／ｃｍ2 以下が好ましく、１０〜３０ｋｇ／ｃｍ2
がさらに好ましい。加圧・加熱時間は２０〜６０分が適
度であり、それ以上の時間をかけると不要な拡散を生
じ、界面の不明瞭化を引き起こしやすく好ましくない。When the stacked free-standing films are pressurized while being heated, for example, the stacked free-standing films are made of Bi 2 Te 3 / Sb.
In the two-layer structure of 2 Te 3 , the heating temperature is preferably 280 to 360 ° C. because it affects the re-evaporation of Te, which is a low boiling point component, the obscuration of the interface due to diffusion, and the adhesiveness of the sintered interface. ~ 300 ° C is more preferred. The pressure at the time of pressurization is set at 50 to prevent cracking of the self-supporting laminated film.
kg / cm 2 or less, preferably 10 to 30 kg / cm 2
Is more preferred. The time for pressurization / heating is appropriate for 20 to 60 minutes, and if the time is longer than that, unnecessary diffusion occurs, and the interface becomes unclear, which is not preferable.
【００２６】以上の工程により、積層相と焼結反応相と
が交互に積層されてなる半導体材料が得られる。この半
導体材料を所定の大きさに裁断することで、熱電変換素
子が得られる。得られた熱電変換素子は、熱伝導率を低
減させ、かつ機械的強度をもたせるために、好ましくは
１〜５ｍｍ程度、更に好ましくは２〜３ｍｍ程度の立方
体であるのが好ましい。Through the above steps, a semiconductor material is obtained in which the lamination phase and the sintering reaction phase are alternately laminated. By cutting this semiconductor material into a predetermined size, a thermoelectric conversion element can be obtained. The obtained thermoelectric conversion element is preferably a cube of about 1 to 5 mm, more preferably about 2 to 3 mm, in order to reduce the thermal conductivity and to provide mechanical strength.
【００２７】以下、実施の形態１〜４により、本発明の
半導体材料およびその製造方法を具体的に説明する。 実施の形態１ 本発明の半導体材料およびその製造方法の一例を以下に
詳述し、その方法により製造された積層自立膜の構成を
図１に示す。積層自立膜１は、主としてＢｉ2 Ｔｅ3 の
層１８とＳｂ2 Ｔｅ3 の層１９を順次繰り返し積層した
もので、積層ピッチｐは５０ｎｍ、膜厚ｄは１０μｍで
ある。この積層自立膜１の製造方法は図示しないが、例
えばガラスを基板として、ＭＢＥ法、スパッタ法、レー
ザーアブレーション法等によってＢｉ2 Ｔｅ3 の層１８
とＳｂ2 Ｔｅ3 の層１９を交互に気相成長させ、成膜後
にガラス基板のみをフッ素酸水溶液などの除去液にて除
去して得られる。なお、Ｂｉ2 Ｔｅ3 ／Ｓｂ2Ｔｅ3 の
積層膜はそれ自体がＰ型の導電性を示すが、成膜時また
は成膜後に例えばＡｇＩを拡散することによりＮ型の積
層自立膜とすることができる。Hereinafter, the semiconductor material of the present invention and the method for manufacturing the same will be described in detail with reference to Embodiments 1 to 4. Embodiment 1 An example of a semiconductor material of the present invention and a method for manufacturing the same will be described in detail below, and FIG. 1 shows a configuration of a laminated free-standing film manufactured by the method. The layered self-supporting film 1 is a layer in which a layer 18 of Bi 2 Te 3 and a layer 19 of Sb 2 Te 3 are repeatedly laminated in order, and the laminating pitch p is 50 nm and the film thickness d is 10 μm. Although a manufacturing method of the laminated self-supporting film 1 is not shown, for example, a Bi 2 Te 3 layer 18 is formed on a glass substrate by MBE, sputtering, laser ablation, or the like.
And a layer 19 of Sb 2 Te 3 are alternately vapor-phase grown, and after film formation, only the glass substrate is removed with a removing solution such as a fluoric acid aqueous solution. Note that the Bi 2 Te 3 / Sb 2 Te 3 laminated film itself exhibits P-type conductivity. However, at the time of film formation or after film formation, for example, AgI is diffused to form an N-type laminated free-standing film. Can be.
【００２８】積層自立膜１のプレス工程を図２に示す。
積層自立膜１は、ダイサーによって３ｍｍ角の正方形に
カットされ、膜厚１０μｍの積層自立膜片２が複数形成
される〔図２（ｂ）〕。積層自立膜片２は洗浄され乾燥
した後、３００枚積み重ねて、３ｍｍ角より若干大き
く、深さが５ｍｍであるダイスの凹部３ａ内に挿入され
る。ダイス３はダイスヒーター４と温度センサー５を内
蔵し、温度制御器６によって温度が制御される。ダイ７
は３ｍｍ角であり、積層自立膜片２が挿入されたダイス
３とダイ７はプレス装置８に取り付けられている。油圧
のアクチュエーター９によってダイス３とダイ７を操作
し、積み重ねられた積層自立膜片をプレスする。この
時、ダイス３の温度を約３００℃にして、プレス圧力１
００ｋｇ／ｃｍ2 で約３０分焼結する〔図２（ｃ）〕。
これにより約３ｍｍの立方体の熱電変換素子２０が製造
される〔図２（ｄ）〕。FIG. 2 shows a step of pressing the laminated self-supporting film 1.
The laminated self-supporting film 1 is cut into a square of 3 mm square by a dicer, and a plurality of 10 μm-thick laminated self-supporting film pieces 2 are formed [FIG. 2B]. After washing and drying, the laminated self-supporting film pieces 2 are stacked in a stack of 300 sheets and inserted into a concave portion 3a of a die slightly larger than a 3 mm square and having a depth of 5 mm. The die 3 has a built-in die heater 4 and a temperature sensor 5, and the temperature is controlled by a temperature controller 6. Die 7
Is a 3 mm square, and the die 3 and the die 7 into which the laminated self-supporting film pieces 2 are inserted are attached to a press device 8. The die 3 and the die 7 are operated by the hydraulic actuator 9 to press the stacked self-supporting film pieces. At this time, the temperature of the die 3 was set to about 300 ° C., and the pressing pressure 1
Sintering is performed at 00 kg / cm 2 for about 30 minutes (FIG. 2C).
Thus, a cubic thermoelectric conversion element 20 of about 3 mm is manufactured [FIG. 2 (d)].
【００２９】なお、ここではダイス３とダイ７が一対で
あるプレス機を使用しているが、複数の凹部３ａを有す
るマルチダイスと、複数の凸部を有するマルチダイとか
らなるプレス機を用いることもできる。実施の形態１に
より製造された熱電変換素子２０の構成を図３に示す。
Ｂｉ2Ｔｅ3 の層１８とＳｂ2 Ｔｅ3 の層１９が交互に
積層された積層相１０は図２の積層自立膜１の構造がそ
のまま残っている部分である。焼結反応相１１は積層自
立膜１の表面部分（膜厚約１μｍ）が、隣接する積層自
立膜の表面部分と反応再結晶し熔融固着したものであ
る。したがって、焼結反応相１１は積層構造を有さず、
複数種類の層を構成する化合物の成分、Ｂｉ、Ｔｅ、Ｓ
ｂの微結晶が重なり合った微結晶構造となっている。Although a pressing machine in which the die 3 and the die 7 are paired is used here, a pressing machine including a multi-die having a plurality of concave portions 3a and a multi-die having a plurality of convex portions is used. Can also. FIG. 3 shows a configuration of the thermoelectric conversion element 20 manufactured according to the first embodiment.
The laminated phase 10 in which the Bi 2 Te 3 layers 18 and the Sb 2 Te 3 layers 19 are alternately laminated is a portion where the structure of the laminated free-standing film 1 of FIG. 2 remains as it is. In the sintering reaction phase 11, the surface portion (thickness: about 1 μm) of the multilayer self-supporting film 1 reacts and recrystallizes with the surface portion of the adjacent multilayer self-supporting film and is melt-fixed. Therefore, the sintering reaction phase 11 does not have a laminated structure,
Bi, Te, S
It has a microcrystal structure in which the microcrystals of b are overlapped.
【００３０】実施の形態２ 本発明の半導体材料およびその製造方法の他の例を図４
および図５を使って説明する。積層自立膜１’は、実施
の形態１の積層自立膜１と同様にＢｉ2 Ｔｅ3 の層１
８’とＳｂ2 Ｔｅ3 の層１９’とを交互に積層したもの
であり、積層ピッチｐは５０ｎｍ、膜厚ｄは１０μｍで
ある。ただし、最上表面Ｂｉ2 Ｔｅ3 の層１２の膜厚は
約０．５μｍであり、最下表面Ｓｂ2 Ｔｅ3 の層１３の
膜厚は約０．５μｍである（図４）。したがって、積層
自立膜１’の成膜開始直後および成膜終了直前の一定時
間は成膜材料を切換えずに成膜が行われる。Embodiment 2 FIG. 4 shows another example of the semiconductor material of the present invention and its manufacturing method.
This will be described with reference to FIG. Laminated self-supporting film 1 ', the layer 1 of the laminated self-supporting film 1 in the same manner as Bi 2 Te 3 in the first embodiment
8 ′ and Sb 2 Te 3 layers 19 ′ are alternately laminated, and the lamination pitch p is 50 nm and the film thickness d is 10 μm. However, the thickness of the layer 12 of the uppermost surface Bi 2 Te 3 is about 0.5 μm, and the thickness of the layer 13 of the lowermost surface Sb 2 Te 3 is about 0.5 μm (FIG. 4). Therefore, the film formation is performed without switching the film formation material for a certain period of time immediately after the start of film formation and immediately before the end of film formation of the self-supporting film 1 ′.
【００３１】積層自立膜１’を実施の形態１と同様の方
法で切断し、積層自立膜片２’を複数製造する。そして
最上表面Ｂｉ2 Ｔｅ3 層１２と最下表面Ｓｂ2 Ｔｅ3 層
１３とが接するように各積層自立膜片２’を３００枚積
み重ねる（図５）。積み重ねた積層自立膜片２’を実施
の形態１と同様に加熱し加圧することにより熔融焼結し
て、最上表面のＢｉ2 Ｔｅ3 層１２と最下表面のＳｂ2
Ｔｅ3 層１３とを反応させ、焼結反応相１１’を形成す
る。その結果、約９μｍの積層相１０’と約１μｍの焼
結反応相１１’とが交互に積み重なって構成される熱電
変換素子２０’が製造される。この熱電変換素子２０’
は実施の形態１で製造された熱電変換素子２０と同様の
ものであった。The laminated self-supporting film 1 'is cut in the same manner as in the first embodiment to produce a plurality of laminated self-supporting film pieces 2'. Then, 300 pieces of the laminated self-standing film pieces 2 ′ are stacked so that the uppermost surface Bi 2 Te 3 layer 12 and the lowermost surface Sb 2 Te 3 layer 13 are in contact with each other (FIG. 5). The stacked self-supporting film pieces 2 ′ are melt-sintered by heating and pressing in the same manner as in the first embodiment, and the Bi 2 Te 3 layer 12 on the uppermost surface and the Sb 2 on the lowermost surface are formed.
The sintering reaction phase 11 ′ is formed by reacting with the Te 3 layer 13. As a result, a thermoelectric conversion element 20 'constituted by alternately stacking about 9 μm of the laminated phase 10 ′ and about 1 μm of the sintering reaction phase 11 ′ is manufactured. This thermoelectric conversion element 20 '
Was the same as the thermoelectric conversion element 20 manufactured in the first embodiment.
【００３２】実施の形態３ 本発明の半導体材料およびその製造方法の他の例を以下
に説明する。実施の形態１で得られた積層自立膜１を切
断せずに、比較的大きな面積の状態で３００枚積み重
ね、実施の形態１と同様の方法で加熱し加圧して熔融焼
結し、得られた半導体材料を所定の寸法に切断して熱電
変換素子２０を製造した。Embodiment 3 Another example of a semiconductor material of the present invention and a method of manufacturing the same will be described below. Without cutting the laminated self-supporting film 1 obtained in the first embodiment, 300 sheets are stacked in a state of a relatively large area, and are heated and pressed in the same manner as in the first embodiment to be melt-sintered. The thermoelectric conversion element 20 was manufactured by cutting the semiconductor material into predetermined dimensions.
【００３３】実施の形態４ 本発明の半導体材料およびその製造方法の他の例を以下
に説明する。積層自立膜１は基板除去の工程および焼結
の準備工程において不定形に膜の割れが生じることが多
い。この実施の形態は積層自立膜の割れを積極的に利用
して、熱電変換素子２０”を得る方法である。この方法
により得られる熱電変換素子２０”は、実施の形態１〜
３の熱電変換素子のような積層相１０と焼結反応相１１
とが整然と並んだ構成を有さず（図３）、積層相または
焼結反応相により分割された積層相と焼結反応相とが交
互に積層する構造を有するものである（図６）。Embodiment 4 Another example of the semiconductor material of the present invention and a method for manufacturing the same will be described below. The self-supporting laminated film 1 often has an irregular shape in the substrate removing process and the sintering preparing process. This embodiment is a method for obtaining a thermoelectric conversion element 20 ″ by actively utilizing the cracks in the laminated self-supporting film.
3 and the sintering reaction phase 11 such as the thermoelectric conversion element 3
Have a structure in which the stacked phases and the sintering reaction phase divided by the stacking phase or the sintering reaction phase are alternately stacked (FIG. 6).
【００３４】成膜基板１５（図示せず）上に形成された
積層自立膜を、へら状のジグによって機械的に剥がし取
り、大きさと形が異なる積層自立膜片１４が得られる。
その積層自立膜片１４を複数枚重ね合わせると〔図６
（ａ）〕、各積層自立膜片１４との隙間に多数の空気層
１６が分布した状態となる〔図６（ｂ）〕。熱電変換素
子に空気層１６が存在すると、熱電変換素子の性能を低
下させ、かつ機械的強度をも低下させるので、これをま
ず常温でプレスして空気層１６を除去する。１００ｋｇ
／ｃｍ2 程度のプレス圧力で空気層１６は除去され、そ
の部分にプレスによって割れた積層自立膜片１４の破片
１４’が充填される〔図６（ｃ）〕。次にプレス圧力を
１ｔｏｎ／ｃｍ2 程度にして、焼結温度３００℃で約１
時間熔融焼結を行うと、積層自立膜片１４の表面が隣接
する積層自立膜片１４の表面と熔融固着して焼結反応相
１１”を形成するとともにプレス時に割れた破片１４’
とその周りの積層自立膜片１４の表面とが焼結し、焼結
反応相１１”が形成される。最終的に、積層相１０”も
しくは焼結反応相１１”により分割された積層相１０”
と焼結反応相１１”とが交互に積層した半導体材料が形
成される。この材料を所定の大きさに切断することによ
り熱電変換素子２０”が製造される。The laminated free-standing film formed on the film forming substrate 15 (not shown) is mechanically peeled off with a spatular jig to obtain a laminated free-standing film piece 14 having a different size and shape.
When a plurality of the laminated self-supporting film pieces 14 are overlapped with each other [FIG.
(A)], a large number of air layers 16 are distributed in the gaps between the laminated self-supporting film pieces 14 (FIG. 6 (b)). If the air layer 16 exists in the thermoelectric conversion element, the performance of the thermoelectric conversion element is reduced and the mechanical strength is also reduced. Therefore, the air layer 16 is first pressed at room temperature to remove the air layer 16. 100 kg
The air layer 16 is removed with a press pressure of about / cm 2 , and the portion is filled with the fragments 14 ′ of the laminated self-supporting film pieces 14 broken by the press (FIG. 6C). Next, the pressing pressure was set to about 1 ton / cm 2 and the sintering temperature was
When the melt sintering is performed for a time, the surface of the laminated self-supporting film piece 14 is melt-fixed to the surface of the adjacent self-supporting film piece 14 to form a sintering reaction phase 11 ″, and the broken pieces 14 ′ cracked during pressing.
And the surface of the laminated self-supporting film piece 14 surrounding it are sintered to form a sintering reaction phase 11 ". Finally, the lamination phase 10" or the lamination phase 10 divided by the sintering reaction phase 11 ""
And a sintering reaction phase 11 ″ are alternately stacked to form a semiconductor material. The thermoelectric conversion element 20 ″ is manufactured by cutting this material into a predetermined size.
【００３５】熱電変換素子のゼーベック効果（性能Ｚ）
は、ゼーベック係数α、電気伝導率δ、キャリアによる
熱伝導率κｃおよびフォノンによる熱伝導率κｐを用い
て次式で表される。 Ｚ＝α２δ／（κｃ＋κｐ）Seebeck effect of thermoelectric conversion element (performance Z)
Is expressed by the following equation using the Seebeck coefficient α, the electrical conductivity δ, the thermal conductivity κc by the carrier, and the thermal conductivity κp by the phonon. Z = α2δ / (κc + κp)
【００３６】従来の実用化されている熱電変換素子の性
能Ｚは３×１０-3程度以下であるのに対し、実施の形態
１〜４の製造方法により製造された熱電変換素子２０、
２０’および２０”の性能Ｚは４．５〜６×１０-3程度
であり、従来のものより１．５〜２倍の性能を示す。実
施の形態１〜３の製造方法により製造された熱電変換素
子２０および２０’と実施の形態４の製造方法により製
造された熱電変換素子２０”とは、いずれも高い熱電変
換効率を示すが、その効果を奏するメカニズムはそれぞ
れ異なる。The performance Z of the conventional thermoelectric conversion element practically used is about 3 × 10 −3 or less, whereas the thermoelectric conversion element 20 manufactured by the manufacturing method of the first to fourth embodiments has
The performance Z of 20 ′ and 20 ″ is about 4.5 to 6 × 10 −3, which is 1.5 to 2 times the performance of the conventional one. Although the thermoelectric conversion elements 20 and 20 ′ and the thermoelectric conversion element 20 ″ manufactured by the manufacturing method of the fourth embodiment both exhibit high thermoelectric conversion efficiency, the mechanisms exhibiting the effects are different from each other.
【００３７】一方の熱電変換素子２０および２０’は、
Ｖｅｎｋａｔａｓｕｂｒａｍａｎｉａｎらの提案に沿っ
たものであり、積層界面でのフォノンの散乱を利用し、
フォノンによる熱伝導率κｐを低減させることによりそ
の効果を奏しているものと考えられる。他方の熱電変換
素子２０”は、部分的に存在する積層相ではフォノンに
よる熱伝導率κｐを低減させ、焼結反応相では積層相よ
りもキャリアの移動度を向上（電気伝導率δを向上）さ
せることによりその効果を奏しているものと考えられ
る。One of the thermoelectric conversion elements 20 and 20 ′
It is in line with the proposal of Venkatasubramanian et al., And utilizes the scattering of phonons at the stack interface,
It is considered that the effect is exhibited by reducing the thermal conductivity κp by phonons. The other thermoelectric conversion element 20 ″ reduces the thermal conductivity κp due to phonons in a partially existing laminated phase, and improves carrier mobility (improves electric conductivity δ) in the sintering reaction phase as compared with the laminated phase. It is considered that such an effect is exhibited by causing this.
【００３８】[0038]
【発明の効果】本発明の半導体材料は、厚みが数ｍｍ程
度で積層ピッチが数十ｎｍ程度、すなわち積層数が数千
〜数万にも及び、例えば熱電材料として使用された場合
は、熱伝導率が極めて低いため、熱電変換効率のよい熱
電変換素子となる。また、本発明の半導体材料は、大き
な機械的残留応力が無く、表面のマクロな平坦性や表面
と基板の平行が確保されていて、厚み方向で下層から上
層までの均一な積層構造を有する。 また、本発明の方
法によれば、上記半導体材料が比較的簡便な方法により
短い気相成長時間で製造できる。The semiconductor material of the present invention has a thickness of about several millimeters and a lamination pitch of about several tens of nanometers, that is, the number of laminations ranges from several thousand to tens of thousands. Since the conductivity is extremely low, the thermoelectric conversion element has high thermoelectric conversion efficiency. Further, the semiconductor material of the present invention does not have large mechanical residual stress, has macroscopic flatness of the surface and parallelism between the surface and the substrate, and has a uniform laminated structure from the lower layer to the upper layer in the thickness direction. Further, according to the method of the present invention, the semiconductor material can be manufactured by a relatively simple method in a short vapor phase growth time.
【図１】本発明の半導体材料を構成する積層自立膜の構
成を示す図である。FIG. 1 is a diagram showing a configuration of a laminated self-supporting film constituting a semiconductor material of the present invention.
【図２】本発明の方法による積層自立膜のプレス工程を
示す図である。FIG. 2 is a view showing a step of pressing a laminated self-supporting film according to the method of the present invention.
【図３】本発明の半導体材料（熱電変換素子）の断面図
である。FIG. 3 is a sectional view of a semiconductor material (thermoelectric conversion element) of the present invention.
【図４】本発明の半導体材料を構成する積層自立膜の構
成を示す図である。FIG. 4 is a diagram showing a configuration of a laminated self-supporting film constituting a semiconductor material of the present invention.
【図５】本発明の半導体材料を構成する積層自立膜の積
層方向を示す図である。FIG. 5 is a view showing a stacking direction of a stacked self-supporting film constituting a semiconductor material of the present invention.
【図６】本発明の半導体材料の製造過程を示す図であ
る。FIG. 6 is a diagram showing a manufacturing process of the semiconductor material of the present invention.
【図７】積層型熱電変換素子材料の積層ピッチと熱伝導
率の関係を示すグラフである。FIG. 7 is a graph showing the relationship between the lamination pitch of the laminated thermoelectric conversion element material and the thermal conductivity.
【図８】従来の熱電変換デバイスの構成図である。FIG. 8 is a configuration diagram of a conventional thermoelectric conversion device.
【図９】熱電変換素子の膜厚と熱電変換素子のＣＯＰの
関係を示すグラフである。FIG. 9 is a graph showing the relationship between the thickness of the thermoelectric conversion element and the COP of the thermoelectric conversion element.
１、１’ 積層自立膜 ２、２’ 積層自立膜片 ３ ダイス ３ａ ダイスの凹部 ４ ダイスヒーター ５ 温度センサー ６ 温度制御器 ７ ダイ ８ プレス装置 ９ アクチュエーター １０、１０’、１０'' 積層相 １１、１１’、１１'' 焼結反応相 １２ 積層自立膜の最上表面のＢｉ2 Ｔｅ3 層 １３ 積層自立膜の最下表面のＳｂ2 Ｔｅ3 層 １４ 不定形の積層自立膜片 １４’ 積層自立膜片の破片 １５ 成膜基板 １６ 空気層 １８、１８’ Ｂｉ2 Ｔｅ3 層 １９、１９’ Ｓｂ2 Ｔｅ3 層 ２０、２０’、２０” 熱電変換素子 １０１ Ｐ型熱電変換素子 １０２ Ｎ型熱電変換素子 １０３ デバイスにおける電極 １０４ 第１の終端電極 １０５ 第２の終端電極1, 1 'laminated self-supporting film 2, 2' laminated self-supporting film piece 3 dice 3a dice recess 4 dice heater 5 temperature sensor 6 temperature controller 7 die 8 pressing device 9 actuator 10, 10 ', 10''lamination phase 11, 11 ', 11''sintering reaction phase 12 the top surface of the Bi 2 Te 3 layer 13 Sb 2 Te 3 layer 14 amorphous laminated self-supporting membrane piece 14' stacked freestanding film of the lowermost surface of the laminated self-supporting film of the laminated self-supporting film debris 15 deposited substrate 16 air layer 18, 18 pieces' Bi 2 Te 3 layer 19, 19 'Sb 2 Te 3 layer 20, 20', 20 "thermoelectric conversion element 101 P-type thermoelectric conversion element 102 N-type thermoelectric conversion element 103 Electrode in device 104 First terminal electrode 105 Second terminal electrode
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０１Ｌ 35/34 Ｈ０１Ｌ 35/34 (72)発明者 山中 良亮 大阪府大阪市阿倍野区長池町22番22号 シ ャープ株式会社内 Ｆターム(参考） 5F052 KA05 ──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. 7 Identification FI FI Theme Court ゛ (Reference) H01L 35/34 H01L 35/34 (72) Inventor Yoshiaki Yamanaka 22-22, Nagaikecho, Abeno-ku, Osaka-shi, Osaka F-term (for reference) 5F052 KA05
Claims (6)
次繰り返し積層されてなる積層相と、前記複数種類の層
が焼結されてなる焼結反応相とが交互に積層して一体化
されていることを特徴とする半導体材料。1. A laminated phase in which a plurality of types of layers composed of different compounds are sequentially and repeatedly laminated, and a sintering reaction phase in which the plurality of types of layers are sintered are alternately laminated and integrated. Semiconductor material characterized by the following.
成する各化合物の成分が均一に分散している請求項１に
記載の半導体材料。2. The semiconductor material according to claim 1, wherein components of each compound constituting a plurality of types of layers are uniformly dispersed in the sintering reaction phase.
積層相を含む請求項１または２に記載の半導体材料。3. The semiconductor material according to claim 1, wherein the lamination phase includes a lamination phase divided by a sintering reaction phase.
次繰り返し積層して積層自立膜を形成し、該積層自立膜
をその厚さ方向に複数枚積層して加熱しながら加圧する
ことにより各積層自立膜の表面を熔融固着して焼結反応
相を形成するとともに複数の積層自立膜を一体化させる
ことを特徴とする積層相と焼結反応相とが交互に積層さ
れてなる半導体材料の製造方法。4. A laminated self-supporting film is formed by sequentially and repeatedly laminating a plurality of types of layers composed of different compounds, and a plurality of the laminated self-supporting films are laminated in the thickness direction and pressurized while heating. Manufacturing a semiconductor material in which a laminated phase and a sintering reaction phase are alternately laminated by forming a sintering reaction phase by fusing the surface of the self-supporting film and forming a sintering reaction phase. Method.
次繰り返し積層して積層自立膜を形成し、該積層自立膜
を所定の大きさに裁断し、裁断された積層自立膜をその
厚さ方向に複数枚積層して加熱しながら加圧することに
より各積層自立膜の表面を熔融固着して焼結反応相を形
成するとともに複数の積層自立膜を一体化させることを
特徴とする積層相と焼結反応相とが交互に積層されてな
る半導体材料の製造方法。5. A laminated self-supporting film is formed by repeatedly laminating a plurality of types of layers composed of different compounds sequentially, and the laminated self-supporting film is cut into a predetermined size. By laminating a plurality of self-supporting films and applying pressure while heating, the surface of each self-supporting film is melt-fixed to form a sintering reaction phase, and the plurality of self-supporting films are integrated. A method for producing a semiconductor material in which binding reaction phases are alternately laminated.
次繰り返し積層して積層自立膜を形成し、異なる大きさ
および／または異なる形の積層自立膜を複数枚積層し、
次いで加圧することにより各積層自立膜の隙間に生じた
空間を積層自立膜の破片で充填し、次いで加熱しながら
加圧することにより各積層自立膜の表面を熔融固着して
焼結反応相を形成するとともに各積層自立膜の隙間に生
じた空間に充填された積層自立膜の破片を熔融固着して
焼結反応相を形成することを特徴とする積層相または焼
結反応相で分割された積層相と焼結反応相とが交互に積
層されてなる半導体材料の製造方法。6. A laminated self-supporting film is formed by repeatedly laminating a plurality of types of layers composed of different compounds sequentially, and laminating a plurality of laminated self-supporting films having different sizes and / or different shapes.
Next, the space created in the gap between the respective self-supporting films is filled with the fragments of the self-supporting film by pressing, and then the surface of each self-supporting film is fused and fixed by heating and pressurizing to form a sintering reaction phase. Wherein the sintering reaction phase is formed by melting and fixing the pieces of the self-supporting film filled in the spaces formed in the gaps between the self-supporting layers to form a sintering reaction phase. A method for producing a semiconductor material, in which phases and sintering reaction phases are alternately laminated.
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|---|---|---|---|
| JP11105514A JP2000299504A (en) | 1999-04-13 | 1999-04-13 | Semiconductor material and manufacture thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11105514A JP2000299504A (en) | 1999-04-13 | 1999-04-13 | Semiconductor material and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2000299504A true JP2000299504A (en) | 2000-10-24 |
Family
ID=14409721
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11105514A Pending JP2000299504A (en) | 1999-04-13 | 1999-04-13 | Semiconductor material and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2000299504A (en) |
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| JP2006140332A (en) * | 2004-11-12 | 2006-06-01 | Koyo Thermo System Kk | Thermal processor |
| JP4550613B2 (en) * | 2005-02-21 | 2010-09-22 | 古河電気工業株式会社 | Anisotropic heat conduction material |
| JP2006229174A (en) * | 2005-02-21 | 2006-08-31 | Furukawa Electric Co Ltd:The | Anisotropic heat conducting material and heat transfer method using it |
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