ITUB20160251A1 - Procedimento per ridurre gli stress termo-meccanici in dispositivi a semiconduttore e corrispondente dispositivo - Google Patents

Procedimento per ridurre gli stress termo-meccanici in dispositivi a semiconduttore e corrispondente dispositivo

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Publication number
ITUB20160251A1
ITUB20160251A1 ITUB2016A000251A ITUB20160251A ITUB20160251A1 IT UB20160251 A1 ITUB20160251 A1 IT UB20160251A1 IT UB2016A000251 A ITUB2016A000251 A IT UB2016A000251A IT UB20160251 A ITUB20160251 A IT UB20160251A IT UB20160251 A1 ITUB20160251 A1 IT UB20160251A1
Authority
IT
Italy
Prior art keywords
semiconductor
procedure
mechanical stresses
corresponding devices
reduce thermo
Prior art date
Application number
ITUB2016A000251A
Other languages
English (en)
Inventor
Paolo Colpani
Antonella Milani
Lucrezia Guarino
Andrea Paleari
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITUB2016A000251A priority Critical patent/ITUB20160251A1/it
Priority to US15/251,355 priority patent/US9960131B2/en
Priority to CN201621205074.XU priority patent/CN206225353U/zh
Priority to CN201610983331.0A priority patent/CN107026116B/zh
Priority to DE102016118653.8A priority patent/DE102016118653A1/de
Publication of ITUB20160251A1 publication Critical patent/ITUB20160251A1/it

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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
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    • H01L2924/04642SiC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/049Nitrides composed of metals from groups of the periodic table
    • H01L2924/050414th Group
    • H01L2924/05042Si3N4
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
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US15/251,355 US9960131B2 (en) 2016-02-01 2016-08-30 Method for thermo-mechanical stress reduction in semiconductor devices and corresponding device
CN201621205074.XU CN206225353U (zh) 2016-02-01 2016-09-29 半导体器件
CN201610983331.0A CN107026116B (zh) 2016-02-01 2016-09-29 用于减小半导体器件中的热机械应力的方法以及对应器件
DE102016118653.8A DE102016118653A1 (de) 2016-02-01 2016-09-30 Verfahren zur Reduzierung von thermomechanischer Belastung in Halbleitervorrichtungen und entsprechende Vorrichtung

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ITUB20160251A1 (it) * 2016-02-01 2017-08-01 St Microelectronics Srl Procedimento per ridurre gli stress termo-meccanici in dispositivi a semiconduttore e corrispondente dispositivo
US11469194B2 (en) * 2018-08-08 2022-10-11 Stmicroelectronics S.R.L. Method of manufacturing a redistribution layer, redistribution layer and integrated circuit including the redistribution layer

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US20110095418A1 (en) * 2009-10-26 2011-04-28 Hwan-Sik Lim Semiconductor package and method for fabricating the same

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CN107026116B (zh) 2021-07-30
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