IT8224816A0 - Interfaccia d'uscita per circuito logico a tre stati in circuito integrato a transistori "mos". - Google Patents

Interfaccia d'uscita per circuito logico a tre stati in circuito integrato a transistori "mos".

Info

Publication number
IT8224816A0
IT8224816A0 IT8224816A IT2481682A IT8224816A0 IT 8224816 A0 IT8224816 A0 IT 8224816A0 IT 8224816 A IT8224816 A IT 8224816A IT 2481682 A IT2481682 A IT 2481682A IT 8224816 A0 IT8224816 A0 IT 8224816A0
Authority
IT
Italy
Prior art keywords
mos
output interface
state logic
integrated circuit
transistor integrated
Prior art date
Application number
IT8224816A
Other languages
English (en)
Other versions
IT1210961B (it
Inventor
Daniele Devecchi
Guido Torelli
Original Assignee
Ates Componenti Elettron
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ates Componenti Elettron filed Critical Ates Componenti Elettron
Priority to IT8224816A priority Critical patent/IT1210961B/it
Publication of IT8224816A0 publication Critical patent/IT8224816A0/it
Priority to FR8319096A priority patent/FR2538193B1/fr
Priority to DE19833343700 priority patent/DE3343700A1/de
Priority to US06/560,401 priority patent/US4555644A/en
Priority to GB08333234A priority patent/GB2133651B/en
Application granted granted Critical
Publication of IT1210961B publication Critical patent/IT1210961B/it

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Manipulation Of Pulses (AREA)
IT8224816A 1982-12-17 1982-12-17 Interfaccia d'uscita per circuito logico a tre stati in circuito integrato a transistori "mos". IT1210961B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8224816A IT1210961B (it) 1982-12-17 1982-12-17 Interfaccia d'uscita per circuito logico a tre stati in circuito integrato a transistori "mos".
FR8319096A FR2538193B1 (fr) 1982-12-17 1983-11-30 Interface de sortie pour circuit logique a trois etats dans un circuit integre a transistors mos
DE19833343700 DE3343700A1 (de) 1982-12-17 1983-12-02 Ausgangs-interface fuer eine logische schaltung mit drei zustaenden in einer integrierten schaltung mit mos-transistoren
US06/560,401 US4555644A (en) 1982-12-17 1983-12-12 Output interface for a three-state logic circuit in an integrated circuit using MOS transistors
GB08333234A GB2133651B (en) 1982-12-17 1983-12-13 Tri-state output interfaces for logic circuits in mos integrated circuits

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8224816A IT1210961B (it) 1982-12-17 1982-12-17 Interfaccia d'uscita per circuito logico a tre stati in circuito integrato a transistori "mos".

Publications (2)

Publication Number Publication Date
IT8224816A0 true IT8224816A0 (it) 1982-12-17
IT1210961B IT1210961B (it) 1989-09-29

Family

ID=11214827

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8224816A IT1210961B (it) 1982-12-17 1982-12-17 Interfaccia d'uscita per circuito logico a tre stati in circuito integrato a transistori "mos".

Country Status (5)

Country Link
US (1) US4555644A (it)
DE (1) DE3343700A1 (it)
FR (1) FR2538193B1 (it)
GB (1) GB2133651B (it)
IT (1) IT1210961B (it)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3329874A1 (de) * 1983-08-18 1985-03-07 Siemens AG, 1000 Berlin und 8000 München Mos-inverterschaltung
JPS6052112A (ja) * 1983-08-31 1985-03-25 Toshiba Corp 論理回路
US4656373A (en) * 1984-11-26 1987-04-07 Rca Corporation High-speed voltage level shift circuit
NL8601953A (nl) * 1986-07-30 1988-02-16 Philips Nv Cmost-ingangsbuffer voor ttl-niveau ingangssignalen.
US4791323A (en) * 1986-10-23 1988-12-13 Silicon Systems, Inc. Level translation circuit
US4916334A (en) * 1987-07-29 1990-04-10 Kabushiki Kaisha Toshiba High voltage booster circuit for use in EEPROMs
US4940906A (en) * 1988-08-08 1990-07-10 Zdzislaw Gulczynski Power switch driver
DE3834259A1 (de) * 1988-10-08 1990-06-07 Broadcast Television Syst Schaltung zur erzeugung eines dreipegel-impulssignals
US5157280A (en) * 1991-02-13 1992-10-20 Texas Instruments Incorporated Switch for selectively coupling a power supply to a power bus
JPH05102831A (ja) * 1991-10-09 1993-04-23 Mitsubishi Electric Corp 半導体集積回路の出力回路
DE4232049C1 (de) * 1992-09-24 1994-05-19 Siemens Ag Integrierte Halbleiterschaltungsanordnung

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5937614B2 (ja) * 1972-07-21 1984-09-11 株式会社日立製作所 絶縁ゲ−ト型トランジスタを用いたブ−トスラツプ回路
US3845324A (en) * 1972-12-22 1974-10-29 Teletype Corp Dual voltage fet inverter circuit with two level biasing
US4291242A (en) * 1979-05-21 1981-09-22 Motorola, Inc. Driver circuit for use in an output buffer
JPS5657335A (en) * 1979-10-16 1981-05-19 Matsushita Electric Ind Co Ltd Digital circuit
DE3018501A1 (de) * 1980-05-14 1981-11-19 Siemens AG, 1000 Berlin und 8000 München Schalter mit einem als source-folger betriebenen mis-pet
JPS583325A (ja) * 1981-06-29 1983-01-10 Fujitsu Ltd インバ−タ回路
JPS589432A (ja) * 1981-07-08 1983-01-19 Toshiba Corp 論理回路
US4477741A (en) * 1982-03-29 1984-10-16 International Business Machines Corporation Dynamic output impedance for 3-state drivers

Also Published As

Publication number Publication date
DE3343700A1 (de) 1984-06-20
FR2538193B1 (fr) 1987-06-05
DE3343700C2 (it) 1992-06-25
US4555644A (en) 1985-11-26
GB2133651A (en) 1984-07-25
GB8333234D0 (en) 1984-01-18
IT1210961B (it) 1989-09-29
GB2133651B (en) 1986-04-30
FR2538193A1 (fr) 1984-06-22

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19961227