JPS5657335A - Digital circuit - Google Patents

Digital circuit

Info

Publication number
JPS5657335A
JPS5657335A JP13401679A JP13401679A JPS5657335A JP S5657335 A JPS5657335 A JP S5657335A JP 13401679 A JP13401679 A JP 13401679A JP 13401679 A JP13401679 A JP 13401679A JP S5657335 A JPS5657335 A JP S5657335A
Authority
JP
Japan
Prior art keywords
output
circuit
information
digital circuit
overload
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13401679A
Other languages
Japanese (ja)
Inventor
Masao Furuta
Taku Kawahara
Hirosuke Yamamoto
Minoru Ueda
Kazumi Kawashima
Sadahiro Takuhara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13401679A priority Critical patent/JPS5657335A/en
Publication of JPS5657335A publication Critical patent/JPS5657335A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To avoid the overload of the output circuit, by delivering the three types of information through a piece of the output terminal and then securing a simultaneous conduction for both the 1st and 2nd switch elements to deliver 1 and 0 each of the output circuit in case a residual type of the information is under the storage state. CONSTITUTION:The gate of the switching transistor TR3 for output of a low level is connected to the 1-bit memory circuit 1 as well as the inverse output Q1' of the circuit 1. In addition to the TR3, the switching TR4 for a high level is provided with its gate connected to the memory circut 2 as well as the inverse output Q2' of the circuit 2. Then a common connection is secured between the source of the TR3 and the drain of the TR4 to form a digital circuit. And the truth chart of the digital circuit is produced as shown in the table 1, thus delivering three types of information 1, 0 and the high resistance through a piece of the output terminal 5. At the same time, both the TR3 and 4 are made to conduct when both the outputs Q1 and Q2 of the memory circuits 1 and 2 are logic 1. Thus the output is inhibited to avoid the overload of the output circuit.
JP13401679A 1979-10-16 1979-10-16 Digital circuit Pending JPS5657335A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13401679A JPS5657335A (en) 1979-10-16 1979-10-16 Digital circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13401679A JPS5657335A (en) 1979-10-16 1979-10-16 Digital circuit

Publications (1)

Publication Number Publication Date
JPS5657335A true JPS5657335A (en) 1981-05-19

Family

ID=15118396

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13401679A Pending JPS5657335A (en) 1979-10-16 1979-10-16 Digital circuit

Country Status (1)

Country Link
JP (1) JPS5657335A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213531A (en) * 1982-06-04 1983-12-12 Matsushita Electric Ind Co Ltd Mos type logical circuit
FR2538193A1 (en) * 1982-12-17 1984-06-22 Ates Componenti Elettron OUTPUT INTERFACE FOR A THREE-STATE LOGIC CIRCUIT IN AN INTEGRATED CIRCUIT WITH MOS TRANSISTORS

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213531A (en) * 1982-06-04 1983-12-12 Matsushita Electric Ind Co Ltd Mos type logical circuit
FR2538193A1 (en) * 1982-12-17 1984-06-22 Ates Componenti Elettron OUTPUT INTERFACE FOR A THREE-STATE LOGIC CIRCUIT IN AN INTEGRATED CIRCUIT WITH MOS TRANSISTORS

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