IT1114884B - Procedimento di fabbricazione di dispositivi semiconduttori - Google Patents

Procedimento di fabbricazione di dispositivi semiconduttori

Info

Publication number
IT1114884B
IT1114884B IT24957/77A IT2495777A IT1114884B IT 1114884 B IT1114884 B IT 1114884B IT 24957/77 A IT24957/77 A IT 24957/77A IT 2495777 A IT2495777 A IT 2495777A IT 1114884 B IT1114884 B IT 1114884B
Authority
IT
Italy
Prior art keywords
semiconductor devices
manufacture procedure
devices manufacture
procedure
semiconductor
Prior art date
Application number
IT24957/77A
Other languages
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT1114884B publication Critical patent/IT1114884B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26526—Recoil-implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/024—Defect control-gettering and annealing

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
IT24957/77A 1976-07-02 1977-06-23 Procedimento di fabbricazione di dispositivi semiconduttori IT1114884B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/701,789 US4069068A (en) 1976-07-02 1976-07-02 Semiconductor fabrication method for improved device yield by minimizing pipes between common conductivity type regions

Publications (1)

Publication Number Publication Date
IT1114884B true IT1114884B (it) 1986-01-27

Family

ID=24818687

Family Applications (1)

Application Number Title Priority Date Filing Date
IT24957/77A IT1114884B (it) 1976-07-02 1977-06-23 Procedimento di fabbricazione di dispositivi semiconduttori

Country Status (7)

Country Link
US (1) US4069068A (it)
JP (1) JPS535965A (it)
CA (1) CA1090005A (it)
DE (1) DE2728985A1 (it)
FR (1) FR2357065A1 (it)
GB (1) GB1521879A (it)
IT (1) IT1114884B (it)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4133701A (en) * 1977-06-29 1979-01-09 General Motors Corporation Selective enhancement of phosphorus diffusion by implanting halogen ions
US4131487A (en) * 1977-10-26 1978-12-26 Western Electric Company, Inc. Gettering semiconductor wafers with a high energy laser beam
US4144099A (en) * 1977-10-31 1979-03-13 International Business Machines Corporation High performance silicon wafer and fabrication process
US4144100A (en) * 1977-12-02 1979-03-13 General Motors Corporation Method of low dose phoshorus implantation for oxide passivated diodes in <10> P-type silicon
US4170492A (en) * 1978-04-18 1979-10-09 Texas Instruments Incorporated Method of selective oxidation in manufacture of semiconductor devices
US4320312A (en) * 1978-10-02 1982-03-16 Hewlett-Packard Company Smaller memory cells and logic circuits
US4231809A (en) * 1979-05-25 1980-11-04 Bell Telephone Laboratories, Incorporated Method of removing impurity metals from semiconductor devices
JPS5617011A (en) * 1979-07-23 1981-02-18 Toshiba Corp Semiconductor device and manufacture thereof
US4249962A (en) * 1979-09-11 1981-02-10 Western Electric Company, Inc. Method of removing contaminating impurities from device areas in a semiconductor wafer
US4257827A (en) * 1979-11-13 1981-03-24 International Business Machines Corporation High efficiency gettering in silicon through localized superheated melt formation
JPS5693367A (en) * 1979-12-20 1981-07-28 Fujitsu Ltd Manufacture of semiconductor device
JPS58132922A (ja) * 1982-02-01 1983-08-08 Toshiba Corp 半導体装置の製造方法
US4569120A (en) * 1983-03-07 1986-02-11 Signetics Corporation Method of fabricating a programmable read-only memory cell incorporating an antifuse utilizing ion implantation
WO1985000694A1 (en) * 1983-07-25 1985-02-14 American Telephone & Telegraph Company Shallow-junction semiconductor devices
JPS6031231A (ja) * 1983-07-29 1985-02-18 Toshiba Corp 半導体基体の製造方法
JPS6084813A (ja) * 1983-10-17 1985-05-14 Toshiba Corp 半導体装置の製造方法
JPS6295869A (ja) * 1985-10-22 1987-05-02 Nec Corp 半導体装置
US4837172A (en) * 1986-07-18 1989-06-06 Matsushita Electric Industrial Co., Ltd. Method for removing impurities existing in semiconductor substrate
US4796073A (en) * 1986-11-14 1989-01-03 Burr-Brown Corporation Front-surface N+ gettering techniques for reducing noise in integrated circuits
US4849365A (en) * 1988-02-16 1989-07-18 Honeywell Inc. Selective integrated circuit interconnection
US5034337A (en) * 1989-02-10 1991-07-23 Texas Instruments Incorporated Method of making an integrated circuit that combines multi-epitaxial power transistors with logic/analog devices
US5358879A (en) * 1993-04-30 1994-10-25 Loral Federal Systems Company Method of making gate overlapped lightly doped drain for buried channel devices
US5840590A (en) * 1993-12-01 1998-11-24 Sandia Corporation Impurity gettering in silicon using cavities formed by helium implantation and annealing
JP4216803B2 (ja) * 2002-05-29 2009-01-28 本田技研工業株式会社 金属膜の酸化によってナノポーラス基板上に形成されたサブミクロン電解質薄膜
JP2004304099A (ja) * 2003-04-01 2004-10-28 Toshiba Corp 半導体装置
US20060220112A1 (en) * 2005-04-01 2006-10-05 International Business Machines Corporation Semiconductor device forming method and structure for retarding dopant-enhanced diffusion
US20080204068A1 (en) * 2007-02-28 2008-08-28 International Business Machines Corporation Method for estimating defects in an npn transistor array

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3457632A (en) * 1966-10-07 1969-07-29 Us Air Force Process for implanting buried layers in semiconductor devices
US3540925A (en) * 1967-08-02 1970-11-17 Rca Corp Ion bombardment of insulated gate semiconductor devices
US3622382A (en) * 1969-05-05 1971-11-23 Ibm Semiconductor isolation structure and method of producing
US3663308A (en) * 1970-11-05 1972-05-16 Us Navy Method of making ion implanted dielectric enclosures
US3796929A (en) * 1970-12-09 1974-03-12 Philips Nv Junction isolated integrated circuit resistor with crystal damage near isolation junction
JPS5226433B2 (it) * 1971-09-18 1977-07-14
US3756861A (en) * 1972-03-13 1973-09-04 Bell Telephone Labor Inc Bipolar transistors and method of manufacture
FR2191272A1 (it) * 1972-06-27 1974-02-01 Ibm France
JPS5630704B2 (it) * 1973-05-24 1981-07-16
US3948694A (en) * 1975-04-30 1976-04-06 Motorola, Inc. Self-aligned method for integrated circuit manufacture
US4025364A (en) * 1975-08-11 1977-05-24 Fairchild Camera And Instrument Corporation Process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases

Also Published As

Publication number Publication date
US4069068A (en) 1978-01-17
FR2357065B1 (it) 1979-03-23
GB1521879A (en) 1978-08-16
JPS535965A (en) 1978-01-19
FR2357065A1 (fr) 1978-01-27
CA1090005A (en) 1980-11-18
DE2728985A1 (de) 1978-01-05

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