HK1025685A1 - Frequency synthesis circuit tuned by digital words - Google Patents

Frequency synthesis circuit tuned by digital words

Info

Publication number
HK1025685A1
HK1025685A1 HK00104860A HK00104860A HK1025685A1 HK 1025685 A1 HK1025685 A1 HK 1025685A1 HK 00104860 A HK00104860 A HK 00104860A HK 00104860 A HK00104860 A HK 00104860A HK 1025685 A1 HK1025685 A1 HK 1025685A1
Authority
HK
Hong Kong
Prior art keywords
synthesis circuit
frequency synthesis
digital words
circuit tuned
tuned
Prior art date
Application number
HK00104860A
Other languages
English (en)
Inventor
Alain Vergnes
Didier Valenti
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of HK1025685A1 publication Critical patent/HK1025685A1/xx

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03BGENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B28/00Generation of oscillations by methods not covered by groups H03B5/00 - H03B27/00, including modification of the waveform to produce sinusoidal oscillations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Pulse Circuits (AREA)
  • Manipulation Of Pulses (AREA)
HK00104860A 1998-01-21 2000-08-03 Frequency synthesis circuit tuned by digital words HK1025685A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/010,434 US5977805A (en) 1998-01-21 1998-01-21 Frequency synthesis circuit tuned by digital words
PCT/US1999/000873 WO1999038252A1 (en) 1998-01-21 1999-01-14 Frequency synthesis circuit tuned by digital words

Publications (1)

Publication Number Publication Date
HK1025685A1 true HK1025685A1 (en) 2000-11-17

Family

ID=21745751

Family Applications (1)

Application Number Title Priority Date Filing Date
HK00104860A HK1025685A1 (en) 1998-01-21 2000-08-03 Frequency synthesis circuit tuned by digital words

Country Status (12)

Country Link
US (1) US5977805A (no)
EP (1) EP0988691B1 (no)
JP (1) JP2001515695A (no)
KR (1) KR20010005533A (no)
CN (1) CN1127200C (no)
CA (1) CA2284842A1 (no)
DE (1) DE69926320T2 (no)
HK (1) HK1025685A1 (no)
MY (1) MY114617A (no)
NO (1) NO994201L (no)
TW (1) TW510084B (no)
WO (1) WO1999038252A1 (no)

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US6510191B2 (en) * 2001-02-09 2003-01-21 Motorola, Inc. Direct digital synthesizer based on delay line with sorted taps
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US6621314B2 (en) * 2001-09-25 2003-09-16 Intel Corporation Delay locked loop
US6891420B2 (en) * 2001-12-21 2005-05-10 Motorola, Inc. Method and apparatus for digital frequency synthesis
US7202870B2 (en) * 2002-04-01 2007-04-10 Mstar Semiconductor, Inc. Display controller provided with dynamic output clock
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US7302237B2 (en) * 2002-07-23 2007-11-27 Mercury Computer Systems, Inc. Wideband signal generators, measurement devices, methods of signal generation, and methods of signal analysis
US20050013396A1 (en) * 2003-07-15 2005-01-20 Adtran, Inc. Digital clock recovery circuit employing fixed clock oscillator driving fractional delay line
EP1728139A2 (en) * 2004-03-04 2006-12-06 Koninklijke Philips Electronics N.V. Programmable clock generation
US7620133B2 (en) * 2004-11-08 2009-11-17 Motorola, Inc. Method and apparatus for a digital-to-phase converter
CA2586046A1 (en) * 2004-11-29 2006-06-01 Hydrogenics Corporation Systems and methods for detecting and indicating fault conditions in electrochemical cells
CN100392976C (zh) * 2005-01-11 2008-06-04 中国科学院半导体研究所 用于直接数字频率合成的高阶∑△噪声整形内插器
US7102403B2 (en) * 2005-02-03 2006-09-05 Mediatek Incorporation Clock recovering circuit utilizing a delay locked loop for generating an output clock locked to an analog input signal and related method thereof
US7190201B2 (en) * 2005-02-03 2007-03-13 Mosaid Technologies, Inc. Method and apparatus for initializing a delay locked loop
US7164297B2 (en) * 2005-03-31 2007-01-16 Freescale Semiconductor, Inc. Multiple reference clock synthesizer
KR100666492B1 (ko) * 2005-08-11 2007-01-09 삼성전자주식회사 타이밍 생성기 및 그 동작 방법
WO2007109744A2 (en) * 2006-03-21 2007-09-27 Multigig Inc. Dual pll loop for phase noise filtering
US7433262B2 (en) * 2006-08-22 2008-10-07 Atmel Corporation Circuits to delay a signal from DDR-SDRAM memory device including an automatic phase error correction
US7539078B2 (en) * 2006-08-22 2009-05-26 Atmel Corporation Circuits to delay a signal from a memory device
US7642831B2 (en) * 2007-07-23 2010-01-05 Altera Corporation Phase shift circuit with lower intrinsic delay
US8046621B2 (en) * 2007-09-24 2011-10-25 Broadcom Corporation Method and system for generation of signals up to extremely high frequencies using a delay block
US8059706B2 (en) * 2007-09-24 2011-11-15 Broadcom Corporation Method and system for transmission and/or reception of signals utilizing a delay circuit and DDFS
US8160506B2 (en) * 2007-09-24 2012-04-17 Broadcom Corporation Method and system for transmission and/or reception of signals up to extremely high frequencies utilizing a delay circuit
CN100520672C (zh) * 2007-09-28 2009-07-29 电子科技大学 Dds信号发生器幅频特性补偿方法及相应的dds信号发生器
US20090138329A1 (en) * 2007-11-26 2009-05-28 William Paul Wanker Application of query weights input to an electronic commerce information system to target advertising
EP2141797A1 (en) * 2008-07-02 2010-01-06 Nxp B.V. Circuit with a time to digital converter and phase measuring method
US8044742B2 (en) 2009-03-11 2011-10-25 Qualcomm Incorporated Wideband phase modulator
US8588720B2 (en) 2009-12-15 2013-11-19 Qualcomm Incorproated Signal decimation techniques
EP2391000B1 (en) * 2010-05-26 2020-07-08 Integrated Device Technology, Inc. Digital Signal Generator
US20120139592A1 (en) * 2010-12-07 2012-06-07 Qualcomm Incorporated Method and Apparatus for Frequency Synthesizing
RU2470458C1 (ru) * 2011-10-28 2012-12-20 Федеральное государственное унитарное предприятие "Научно-производственное объединение автоматики имени академика Н.А. Семихатова" Устройство формирования интервалов
CN103368567B (zh) * 2012-04-06 2016-03-30 联咏科技股份有限公司 频率合成器
US9000858B2 (en) 2012-04-25 2015-04-07 Qualcomm Incorporated Ultra-wide band frequency modulator
US8817184B1 (en) * 2013-07-12 2014-08-26 Samsung Display Co., Ltd. Point to multi-point clock-forwarded signaling for large displays
EP3075078A4 (en) * 2013-11-28 2017-08-02 Nokia Technologies Oy Method and apparatus for generating oscillator signals
CN105337592B (zh) * 2015-08-28 2018-05-01 北京航天自动控制研究所 一种定周期脉冲周期稳定性监测方法
US10250264B2 (en) * 2016-06-21 2019-04-02 Marvell World Trade Ltd. Multiplying delay-locked loop using sampling time-to-digital converter
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EP0203208B1 (de) * 1985-05-23 1988-11-23 Deutsche ITT Industries GmbH Frequenzsyntheseschaltung zur Erzeugung eines analogen Signals mit digital in Stufen einstellbarer Frequenz
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US4777385A (en) * 1987-02-09 1988-10-11 Rca Licensing Corporation Signal transient improvement circuit
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Also Published As

Publication number Publication date
EP0988691A4 (en) 2003-05-07
NO994201D0 (no) 1999-08-30
CN1256023A (zh) 2000-06-07
CA2284842A1 (en) 1999-07-29
MY114617A (en) 2002-11-30
TW510084B (en) 2002-11-11
DE69926320T2 (de) 2006-04-20
KR20010005533A (ko) 2001-01-15
EP0988691A1 (en) 2000-03-29
JP2001515695A (ja) 2001-09-18
EP0988691B1 (en) 2005-07-27
NO994201L (no) 1999-11-22
WO1999038252A1 (en) 1999-07-29
US5977805A (en) 1999-11-02
DE69926320D1 (de) 2005-09-01
CN1127200C (zh) 2003-11-05

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Legal Events

Date Code Title Description
PF Patent in force
PC Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee)

Effective date: 20120114