HK1003582A1 - Single chip microcomputer - Google Patents
Single chip microcomputerInfo
- Publication number
- HK1003582A1 HK1003582A1 HK98102616A HK98102616A HK1003582A1 HK 1003582 A1 HK1003582 A1 HK 1003582A1 HK 98102616 A HK98102616 A HK 98102616A HK 98102616 A HK98102616 A HK 98102616A HK 1003582 A1 HK1003582 A1 HK 1003582A1
- Authority
- HK
- Hong Kong
- Prior art keywords
- chip microcomputer
- single chip
- microcomputer
- chip
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
- G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
- G06F15/7814—Specially adapted for real time processing, e.g. comprising hardware timers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/24—Loading of the microprogram
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
- G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
- G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Quality & Reliability (AREA)
- Microcomputers (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24415688 | 1988-09-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
HK1003582A1 true HK1003582A1 (en) | 1998-10-30 |
Family
ID=17114596
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
HK98102616A HK1003582A1 (en) | 1988-09-30 | 1998-03-27 | Single chip microcomputer |
Country Status (5)
Country | Link |
---|---|
US (1) | US5426744A (de) |
EP (1) | EP0361525B1 (de) |
KR (1) | KR0136594B1 (de) |
DE (1) | DE68927907T2 (de) |
HK (1) | HK1003582A1 (de) |
Families Citing this family (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5307464A (en) * | 1989-12-07 | 1994-04-26 | Hitachi, Ltd. | Microprocessor and method for setting up its peripheral functions |
JPH04195481A (ja) * | 1990-11-28 | 1992-07-15 | Hitachi Ltd | シングルチツプマイクロコンピュータ及び多機能メモリ |
US5396639A (en) * | 1991-09-16 | 1995-03-07 | Rohm Co., Ltd. | One chip microcomputer having programmable I/O terminals programmed according to data stored in nonvolatile memory |
JPH06150024A (ja) * | 1992-11-10 | 1994-05-31 | Nec Corp | マイクロコンピュータ |
FR2700402B1 (fr) * | 1993-01-13 | 1995-04-07 | Sgs Thomson Microelectronics | Microcontrôleur à mémoire électriquement programmable multimode. |
JP3904244B2 (ja) | 1993-09-17 | 2007-04-11 | 株式会社ルネサステクノロジ | シングル・チップ・データ処理装置 |
US5488612A (en) * | 1993-10-04 | 1996-01-30 | International Business Machines, Corporation | Method and apparatus for field testing field programmable logic arrays |
US6735683B2 (en) | 1994-09-14 | 2004-05-11 | Hitachi, Ltd. | Single-chip microcomputer with hierarchical internal bus structure having data and address signal lines coupling CPU with other processing elements |
TW247949B (en) * | 1994-11-10 | 1995-05-21 | Motorola Inc | Data processor with transparent operation during a background mode and method therefor |
JPH096633A (ja) * | 1995-06-07 | 1997-01-10 | Internatl Business Mach Corp <Ibm> | データ処理システムに於ける高性能多重論理経路の動作用の方法とシステム |
US5784313A (en) | 1995-08-18 | 1998-07-21 | Xilinx, Inc. | Programmable logic device including configuration data or user data memory slices |
US5701441A (en) * | 1995-08-18 | 1997-12-23 | Xilinx, Inc. | Computer-implemented method of optimizing a design in a time multiplexed programmable logic device |
US5761483A (en) * | 1995-08-18 | 1998-06-02 | Xilinx, Inc. | Optimizing and operating a time multiplexed programmable logic device |
US5838954A (en) * | 1995-08-18 | 1998-11-17 | Xilinx, Inc. | Computer-implemented method of optimizing a time multiplexed programmable logic device |
US5615167A (en) * | 1995-09-08 | 1997-03-25 | Digital Equipment Corporation | Method for increasing system bandwidth through an on-chip address lock register |
US5768562A (en) * | 1995-09-26 | 1998-06-16 | Altera Corporation | Methods for implementing logic in auxiliary components associated with programmable logic array devices |
JP3739797B2 (ja) * | 1995-10-06 | 2006-01-25 | パトリオット サイエンティフィック コーポレイション | 縮小命令セット・コンピューター・マイクロプロセッサーの構造 |
US5970255A (en) * | 1995-10-16 | 1999-10-19 | Altera Corporation | System for coupling programmable logic device to external circuitry which selects a logic standard and uses buffers to modify output and input signals accordingly |
WO1997036245A1 (en) * | 1996-03-25 | 1997-10-02 | Advanced Micro Devices, Inc. | Serial interface module and method |
JPH1097385A (ja) * | 1996-09-19 | 1998-04-14 | Toshiba Corp | ディスク記録再生装置及び同装置に適用するインターフェース制御装置 |
US5890199A (en) * | 1996-10-21 | 1999-03-30 | Ramtron International Corporation | Data processor incorporating a ferroelectric memory array selectably configurable as read/write and read only memory |
US6507898B1 (en) * | 1997-04-30 | 2003-01-14 | Canon Kabushiki Kaisha | Reconfigurable data cache controller |
US6674536B2 (en) | 1997-04-30 | 2004-01-06 | Canon Kabushiki Kaisha | Multi-instruction stream processor |
US6421817B1 (en) | 1997-05-29 | 2002-07-16 | Xilinx, Inc. | System and method of computation in a programmable logic device using virtual instructions |
US6047115A (en) * | 1997-05-29 | 2000-04-04 | Xilinx, Inc. | Method for configuring FPGA memory planes for virtual hardware computation |
US6223301B1 (en) * | 1997-09-30 | 2001-04-24 | Compaq Computer Corporation | Fault tolerant memory |
US6898101B1 (en) * | 1997-12-16 | 2005-05-24 | Cypress Semiconductor Corp. | Microcontroller with programmable logic on a single chip |
US6467009B1 (en) * | 1998-10-14 | 2002-10-15 | Triscend Corporation | Configurable processor system unit |
JP3871461B2 (ja) * | 1999-02-02 | 2007-01-24 | ローム株式会社 | シーケンス制御用マイクロコントローラ |
KR100326223B1 (ko) * | 1999-02-27 | 2002-02-27 | 다니구찌 이찌로오, 기타오카 다카시 | 메모리와 프로세서가 동일 칩 상에 형성된 마이크로 컴퓨터 |
US6851047B1 (en) | 1999-10-15 | 2005-02-01 | Xilinx, Inc. | Configuration in a configurable system on a chip |
US6600959B1 (en) * | 2000-02-04 | 2003-07-29 | International Business Machines Corporation | Method and apparatus for implementing microprocessor control logic using dynamic programmable logic arrays |
US6912601B1 (en) | 2000-06-28 | 2005-06-28 | Cypress Semiconductor Corp. | Method of programming PLDs using a wireless link |
US6721840B1 (en) | 2000-08-18 | 2004-04-13 | Triscend Corporation | Method and system for interfacing an integrated circuit to synchronous dynamic memory and static memory |
DE10056198A1 (de) * | 2000-11-13 | 2002-02-14 | Infineon Technologies Ag | Kommunikationssystem zum Austausch von Daten unter Verwendung eines zusätzlichen Prozessors |
US6857110B1 (en) * | 2001-01-30 | 2005-02-15 | Stretch, Inc. | Design methodology for merging programmable logic into a custom IC |
US6725364B1 (en) | 2001-03-08 | 2004-04-20 | Xilinx, Inc. | Configurable processor system |
JP2002323993A (ja) * | 2001-04-25 | 2002-11-08 | Nec Corp | シングルチップマイクロコンピュータ並びにその試験方法及び試験プログラム |
US7107374B1 (en) | 2001-09-05 | 2006-09-12 | Xilinx, Inc. | Method for bus mastering for devices resident in configurable system logic |
US6886092B1 (en) * | 2001-11-19 | 2005-04-26 | Xilinx, Inc. | Custom code processing in PGA by providing instructions from fixed logic processor portion to programmable dedicated processor portion |
DE10204344A1 (de) * | 2002-02-01 | 2003-08-14 | Systemonic Ag | Konfigurierbares Bussystem |
US7245527B2 (en) * | 2005-05-16 | 2007-07-17 | Freescale Semiconductor, Inc. | Nonvolatile memory system using magneto-resistive random access memory (MRAM) |
US7884672B1 (en) | 2006-11-01 | 2011-02-08 | Cypress Semiconductor Corporation | Operational amplifier and method for amplifying a signal with shared compensation components |
KR100961207B1 (ko) * | 2008-10-02 | 2010-06-09 | 주식회사 하이닉스반도체 | 커맨드 생성회로 및 반도체 메모리 장치 |
US20100117242A1 (en) * | 2008-11-10 | 2010-05-13 | Miller Gary L | Technique for packaging multiple integrated circuits |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3881173A (en) * | 1973-05-14 | 1975-04-29 | Amdahl Corp | Condition code determination and data processing |
GB1468642A (en) * | 1975-01-07 | 1977-03-30 | Burroughs Corp | Data processing systems |
US4192007A (en) * | 1978-05-30 | 1980-03-04 | Lorain Products Corporation | Programmable ringing generator |
US4197579A (en) * | 1978-06-06 | 1980-04-08 | Xebec Systems Incorporated | Multi-processor for simultaneously executing a plurality of programs in a time-interlaced manner |
US4320453A (en) * | 1978-11-02 | 1982-03-16 | Digital House, Ltd. | Dual sequencer microprocessor |
US4794558A (en) * | 1979-06-12 | 1988-12-27 | Motorola, Inc. | Microprocessor having self-programmed eprom |
US4349870A (en) * | 1979-09-05 | 1982-09-14 | Motorola, Inc. | Microcomputer with programmable multi-function port |
US4339657A (en) * | 1980-02-06 | 1982-07-13 | International Business Machines Corporation | Error logging for automatic apparatus |
US4387444A (en) * | 1980-07-07 | 1983-06-07 | Hughes Aircraft Company | Non-volatile semiconductor memory cells |
JPS57117027A (en) * | 1981-01-13 | 1982-07-21 | Nec Corp | Signal sending and receiving circuit |
EP0086307B1 (de) * | 1982-02-11 | 1997-02-26 | Texas Instruments Incorporated | Mikrorechnersystem für digitale Datenverarbeitung |
US4586127A (en) * | 1982-11-03 | 1986-04-29 | Burroughs Corp. | Multiple control stores for a pipelined microcontroller |
DE3241357A1 (de) * | 1982-11-09 | 1984-05-10 | Siemens AG, 1000 Berlin und 8000 München | Vorrichtung zur mikrobefehls-bereitstellung fuer mindestens zwei unabhaengig arbeitende funktionseinheiten in einem integrierten, mikroprogrammierten elektronischen baustein und verfahren zu ihrem betrieb |
US4578750A (en) * | 1983-08-24 | 1986-03-25 | Amdahl Corporation | Code determination using half-adder based operand comparator |
US4609986A (en) * | 1984-06-14 | 1986-09-02 | Altera Corporation | Programmable logic array device using EPROM technology |
JPS61285567A (ja) * | 1985-08-06 | 1986-12-16 | Minolta Camera Co Ltd | ワンチツプマイクロコンピユ−タ |
JPS6267800A (ja) * | 1985-09-20 | 1987-03-27 | Hitachi Ltd | 半導体集積回路装置 |
JPS63175300A (ja) * | 1987-01-16 | 1988-07-19 | Hitachi Ltd | 半導体集積回路装置 |
US5117498A (en) * | 1988-08-19 | 1992-05-26 | Motorola, Inc. | Processer with flexible return from subroutine |
-
1989
- 1989-09-28 KR KR1019890013950A patent/KR0136594B1/ko not_active IP Right Cessation
- 1989-09-29 EP EP89118106A patent/EP0361525B1/de not_active Expired - Lifetime
- 1989-09-29 DE DE68927907T patent/DE68927907T2/de not_active Expired - Fee Related
-
1994
- 1994-03-01 US US08/203,761 patent/US5426744A/en not_active Expired - Lifetime
-
1998
- 1998-03-27 HK HK98102616A patent/HK1003582A1/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
US5426744A (en) | 1995-06-20 |
DE68927907T2 (de) | 1997-10-09 |
EP0361525A2 (de) | 1990-04-04 |
EP0361525B1 (de) | 1997-03-26 |
KR900005282A (ko) | 1990-04-13 |
EP0361525A3 (de) | 1991-03-13 |
KR0136594B1 (ko) | 1998-10-01 |
DE68927907D1 (de) | 1997-04-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PF | Patent in force | ||
PC | Patent ceased (i.e. patent has lapsed due to the failure to pay the renewal fee) |
Effective date: 20050929 |