FR2918792B1 - Procede de traitement de defauts d'interface dans un substrat. - Google Patents
Procede de traitement de defauts d'interface dans un substrat.Info
- Publication number
- FR2918792B1 FR2918792B1 FR0756370A FR0756370A FR2918792B1 FR 2918792 B1 FR2918792 B1 FR 2918792B1 FR 0756370 A FR0756370 A FR 0756370A FR 0756370 A FR0756370 A FR 0756370A FR 2918792 B1 FR2918792 B1 FR 2918792B1
- Authority
- FR
- France
- Prior art keywords
- substrate
- processing interface
- interface defects
- defects
- processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Element Separation (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0756370A FR2918792B1 (fr) | 2007-07-10 | 2007-07-10 | Procede de traitement de defauts d'interface dans un substrat. |
US12/165,365 US7799651B2 (en) | 2007-07-10 | 2008-06-30 | Method of treating interface defects in a substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0756370A FR2918792B1 (fr) | 2007-07-10 | 2007-07-10 | Procede de traitement de defauts d'interface dans un substrat. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2918792A1 FR2918792A1 (fr) | 2009-01-16 |
FR2918792B1 true FR2918792B1 (fr) | 2010-04-23 |
Family
ID=39183192
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0756370A Active FR2918792B1 (fr) | 2007-07-10 | 2007-07-10 | Procede de traitement de defauts d'interface dans un substrat. |
Country Status (2)
Country | Link |
---|---|
US (1) | US7799651B2 (fr) |
FR (1) | FR2918792B1 (fr) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8962376B2 (en) * | 2009-04-21 | 2015-02-24 | The Silanna Group Pty Ltd | Optoelectronic device with lateral pin or pin junction |
US11605630B2 (en) * | 2009-10-12 | 2023-03-14 | Monolithic 3D Inc. | 3D integrated circuit device and structure with hybrid bonding |
FR2968121B1 (fr) | 2010-11-30 | 2012-12-21 | Soitec Silicon On Insulator | Procede de transfert d'une couche a haute temperature |
FR3076292B1 (fr) * | 2017-12-28 | 2020-01-03 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de transfert d'une couche utile sur un substrat support |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4177084A (en) * | 1978-06-09 | 1979-12-04 | Hewlett-Packard Company | Method for producing a low defect layer of silicon-on-sapphire wafer |
US4602965A (en) * | 1984-03-13 | 1986-07-29 | Communications Satellite Corporation | Method of making FETs in GaAs by dual species implantation of silicon and boron |
JPS61199641A (ja) * | 1985-02-28 | 1986-09-04 | Oki Electric Ind Co Ltd | 化合物半導体素子の製造方法 |
US4659392A (en) * | 1985-03-21 | 1987-04-21 | Hughes Aircraft Company | Selective area double epitaxial process for fabricating silicon-on-insulator structures for use with MOS devices and integrated circuits |
US4863877A (en) * | 1987-11-13 | 1989-09-05 | Kopin Corporation | Ion implantation and annealing of compound semiconductor layers |
US6703293B2 (en) * | 2002-07-11 | 2004-03-09 | Sharp Laboratories Of America, Inc. | Implantation at elevated temperatures for amorphization re-crystallization of Si1-xGex films on silicon substrates |
US8138061B2 (en) * | 2005-01-07 | 2012-03-20 | International Business Machines Corporation | Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide |
US7291539B2 (en) * | 2005-06-01 | 2007-11-06 | International Business Machines Corporation | Amorphization/templated recrystallization method for hybrid orientation substrates |
-
2007
- 2007-07-10 FR FR0756370A patent/FR2918792B1/fr active Active
-
2008
- 2008-06-30 US US12/165,365 patent/US7799651B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20090014720A1 (en) | 2009-01-15 |
FR2918792A1 (fr) | 2009-01-16 |
US7799651B2 (en) | 2010-09-21 |
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Legal Events
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CD | Change of name or company name |
Owner name: SOITEC, FR Effective date: 20120423 |
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