FR2838238B1 - Dispositif semiconducteur a grille enveloppante encapsule dans un milieu isolant - Google Patents

Dispositif semiconducteur a grille enveloppante encapsule dans un milieu isolant

Info

Publication number
FR2838238B1
FR2838238B1 FR0204358A FR0204358A FR2838238B1 FR 2838238 B1 FR2838238 B1 FR 2838238B1 FR 0204358 A FR0204358 A FR 0204358A FR 0204358 A FR0204358 A FR 0204358A FR 2838238 B1 FR2838238 B1 FR 2838238B1
Authority
FR
France
Prior art keywords
semiconductor device
insulating medium
enveloping
encapsulated
grid encapsulated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0204358A
Other languages
English (en)
Other versions
FR2838238A1 (fr
Inventor
Philippe Coronel
Stephane Monfray
Thomas Skotnicki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Orange SA
Original Assignee
STMicroelectronics SA
France Telecom SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA, France Telecom SA filed Critical STMicroelectronics SA
Priority to FR0204358A priority Critical patent/FR2838238B1/fr
Priority to US10/409,653 priority patent/US6969878B2/en
Publication of FR2838238A1 publication Critical patent/FR2838238A1/fr
Application granted granted Critical
Publication of FR2838238B1 publication Critical patent/FR2838238B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78645Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
    • H01L29/78648Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/78654Monocrystalline silicon transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
FR0204358A 2002-04-08 2002-04-08 Dispositif semiconducteur a grille enveloppante encapsule dans un milieu isolant Expired - Fee Related FR2838238B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0204358A FR2838238B1 (fr) 2002-04-08 2002-04-08 Dispositif semiconducteur a grille enveloppante encapsule dans un milieu isolant
US10/409,653 US6969878B2 (en) 2002-04-08 2003-04-08 Surround-gate semiconductor device encapsulated in an insulating medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0204358A FR2838238B1 (fr) 2002-04-08 2002-04-08 Dispositif semiconducteur a grille enveloppante encapsule dans un milieu isolant

Publications (2)

Publication Number Publication Date
FR2838238A1 FR2838238A1 (fr) 2003-10-10
FR2838238B1 true FR2838238B1 (fr) 2005-04-15

Family

ID=28052202

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0204358A Expired - Fee Related FR2838238B1 (fr) 2002-04-08 2002-04-08 Dispositif semiconducteur a grille enveloppante encapsule dans un milieu isolant

Country Status (2)

Country Link
US (1) US6969878B2 (fr)
FR (1) FR2838238B1 (fr)

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KR100451459B1 (ko) * 2003-02-10 2004-10-07 삼성전자주식회사 더블 게이트 전극 형성 방법 및 더블 게이트 전극을포함하는 반도체 장치의 제조 방법
US6909151B2 (en) 2003-06-27 2005-06-21 Intel Corporation Nonplanar device with stress incorporation layer and method of fabrication
US7456476B2 (en) 2003-06-27 2008-11-25 Intel Corporation Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
US7268058B2 (en) * 2004-01-16 2007-09-11 Intel Corporation Tri-gate transistors and methods to fabricate same
US7154118B2 (en) * 2004-03-31 2006-12-26 Intel Corporation Bulk non-planar transistor having strained enhanced mobility and methods of fabrication
DE102005026228B4 (de) * 2004-06-08 2010-04-15 Samsung Electronics Co., Ltd., Suwon Transistor vom GAA-Typ und Verfahren zu dessen Herstellung
US7042009B2 (en) 2004-06-30 2006-05-09 Intel Corporation High mobility tri-gate devices and methods of fabrication
US7348284B2 (en) 2004-08-10 2008-03-25 Intel Corporation Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow
US7422946B2 (en) 2004-09-29 2008-09-09 Intel Corporation Independently accessed double-gate and tri-gate transistors in same process flow
US7332439B2 (en) * 2004-09-29 2008-02-19 Intel Corporation Metal gate transistors with epitaxial source and drain regions
US7361958B2 (en) * 2004-09-30 2008-04-22 Intel Corporation Nonplanar transistors with metal gate electrodes
US20060086977A1 (en) 2004-10-25 2006-04-27 Uday Shah Nonplanar device with thinned lower body portion and method of fabrication
US7518196B2 (en) 2005-02-23 2009-04-14 Intel Corporation Field effect transistor with narrow bandgap source and drain regions and method of fabrication
US20060202266A1 (en) * 2005-03-14 2006-09-14 Marko Radosavljevic Field effect transistor with metal source/drain regions
FR2884052B1 (fr) * 2005-03-30 2007-06-22 St Microelectronics Crolles 2 Transistor imos
US7858481B2 (en) 2005-06-15 2010-12-28 Intel Corporation Method for fabricating transistor with thinned channel
US7547637B2 (en) 2005-06-21 2009-06-16 Intel Corporation Methods for patterning a semiconductor film
US7279375B2 (en) * 2005-06-30 2007-10-09 Intel Corporation Block contact architectures for nanoscale channel transistors
FR2889622A1 (fr) * 2005-08-08 2007-02-09 St Microelectronics Crolles 2 Procede de fabrication d'un transistor a nanodoigts semiconducteurs paralleles
US7402875B2 (en) 2005-08-17 2008-07-22 Intel Corporation Lateral undercut of metal gate in SOI device
US20070090416A1 (en) * 2005-09-28 2007-04-26 Doyle Brian S CMOS devices with a single work function gate electrode and method of fabrication
US7479421B2 (en) 2005-09-28 2009-01-20 Intel Corporation Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
US20070090408A1 (en) * 2005-09-29 2007-04-26 Amlan Majumdar Narrow-body multiple-gate FET with dominant body transistor for high performance
FR2893762B1 (fr) * 2005-11-18 2007-12-21 Commissariat Energie Atomique Procede de realisation de transistor a double grilles auto-alignees par reduction de motifs de grille
US7485503B2 (en) 2005-11-30 2009-02-03 Intel Corporation Dielectric interface for group III-V semiconductor device
US20070152266A1 (en) * 2005-12-29 2007-07-05 Intel Corporation Method and structure for reducing the external resistance of a three-dimensional transistor through use of epitaxial layers
FR2897201B1 (fr) * 2006-02-03 2008-04-25 Stmicroelectronics Crolles Sas Dispositif de transistor a doubles grilles planaires et procede de fabrication.
US7803668B2 (en) 2006-02-24 2010-09-28 Stmicroelectronics (Crolles 2) Sas Transistor and fabrication process
FR2897981B1 (fr) * 2006-02-24 2008-05-30 St Microelectronics Crolles 2 Procede de fabrication de transistor et transistor
US7456042B2 (en) * 2006-06-04 2008-11-25 Robert Bosch Gmbh Microelectromechanical systems having stored charge and methods for fabricating and using same
US8143646B2 (en) 2006-08-02 2012-03-27 Intel Corporation Stacking fault and twin blocking barrier for integrating III-V on Si
US20080157225A1 (en) * 2006-12-29 2008-07-03 Suman Datta SRAM and logic transistors with variable height multi-gate transistor architecture
ES2489615T3 (es) * 2007-12-11 2014-09-02 Apoteknos Para La Piel, S.L. Uso de un compuesto derivado del acido p-hidroxifenil propionico para el tratamiento de la psoriasis
US8362566B2 (en) 2008-06-23 2013-01-29 Intel Corporation Stress in trigate devices using complimentary gate fill materials
FR2937463B1 (fr) * 2008-10-17 2010-12-24 Commissariat Energie Atomique Procede de fabrication de composants empiles et auto-alignes sur un substrat
US8860006B2 (en) * 2010-03-26 2014-10-14 The Regents Of The University Of California Spin transistor having multiferroic gate dielectric
US8815691B2 (en) 2012-12-21 2014-08-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabricating a gate all around device
US9954107B2 (en) * 2015-05-05 2018-04-24 International Business Machines Corporation Strained FinFET source drain isolation
US10522687B2 (en) * 2017-02-16 2019-12-31 Qualcomm Incorporated Wrap-around gate structures and methods of forming wrap-around gate structures
US20220335982A1 (en) * 2021-04-19 2022-10-20 Micron Technology, Inc. Shared vertical digit line for semiconductor devices

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KR960002088B1 (ko) * 1993-02-17 1996-02-10 삼성전자주식회사 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법
US5348899A (en) * 1993-05-12 1994-09-20 Micron Semiconductor, Inc. Method of fabricating a bottom and top gated thin film transistor
JP3460863B2 (ja) * 1993-09-17 2003-10-27 三菱電機株式会社 半導体装置の製造方法
US5497019A (en) * 1994-09-22 1996-03-05 The Aerospace Corporation Silicon-on-insulator gate-all-around MOSFET devices and fabrication methods
US5705405A (en) * 1994-09-30 1998-01-06 Sgs-Thomson Microelectronics, Inc. Method of making the film transistor with all-around gate electrode
FR2791178B1 (fr) * 1999-03-19 2001-11-16 France Telecom NOUVEAU DISPOSITIF SEMI-CONDUCTEUR COMBINANT LES AVANTAGES DES ARCHITECTURES MASSIVE ET soi, ET PROCEDE DE FABRICATION
FR2795555B1 (fr) * 1999-06-28 2002-12-13 France Telecom Procede de fabrication d'un dispositif semi-conducteur comprenant un empilement forme alternativement de couches de silicium et de couches de materiau dielectrique
FR2799305B1 (fr) * 1999-10-05 2004-06-18 St Microelectronics Sa Procede de fabrication d'un dispositif semi-conducteur a grille enveloppante et dispositif obtenu

Also Published As

Publication number Publication date
US20040016968A1 (en) 2004-01-29
FR2838238A1 (fr) 2003-10-10
US6969878B2 (en) 2005-11-29

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Effective date: 20091231