FR2758653B1 - Memoire morte a semiconducteurs et procede de fabrication - Google Patents

Memoire morte a semiconducteurs et procede de fabrication

Info

Publication number
FR2758653B1
FR2758653B1 FR9707105A FR9707105A FR2758653B1 FR 2758653 B1 FR2758653 B1 FR 2758653B1 FR 9707105 A FR9707105 A FR 9707105A FR 9707105 A FR9707105 A FR 9707105A FR 2758653 B1 FR2758653 B1 FR 2758653B1
Authority
FR
France
Prior art keywords
semiconductor
manufacturing
dead memory
dead
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9707105A
Other languages
English (en)
Other versions
FR2758653A1 (fr
Inventor
Jemmy Wen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
United Microelectronics Corp
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from TW086100495A external-priority patent/TW326111B/zh
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Publication of FR2758653A1 publication Critical patent/FR2758653A1/fr
Application granted granted Critical
Publication of FR2758653B1 publication Critical patent/FR2758653B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/38—Doping programmed, e.g. mask ROM
    • H10B20/383—Channel doping programmed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
FR9707105A 1997-01-17 1997-06-09 Memoire morte a semiconducteurs et procede de fabrication Expired - Fee Related FR2758653B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW086100495A TW326111B (en) 1997-01-17 1997-01-17 Structure and manufacturing method for read only memory
NL1006265A NL1006265C2 (nl) 1997-01-17 1997-06-09 Halfgeleider-alleen-uitlees-geheugeninrichting en werkwijze voor het fabriceren hiervan.

Publications (2)

Publication Number Publication Date
FR2758653A1 FR2758653A1 (fr) 1998-07-24
FR2758653B1 true FR2758653B1 (fr) 2002-03-08

Family

ID=26642606

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9707105A Expired - Fee Related FR2758653B1 (fr) 1997-01-17 1997-06-09 Memoire morte a semiconducteurs et procede de fabrication

Country Status (5)

Country Link
US (1) US5943573A (fr)
JP (1) JPH10209301A (fr)
DE (1) DE19723651C2 (fr)
FR (1) FR2758653B1 (fr)
NL (1) NL1006265C2 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6067594A (en) * 1997-09-26 2000-05-23 Rambus, Inc. High frequency bus system
US6545875B1 (en) * 2000-05-10 2003-04-08 Rambus, Inc. Multiple channel modules and bus systems using same
US6853557B1 (en) * 2000-09-20 2005-02-08 Rambus, Inc. Multi-channel memory architecture
US8391039B2 (en) 2001-04-24 2013-03-05 Rambus Inc. Memory module with termination component
US6675272B2 (en) 2001-04-24 2004-01-06 Rambus Inc. Method and apparatus for coordinating memory operations among diversely-located memory components
US7301831B2 (en) 2004-09-15 2007-11-27 Rambus Inc. Memory systems with variable delays for write data signals
US11088140B2 (en) * 2019-08-27 2021-08-10 Nanya Technology Corporation Multiple semiconductor elements with different threshold voltages

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3914855A (en) * 1974-05-09 1975-10-28 Bell Telephone Labor Inc Methods for making MOS read-only memories
US4356042A (en) * 1980-11-07 1982-10-26 Mostek Corporation Method for fabricating a semiconductor read only memory
JPS6442168A (en) * 1987-08-07 1989-02-14 Sharp Kk Semiconductor device
JP2555103B2 (ja) * 1987-11-13 1996-11-20 株式会社日立製作所 半導体集積回路装置の製造方法
JPH04294582A (ja) * 1991-03-25 1992-10-19 Nippon Steel Corp 半導体装置の製造方法
US5378647A (en) * 1993-10-25 1995-01-03 United Microelectronics Corporation Method of making a bottom gate mask ROM device
US5358887A (en) * 1993-11-26 1994-10-25 United Microelectronics Corporation Ulsi mask ROM structure and method of manufacture
US5446299A (en) * 1994-04-29 1995-08-29 International Business Machines Corporation Semiconductor random access memory cell on silicon-on-insulator with dual control gates
US5429988A (en) * 1994-06-13 1995-07-04 United Microelectronics Corporation Process for producing high density conductive lines
US5460987A (en) * 1994-12-27 1995-10-24 United Microelectronics Corporation Method of making field effect transistor structure of a diving channel device

Also Published As

Publication number Publication date
DE19723651C2 (de) 2001-05-31
NL1006265C2 (nl) 1998-12-10
FR2758653A1 (fr) 1998-07-24
DE19723651A1 (de) 1998-07-23
JPH10209301A (ja) 1998-08-07
US5943573A (en) 1999-08-24

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Legal Events

Date Code Title Description
ST Notification of lapse