FR2240528A1 - Formation of insulation barriers in silicon wafers - by gas etching hollows through a mask, then filling with insulation - Google Patents

Formation of insulation barriers in silicon wafers - by gas etching hollows through a mask, then filling with insulation

Info

Publication number
FR2240528A1
FR2240528A1 FR7328825A FR7328825A FR2240528A1 FR 2240528 A1 FR2240528 A1 FR 2240528A1 FR 7328825 A FR7328825 A FR 7328825A FR 7328825 A FR7328825 A FR 7328825A FR 2240528 A1 FR2240528 A1 FR 2240528A1
Authority
FR
France
Prior art keywords
insulation
hollows
barriers
mask
filling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7328825A
Other languages
French (fr)
Other versions
FR2240528B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Radiotechnique Compelec RTC SA
Original Assignee
Radiotechnique Compelec RTC SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Radiotechnique Compelec RTC SA filed Critical Radiotechnique Compelec RTC SA
Priority to FR7328825A priority Critical patent/FR2240528A1/en
Publication of FR2240528A1 publication Critical patent/FR2240528A1/en
Application granted granted Critical
Publication of FR2240528B1 publication Critical patent/FR2240528B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
    • H01L21/7621—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region the recessed region having a shape other than rectangular, e.g. rounded or oblique shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

Rectangular isolation barriers are produced between regions of a semiconductor device made from a silicon plate, so as to be flush with the active surface, by covering the active face with at least one film of cpds. of Si with at least one element at. wt. 11-17, coating this with a photomask in which windows are formed where the barriers are to be produced. Hollows are formed in these regions by placing the plate in a chamber where gaseous fluorides are introduced under 10-1000 Pa pressure and the gases are activated by an HF electric field. The etching process is stopped at a desired depth in the plate, and the hollows are filled with insulating materials. The rectangularity is obtained whatever the crystal orientation of the surface crystal planes. The etch pattern produced is perpendicular to the surface.
FR7328825A 1973-08-07 1973-08-07 Formation of insulation barriers in silicon wafers - by gas etching hollows through a mask, then filling with insulation Granted FR2240528A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7328825A FR2240528A1 (en) 1973-08-07 1973-08-07 Formation of insulation barriers in silicon wafers - by gas etching hollows through a mask, then filling with insulation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7328825A FR2240528A1 (en) 1973-08-07 1973-08-07 Formation of insulation barriers in silicon wafers - by gas etching hollows through a mask, then filling with insulation

Publications (2)

Publication Number Publication Date
FR2240528A1 true FR2240528A1 (en) 1975-03-07
FR2240528B1 FR2240528B1 (en) 1977-08-26

Family

ID=9123688

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7328825A Granted FR2240528A1 (en) 1973-08-07 1973-08-07 Formation of insulation barriers in silicon wafers - by gas etching hollows through a mask, then filling with insulation

Country Status (1)

Country Link
FR (1) FR2240528A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0000897A1 (en) * 1977-08-15 1979-03-07 International Business Machines Corporation Method for producing laterally isolated silicium areas

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0000897A1 (en) * 1977-08-15 1979-03-07 International Business Machines Corporation Method for producing laterally isolated silicium areas

Also Published As

Publication number Publication date
FR2240528B1 (en) 1977-08-26

Similar Documents

Publication Publication Date Title
JPS5690525A (en) Manufacture of semiconductor device
GB1147599A (en) Method for fabricating semiconductor devices in integrated circuits
GB1111438A (en) Electrical connection through a body of semiconductor material
ES466901A1 (en) Total dielectric isolation utilizing a combination of reactive ion etching, anodic etching, and thermal oxidation
GB1377769A (en) Methods of preparing shadow masks
WO2001063645A3 (en) Capacitive pressure-responsive devices and their fabrication
FR2240528A1 (en) Formation of insulation barriers in silicon wafers - by gas etching hollows through a mask, then filling with insulation
JPS55153377A (en) Production of semiconductor device
CA1009607A (en) Method of manufacturing etched structures in substrates by ion etching
CA2008788A1 (en) Mesa fabrication in semiconductor structures
GB1514949A (en) Method of fabricating stepped electrodes
JPS56146247A (en) Manufacture of semiconductor device
FR2301093A1 (en) Semiconductors using aluminium doped insulation layer - where aluminium is diffused simultaneously with boron required for the base
JPS5618426A (en) Manufacture of semiconductor device
JPS5610931A (en) Formation of aluminum pattern of semiconductor substrate
JPS5490032A (en) Plasma etching method
JPS562633A (en) Etching method
ES349369A1 (en) Method of making a semiconductor device having two insulating coatings
GB1187611A (en) Method of manufacturing Semiconductors Device
JPS53147482A (en) Production of semiconductor device
JPS6414968A (en) Formation of gate electrode
GB1440627A (en) Method for manufacturing integrated circuits
JPS5240977A (en) Process for production of semiconductor device
JPH0362518A (en) Etching process
JPS5279777A (en) Production of semiconductor device

Legal Events

Date Code Title Description
ST Notification of lapse