FI962297A - Merkinantojärjestelmä - Google Patents

Merkinantojärjestelmä Download PDF

Info

Publication number
FI962297A
FI962297A FI962297A FI962297A FI962297A FI 962297 A FI962297 A FI 962297A FI 962297 A FI962297 A FI 962297A FI 962297 A FI962297 A FI 962297A FI 962297 A FI962297 A FI 962297A
Authority
FI
Finland
Prior art keywords
signaling systems
signaling
systems
Prior art date
Application number
FI962297A
Other languages
English (en)
Swedish (sv)
Other versions
FI962297A0 (fi
Inventor
Mats Olof Joakim Hedberg
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of FI962297A0 publication Critical patent/FI962297A0/fi
Publication of FI962297A publication Critical patent/FI962297A/fi

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018557—Coupling arrangements; Impedance matching circuits
    • H03K19/018571—Coupling arrangements; Impedance matching circuits of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
  • Electronic Switches (AREA)
  • Time-Division Multiplex Systems (AREA)
FI962297A 1993-12-03 1996-05-31 Merkinantojärjestelmä FI962297A (fi)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9304025A SE515490C2 (sv) 1993-12-03 1993-12-03 Signaleringssystem
PCT/SE1994/001156 WO1995015616A1 (en) 1993-12-03 1994-12-01 Signalling system

Publications (2)

Publication Number Publication Date
FI962297A0 FI962297A0 (fi) 1996-05-31
FI962297A true FI962297A (fi) 1996-05-31

Family

ID=20391986

Family Applications (1)

Application Number Title Priority Date Filing Date
FI962297A FI962297A (fi) 1993-12-03 1996-05-31 Merkinantojärjestelmä

Country Status (14)

Country Link
US (1) US5761244A (fi)
EP (1) EP0777935A1 (fi)
JP (1) JPH09502588A (fi)
KR (1) KR100290459B1 (fi)
CN (1) CN1084087C (fi)
AU (1) AU685554B2 (fi)
BR (1) BR9408210A (fi)
CA (1) CA2176459C (fi)
FI (1) FI962297A (fi)
MY (1) MY113300A (fi)
NO (1) NO962279D0 (fi)
SE (1) SE515490C2 (fi)
TW (1) TW267285B (fi)
WO (1) WO1995015616A1 (fi)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE504636C2 (sv) * 1995-07-27 1997-03-24 Ericsson Telefon Ab L M Universell sändaranordning
SE509882C2 (sv) * 1995-11-10 1999-03-15 Ericsson Telefon Ab L M Mottagarkrets innefattande parallella ingångskretsar
DE59605630D1 (de) * 1996-01-16 2000-08-24 Ericsson Telefon Ab L M Ausgangspufferschaltkreis
DE19654221B4 (de) 1996-12-23 2005-11-24 Telefonaktiebolaget Lm Ericsson (Publ) Leitungsanschlußschaltkreis
JPH10268995A (ja) * 1997-03-25 1998-10-09 Canon Inc インターフェース制御方法及びその装置
WO1999055082A1 (en) * 1998-04-17 1999-10-28 Conexant Systems, Inc. Low cost line-based video compression of digital video stream data
US6404223B1 (en) 2001-01-22 2002-06-11 Mayo Foundation For Medical Education And Research Self-terminating current mirror transceiver logic
JP4526644B2 (ja) * 2000-03-21 2010-08-18 Ｏｋｉセミコンダクタ株式会社 非接触の信号送受信回路
GB0028134D0 (en) * 2000-11-17 2001-01-03 Texas Instruments Ltd Improvements in or relating to systems for data transmission
US6288581B1 (en) 2001-01-05 2001-09-11 Pericom Semiconductor Corp. Low-voltage differential-signalling output buffer with pre-emphasis
DE10261386A1 (de) 2002-12-30 2004-07-08 Robert Bosch Gmbh Vorrichtung für einen Leitungsabschluss von Zweidraht-Leitungen
KR100697281B1 (ko) 2005-03-17 2007-03-20 삼성전자주식회사 패키지 저항 변화에 따른 임피던스 부정합과 전압강하를방지할 수 있는 수신 방법 및 장치
JP5369100B2 (ja) * 2007-07-12 2013-12-18 シリコン・ライン・ゲー・エム・ベー・ハー 少なくとも１個の差動ラインを駆動する回路装置及び方法
JP4438877B2 (ja) 2008-03-12 2010-03-24 ソニー株式会社 通信システム、受信装置、および受信方法
KR101079603B1 (ko) 2009-08-11 2011-11-03 주식회사 티엘아이 3레벨 전압을 이용하는 차동 데이터 송수신 장치 및 차동 데이터 송수신 방법
US9344088B1 (en) * 2015-04-30 2016-05-17 Freescale Semiconductor, Inc. Driver circuit receiving a regulated pre-driver supply voltage
KR102529187B1 (ko) * 2016-03-31 2023-05-04 삼성전자주식회사 복수의 통신 규격들을 지원하는 수신 인터페이스 회로 및 이를 포함하는 메모리 시스템

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0077771A1 (en) * 1981-04-16 1983-05-04 Mostek Corporation Current limiting driver circuit
JPS6382122A (ja) * 1986-09-26 1988-04-12 Toshiba Corp 論理回路
US4794283A (en) * 1987-05-26 1988-12-27 Motorola, Inc. Edge sensitive level translating and rereferencing CMOS circuitry
US4855623A (en) * 1987-11-05 1989-08-08 Texas Instruments Incorporated Output buffer having programmable drive current
US4808944A (en) * 1987-11-23 1989-02-28 Triquint Semiconductor, Inc. High accuracy differential output stage
JPH073945B2 (ja) * 1988-06-27 1995-01-18 日本電気株式会社 Ｃｍｏｓ出力回路
US5075569A (en) * 1989-03-17 1991-12-24 Tektronix, Inc. Output device circuit and method to minimize impedance fluctuations during crossover
US5216297A (en) * 1991-09-12 1993-06-01 Intergraph Corporation Low voltage swing output mos circuit for driving an ecl circuit

Also Published As

Publication number Publication date
EP0777935A1 (en) 1997-06-11
KR100290459B1 (ko) 2001-06-01
WO1995015616A1 (en) 1995-06-08
JPH09502588A (ja) 1997-03-11
MY113300A (en) 2002-01-31
FI962297A0 (fi) 1996-05-31
US5761244A (en) 1998-06-02
AU1207795A (en) 1995-06-19
CA2176459A1 (en) 1995-06-08
NO962279L (no) 1996-06-03
SE9304025L (sv) 1995-06-04
SE515490C2 (sv) 2001-08-13
AU685554B2 (en) 1998-01-22
KR960706717A (ko) 1996-12-09
CN1136867A (zh) 1996-11-27
TW267285B (fi) 1996-01-01
BR9408210A (pt) 1997-08-26
NO962279D0 (no) 1996-06-03
SE9304025D0 (sv) 1993-12-03
CA2176459C (en) 2000-02-15
CN1084087C (zh) 2002-05-01

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