EP2746876A2 - Herstellungstechniken zur Verbesserung der Druckgleichförmigkeit in anodisch gebundenen Dampfzellen - Google Patents

Herstellungstechniken zur Verbesserung der Druckgleichförmigkeit in anodisch gebundenen Dampfzellen Download PDF

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Publication number
EP2746876A2
EP2746876A2 EP13181421.2A EP13181421A EP2746876A2 EP 2746876 A2 EP2746876 A2 EP 2746876A2 EP 13181421 A EP13181421 A EP 13181421A EP 2746876 A2 EP2746876 A2 EP 2746876A2
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EP
European Patent Office
Prior art keywords
wafer
diameter
sacrificial
vapor
vapor cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
EP13181421.2A
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English (en)
French (fr)
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EP2746876B1 (de
EP2746876A3 (de
Inventor
Daniel W. Younger
Jeff A. Ridley
Son T. Lu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell International Inc
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Honeywell International Inc
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Publication date
Priority claimed from US13/662,850 external-priority patent/US8941442B2/en
Application filed by Honeywell International Inc filed Critical Honeywell International Inc
Publication of EP2746876A2 publication Critical patent/EP2746876A2/de
Publication of EP2746876A3 publication Critical patent/EP2746876A3/de
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Publication of EP2746876B1 publication Critical patent/EP2746876B1/de
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    • GPHYSICS
    • G04HOROLOGY
    • G04FTIME-INTERVAL MEASURING
    • G04F5/00Apparatus for producing preselected time intervals for use as timing standards
    • G04F5/14Apparatus for producing preselected time intervals for use as timing standards using atomic clocks
    • G04F5/145Apparatus for producing preselected time intervals for use as timing standards using atomic clocks using Coherent Population Trapping

Definitions

  • Chip-Scale Atomic Clocks include vapor cells that contain vapors of an alkali metal such as rubidium (Rb).
  • the vapor cells also typically contain a buffer gas, such as an argon-nitrogen buffer gas blend.
  • the standard technique for fabricating the vapor cells involves anodically bonding two glass wafers on opposing sides of a silicon wafer having a plurality of cell structures that define cavities. The alkali metal vapor and buffer gas are trapped in the cavities of the cell structures between the two glass wafers.
  • the anodic bond joint starts at the locations between the wafers that are initially in contact and spreads out as the electrostatic potential brings the surfaces together. This lag of the bond front from one area to the next can lead to pressure differences in the vapor cells. Additionally, the presence of a low boiling temperature material like Rb requires the bonding to take place at as low a temperature as possible, otherwise the vapor generated can foul the bond surface. Thus, a high voltage needs to be applied as the wafers are heating, to allow the bond to form as soon as possible. This can result in vapor cells sealing at different times, and thus at different temperatures, which can result in pressure differences in the vapor cells, even on cells that are fabricated side-by-side on the same wafer.
  • Figure 1 is a cross-sectional schematic depiction of a physics package for a chip-scale atomic clock that includes a vapor cell according to one embodiment
  • the vent channels 304 provide at least one pathway for gas from each vapor cell die to travel outside of a perimeter 308 of wafer 300.
  • the vent channels 304 allow gas toward the interior surface region 306 to be in substantially continuous pressure-equilibrium with gas outside of perimeter 308 during anodic bonding of glass wafers to opposing sides of wafer 300.
  • the anodic bonding process is modified to continually ramp pressure upward as temperature (measured in degrees Kelvin, or degrees absolute) is ramped upward.
  • anodic bonding of a first wafer such as a silicon wafer is carried out by increasing a temperature of the first wafer at predetermined rate during anodic bonding of the first wafer to a second wafer such as a glass wafer.
  • the silicon wafer has a plurality of dies each with at least one chamber.
  • a gas pressure between the first and second wafers is also increased at a predetermined rate while the temperature is increasing during anodic bonding.
  • utilizing the vent channels in the wafer surface along with pressure ramping allows vapor cells that are sealed later in the process, and thus at higher temperature, to also have a higher gas pressure.
  • the vapor cells sealed at a higher temperature will drop in pressure more than those sealed at a lower temperature.
  • the later sealing vapor cells can be compensated so the final pressure of all vapor cells is about the same at room temperature.
  • the ideal gas law ensures than n (the molar density of the gas in the cells) will remain constant across the wafer.
  • the various components of physics package 400 are positioned at different levels within enclosure 402 by a set of scaffold structures.
  • the scaffold structures generally include a membrane such as a tether suspended between a frame, and a stiffening member such as a die attached to the membrane.
  • the frame and stiffening member can be composed of silicon and the membrane can be composed of polyimide, for example.
  • a middle scaffold structure 460 includes a scaffold die 462 coupled to a tether 464 that is attached to a frame 465.
  • the scaffold die 462 has an opening therethrough to permit passage of laser beam 412.
  • the middle scaffold structure 460 has a tilting feature 466 on which quarter wave plate 420 is mounted, such as with an adhesive.
  • quarter wave plate 420 can be mounted on tilting feature 466 at a preselected tilt angle with respect to the optical path of laser beam 412.
  • the middle scaffold structure 460 has an upper surface 467 on which vapor cell 430 is mounted, such as with an adhesive.
  • the middle scaffold structure 460 is attached to a spacer 470 on a lower surface 472 thereof with an adhesive such as an epoxy or other suitable attachment method.
  • the vapor cell 430 includes a pair of optically clear glass wafers, including a lower glass wafer 432 and an upper glass wafer 434 that are anodically bonded to opposing sides of a substrate such as a silicon wafer 436. At least one chamber 438 within vapor cell 430 provides an optical path between laser die 410 and photodetector 440 for laser beam 412.
  • vent channels can be formed in a surface of the silicon wafer in order to provide pathways for gas to escape to a perimeter of the wafer during anodic bonding.
  • Figure 7 illustrates another embodiment of this approach, in which a silicon wafer 700 is used for fabricating vapor cells.
  • the wafer 700 includes a plurality of vapor cell dies 702 and interconnected vent channels 704 that surround vapor cell dies 702.
  • the vapor cell dies 702 and vent channels 704 are located in an interior surface region 706 of wafer 700.
  • the vent channels 704 can be formed with the same processes used to form vapor cell dies 702.
  • Example 2 includes the method of Example 1, wherein the first wafer comprises a silicon wafer, and the second and third wafers each comprise a glass wafer.
  • Example 4 includes the method of any of Examples 1-3, wherein the diameter of the sacrificial wafer is sufficiently large to prevent arcing when the voltage is applied to the metallized bond plate.
  • a sacrificial wafer is located over the third wafer, the sacrificial wafer having a diameter that is larger than the first, second and third diameters.
  • the diameter of the sacrificial wafer is sufficiently large to prevent arcing when the third wafer is anodically bonded to the first wafer.
  • Example 13 includes the wafer configuration of Example 12, wherein the first wafer comprises a silicon wafer, and the second and third wafers each comprise a glass wafer.
  • Example 16 includes the wafer configuration of Example 15, wherein the vent channels allow gas toward the interior surface region of the first wafer to be in substantially continuous pressure-equilibrium with gas outside of the perimeter of the first wafer when the second and third wafers are anodically bonded to the first wafer.

Landscapes

  • Life Sciences & Earth Sciences (AREA)
  • Ecology (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Micromachines (AREA)
  • Ceramic Products (AREA)
  • Measuring Fluid Pressure (AREA)
EP13181421.2A 2012-10-29 2013-08-22 Herstellungstechniken zur Verbesserung der Druckgleichförmigkeit in anodisch gebundenen Dampfzellen und Mikroplättchenstruktur dazu Active EP2746876B1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/662,850 US8941442B2 (en) 2010-02-04 2012-10-29 Fabrication techniques to enhance pressure uniformity in anodically bonded vapor cells

Publications (3)

Publication Number Publication Date
EP2746876A2 true EP2746876A2 (de) 2014-06-25
EP2746876A3 EP2746876A3 (de) 2018-01-10
EP2746876B1 EP2746876B1 (de) 2019-04-10

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP13181421.2A Active EP2746876B1 (de) 2012-10-29 2013-08-22 Herstellungstechniken zur Verbesserung der Druckgleichförmigkeit in anodisch gebundenen Dampfzellen und Mikroplättchenstruktur dazu

Country Status (3)

Country Link
EP (1) EP2746876B1 (de)
JP (1) JP6198522B2 (de)
CN (1) CN103792838B (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6488599B2 (ja) 2014-09-08 2019-03-27 セイコーエプソン株式会社 量子干渉装置、原子セルの製造方法および電子機器
JP6852377B2 (ja) * 2016-12-12 2021-03-31 株式会社村田製作所 原子発振器および電子機器
CN107128871B (zh) * 2017-05-10 2019-04-05 中国电子科技集团公司第四十九研究所 一种基于mems原子芯片的物理封装件及其封装方法
US10544039B2 (en) * 2017-09-08 2020-01-28 Texas Instruments Incorporated Methods for depositing a measured amount of a species in a sealed cavity
JP2019165332A (ja) * 2018-03-19 2019-09-26 株式会社リコー 電子デバイスおよび原子発振器
JP7232510B2 (ja) * 2019-01-31 2023-03-03 国立研究開発法人情報通信研究機構 量子光学装置

Family Cites Families (14)

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JP2005016965A (ja) * 2003-06-23 2005-01-20 Sumitomo Precision Prod Co Ltd パッケージおよびその製造方法、ならびに振動ジャイロおよびその製造方法
US7400207B2 (en) * 2004-01-06 2008-07-15 Sarnoff Corporation Anodically bonded cell, method for making same and systems incorporating same
US7292111B2 (en) * 2004-04-26 2007-11-06 Northrop Grumman Corporation Middle layer of die structure that comprises a cavity that holds an alkali metal
WO2006036268A2 (en) * 2004-07-16 2006-04-06 Sarnoff Corporation Chip-scale atomic clock (csac) and method for making same
JP5121493B2 (ja) * 2008-02-21 2013-01-16 セイコーインスツル株式会社 圧電振動子の製造方法
JP2009212416A (ja) * 2008-03-06 2009-09-17 Epson Toyocom Corp ガスセルの製造方法及びガスセル
JP2009215099A (ja) * 2008-03-10 2009-09-24 Konica Minolta Holdings Inc 陽極接合方法及び液滴吐出ヘッドの製造方法
CN101407372B (zh) * 2008-11-07 2011-01-12 清华大学 一种原子蒸气泡的制作方法
CN101598772B (zh) * 2009-06-26 2011-12-07 中北大学 微型原子蒸汽泡制作方法
JP5421690B2 (ja) * 2009-08-12 2014-02-19 セイコーインスツル株式会社 パッケージの製造方法
US20110187464A1 (en) * 2010-02-04 2011-08-04 Honeywell International Inc. Apparatus and methods for alkali vapor cells
US8299860B2 (en) * 2010-02-04 2012-10-30 Honeywell International Inc. Fabrication techniques to enhance pressure uniformity in anodically bonded vapor cells
US8242851B2 (en) * 2010-02-04 2012-08-14 Honeywell International Inc. Processes for stabilizing a VCSEL in a chip-scale atomic clock
JP2012191138A (ja) * 2011-03-14 2012-10-04 Seiko Epson Corp ガスセルユニット、原子発振器および電子装置

Also Published As

Publication number Publication date
JP6198522B2 (ja) 2017-09-20
JP2014088308A (ja) 2014-05-15
CN103792838B (zh) 2017-08-11
CN103792838A (zh) 2014-05-14
EP2746876B1 (de) 2019-04-10
EP2746876A3 (de) 2018-01-10

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