Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
  • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L23/00—Details of semiconductor or other solid state devices
  • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
  • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
  • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
  • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
  • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
  • H05K3/325—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor
  • H05K3/326—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by abutting or pinching, i.e. without alloying process; mechanical auxiliary parts therefor the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/10—Bump connectors; Manufacturing methods related thereto
  • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
  • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
  • H01L2224/8119—Arrangement of the bump connectors prior to mounting
  • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
  • H01L2224/812—Applying energy for connecting
  • H01L2224/81201—Compression bonding
  • H01L2224/81205—Ultrasonic bonding
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
  • H01L2224/818—Bonding techniques
  • H01L2224/81801—Soldering or alloying
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/01—Chemical elements
  • H01L2924/01005—Boron [B]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/01—Chemical elements
  • H01L2924/01006—Carbon [C]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/01—Chemical elements
  • H01L2924/01033—Arsenic [As]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/01—Chemical elements
  • H01L2924/01047—Silver [Ag]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/01—Chemical elements
  • H01L2924/01068—Erbium [Er]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/01—Chemical elements
  • H01L2924/01082—Lead [Pb]
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/013—Alloys
  • H01L2924/0132—Binary Alloys
  • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/06—Polymers
  • H01L2924/078—Adhesive characteristics other than chemical
  • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/06—Polymers
  • H01L2924/078—Adhesive characteristics other than chemical
  • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
  • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
  • H01L2924/1901—Structure
  • H01L2924/1904—Component type
  • H01L2924/19043—Component type being a resistor
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
  • H01L2924/30—Technical effects
  • H01L2924/301—Electrical effects
  • H01L2924/3011—Impedance
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/09—Shape and layout
  • H05K2201/09009—Substrate related
  • H05K2201/091—Locally and permanently deformed areas including dielectric material
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
  • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
  • H05K2201/10621—Components characterised by their electrical contacts
  • H05K2201/10674—Flip chip
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
  • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
  • H05K2203/0278—Flat pressure, e.g. for connecting terminals with anisotropic conductive adhesive
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
  • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K3/00—Apparatus or processes for manufacturing printed circuits
  • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
  • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
  • Y10T156/10—Methods of surface bonding and/or assembly therefor

Definitions

• the invention relates to an electronic, in particular a microelectronic, functional group and a method for producing such a functional group.
• an electronic functional group contains at least one or more electronic components, a conductor structure which contacts the electronic components, and a carrier on which electronic components and conductor structure are applied.
• Another possibility is to form the conductor structure at least partially by an isotropically conductive adhesive, to set the chip on this area, and then to cure the adhesive.
• non-conductive adhesive can be used.
• the terminal contacts of the chip are formed in this case as conductive bumps ("bumps").
• bumps By sufficiently high contact pressure and by As the adhesive cures and shrinks, the direct contact of the conductive bumps with the conductor pattern is established and maintained.
• the invention provides an electronic, in particular microelectronic functional group comprising a flat first carrier, a first adhesive layer of a non-conductive adhesive applied to the carrier, a conductor structure applied to a portion of the adhesive layer on the side facing away from the carrier, and at least one electronic component , in particular a microelectronic chip, with at least one external electrical connection contact, the at least one connection contact of the electronic component being in direct contact with the conductor structure and a part of the outer shell of the component being in direct contact with the adhesive layer.
• External contact means any contact of the component which is accessible from outside and which is to be contacted with the conductor structure.
• the non-conductive adhesive layer is used for mechanically fixing the electronic component.
• Such adhesives are available at low cost. This makes it possible, in particular, to apply the adhesive over the entire surface of the carrier as a layer, which reduces the complexity and thus the process costs, since a special structuring of the adhesive is not necessary. Furthermore, the poor dielectric properties of an anisotropically conductive adhesive as well as a possibly too high resistance of an isotropically conductive adhesive are avoided.
• the conductor pattern is formed directly on the adhesive layer.
• the carrier, adhesive layer, conductor structure and / or the at least one electronic component can be mechanically rigid or flexurally flexible.
• flexurally flexible elements in particular a bend-flexible carrier, makes it possible to produce a bending-flexible electronic functional group.
• a flexible functional group is particularly suitable for use as a so-called “smart label”, which is understood to mean labels which are equipped with a chip and an antenna and are thus able to emit a high-frequency identification signal upon activation.
• a rigid, bending-resistant construction of the functional group is also possible in principle.
• paper, cardboard, polymer films or printed circuit boards can be used as supports. depending on whether a flexible or rigid construction is to be achieved.
• adhesives for example, acrylates, polysiloxanes, epoxies, thermoplastics, optionally with suitable surface treatment, can be used.
• the conductor structure can be formed by application of silver ink or conductive paste.
• the functional group has a second adhesive layer of a non-conductive adhesive and a flat second carrier, with the first adhesive layer and the first carrier a solid
• Layer composite first carrier-first adhesive layer-second adhesive layer-second carrier form wherein the conductor structure and / or the at least one e-lektronische component lies at least partially between the first and second carrier or lie.
• the conductor structure and the at least one electronic component lie partially or completely between the first and second adhesive layers, in particular being embedded in the adhesive layer.
• the two adhesive layers are completely covered by the carriers on the top and bottom sides.
• the adhesives of the first and second adhesive layers are identical. This ensures a good cohesive connection between the layers.
• the second adhesive layer with a conductor structure in analogy to the first adhesive layer and to contact electronic components therewith, for example in order to lay an electrically insulated bridge over the windings of an antenna coil.
• the invention provides a method for producing an electronic functional group described above, comprising the steps:
• a slight pressing of the electronic component is sufficient to produce a good electrical contact between the terminal contact of the component and the conductor structure, as well as to adhesively connect the component to the adhesive layer.
• the adhesive layer is sufficiently large. Chig designed to provide the electronic component has a sufficiently large contact area.
• a frictional connection between the component's terminal contact and conductor structure is sufficient to ensure an electrical connection for most applications.
• the assembly of the electronic component can be carried out without high mechanical and thermal loading of the component. This is particularly advantageous if sensitive components, such as microelectronic chips, are mounted.
• the at least one electrical connection contact of the component is connected to the region of the conductor structure that makes electrical contact with it by a thermal treatment. In this way, a highly conductive intermetallic phase is formed.
• the method according to the invention is possible to use the method according to the invention as part of a roll-to-roll process, ie in a continuous process. This is possible in particular in that adhesives can be used which do not require a subsequent curing in a separate oven.
• the inventive method can be carried out in a few seconds lasting clock cycle. It is thus particularly advantageous for the production of electronic functional groups such as the above-mentioned "smart labeis" which, in order to be economically interesting, must be able to be produced in large quantities and at low cost.
• first adhesive layer and preferably also the first adhesive layer disposed on the component and / or the conductor structure is at least partially coated with further non-conductive adhesive or, and this second adhesive layer another Carrier is arranged.
• the method can be advantageously realized by first coating the further carrier with the second adhesive layer, only then to be brought as a whole by a lamination process onto the first adhesive layer or onto the latter with applied component and / or conductor structure.
• the conductor structure can be applied directly to the surface of the adhesive layer, for example, by means of an inkjet printing process. Another possibility is to initially form the conductor structure on the surface of a substrate, and to transfer from the substrate to the adhesive layer of the conductor structure of this on the adhesive layer.
• Fig. 3 shows a further embodiment of the electronic functional group according to the invention after completion of the manufacturing process.
• a planar carrier 5a here a paper sheet with a thickness of 200 microns, on one side over the entire surface with a non-conductive adhesive, here acrylate, uniformly coated, so that a first adhesive layer 4a with a Thickness of 20 microns is formed.
• a silver ink is applied in the form of a previously defined conductor structure 3 by means of an ink-jet printing process.
• the chip 1 with an external electrical connection contact 2 for example in the form of a
• Höckers, but also other trainers. is disposed on the adhesive layer 4a and on the conductor pattern 3, wherein the terminal contact 2 is brought into direct contact with the conductor pattern 3 and a part of the outer shell of the component 1 is brought into direct contact with the adhesive layer.
• the chip 1 is pressed lightly in the direction of the carrier 5a.
• a second layer of non-conductive adhesive here also acrylate, applied.
• This second adhesive layer 4b is closed on its upper side with a second carrier 5b, here likewise a paper sheet with a wall thickness of 200 micrometers (FIG. 3).
• Conductor structure 3 and chip 1 are thus completely embedded in the adhesive layers 4a and 4b. They are mechanically protected by the outer carrier layers 5a and 5b.
• the flexible paper carrier, the thin adhesive layers 4a, 4b and the thin conductor structure 3 ensure that the electronic functional group is flexurally flexible as a whole.
• the chip itself has a low flexibility; however, it is very small compared to any bending radii of the carrier layers 5a and 5b. Also, a local stiffening depending on the requirements may be desired.
• the electronic function group forms a so-called "smart label".
• the RFID chip is capable of emitting high-frequency electromagnetic signals for identification purposes.
• the conductor structure 3 is designed in this regard as a transmitting and receiving antenna for the chip 1.
• bending-resistant elements in particular bending-resistant carriers.
• the conductor structure 3 and terminal contact 2 of the electronic component by means of thermal treatment into an intermetallic phase.
• the carriers can be provided in a separate process with adhesive layers and also with a conductor structure.
• the process presented here is particularly suitable for the production of "smart labeis". It exclusively uses existing material and reduces the process steps required for the assembly and connection technology to a minimum.
• the production can be carried out extremely inexpensively and throughput-optimized, for example via a roll-to-roll process with any subsequent hardening phase, e.g. as a whole roll or as sheet goods at room temperature or in a warming cabinet.
• the process can be carried out gently with little mechanical stress.

Landscapes

• Engineering & Computer Science (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Computer Hardware Design (AREA)
• Power Engineering (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Metallurgy (AREA)
• Wire Bonding (AREA)
• Electric Connection Of Electric Components To Printed Circuits (AREA)
• Details Of Resistors (AREA)

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• 2006
  • 2006-11-24 US US12/515,804 patent/US20100142167A1/en not_active Abandoned
  • 2006-11-24 WO PCT/EP2006/011515 patent/WO2008061554A1/de active Application Filing
  • 2006-11-24 EP EP06829212A patent/EP2100327A1/de not_active Withdrawn
  • 2006-11-24 JP JP2009537486A patent/JP5248518B2/ja not_active Expired - Fee Related
  • 2006-11-24 CN CN2006800564582A patent/CN101563765B/zh not_active Expired - Fee Related
• 2009
  • 2009-05-15 NO NO20091913A patent/NO20091913L/no not_active Application Discontinuation

Non-Patent Citations (1)

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